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1. 发明申请

US20100133586A1 HETEROJUNCTION BIPOLAR TRANSISTOR AND METHOD OF FORMING THE SAME 审中-公开
标题翻译：异相双极晶体管及其形成方法
公开(公告)号：US20100133586A1
公开(公告)日：2010-06-03
申请号：US12463011
申请日：2009-05-08
申请人： Byoung-Gue MIN , Jong-Min Lee , Seong-II Kim , Kyung-Ho Lee , Hyung-Sup Yoon , Eun-Soo Nam
发明人： Byoung-Gue MIN , Jong-Min Lee , Seong-II Kim , Kyung-Ho Lee , Hyung-Sup Yoon , Eun-Soo Nam
IPC分类号： H01L29/737 , H01L21/331
CPC分类号： H01L29/42304 , H01L29/41708 , H01L29/66318 , H01L29/7371
摘要： Provided are a heterojunction bipolar transistor and a method of forming the same. The method includes forming an emitter electrode on an emitter capping pattern, a base electrode on a base pattern, and a collector electrode on a subcollector pattern, the subcollector pattern, the base pattern, an emitter pattern, and the emitter capping pattern being provided to a substrate; patterning a protection insulation layer and a first dummy pattern covering the emitter electrode, the base electrode, and the collector electrode, to expose the emitter electrode, the base electrode, and the collector electrode; forming a second dummy pattern to electrically separate the emitter electrode, the base electrode, and the collector electrode; forming, on the substrate provided with the second dummy pattern, an emitter electrode interconnection connected to the emitter electrode, a base electrode interconnection connected to the base electrode, and a collector electrode interconnection connected to the collector electrode; and removing the first and second dummy patterns.
摘要翻译：提供了一种异质结双极晶体管及其形成方法。该方法包括在发射极盖图案上形成发射电极，在基底图案上形成基极，在子集电极图案上形成集电极，将子集电极图案，基底图案，发射极图案和发射极封盖图案设置在底物; 图案化保护绝缘层和覆盖发射电极，基极和集电极的第一虚拟图案，以暴露发射极，基极和集电极; 形成第二虚设图形以电分离发射电极，基极和集电极; 在设置有第二虚设图案的基板上形成连接到发射极的发射极电极互连，与基极连接的基极互连和与集电极连接的集电极互连; 以及去除第一和第二虚拟图案。

2. 发明授权

US07364977B2 Heterojunction bipolar transistor and method of fabricating the same 失效
标题翻译：异质结双极晶体管及其制造方法
公开(公告)号：US07364977B2
公开(公告)日：2008-04-29
申请号：US10857655
申请日：2004-05-28
申请人： Byoung-Gue Min , Kyung-Ho Lee , Seong-Il Kim , Jong-Min Lee , Chul-Won Ju
发明人： Byoung-Gue Min , Kyung-Ho Lee , Seong-Il Kim , Jong-Min Lee , Chul-Won Ju
IPC分类号： H01L21/8222
CPC分类号： H01L29/66318 , H01L29/7371
摘要： Disclosed are a heterojunction bipolar transistor and a method of fabricating the same. A first dielectric layer easily etched is deposited on the overall surface of a substrate before an isolation region is defined. The first dielectric layer and a sub-collector layer are selectively etched, and then a second dielectric layer etched at a low etch rate is deposited on the overall surface of the substrate. Via holes are formed in the first and second dielectric layers, and then the first dielectric layer is removed using a difference between etch characteristics of the first and second dielectric layers. Accordingly, a reduction in power gain, generated at the interface of a compound semiconductor and a dielectric insulating layer (the second dielectric layer), can be eliminated.
摘要翻译：公开了异质结双极晶体管及其制造方法。在限定隔离区之前，易于蚀刻的第一电介质层沉积在基板的整个表面上。选择性地蚀刻第一介电层和次集电极层，然后以低蚀刻速率蚀刻的第二电介质层沉积在基板的整个表面上。在第一和第二电介质层中形成通孔，然后使用第一和第二电介质层的蚀刻特性之间的差异去除第一介电层。因此，可以消除在化合物半导体和介电绝缘层（第二介电层）的界面处产生的功率增益的降低。

3. 发明申请

US20050133820A1 Heterojunction bipolar transistor and method of fabricating the same 失效
标题翻译：异质结双极晶体管及其制造方法
公开(公告)号：US20050133820A1
公开(公告)日：2005-06-23
申请号：US10857655
申请日：2004-05-28
申请人： Byoung-Gue Min , Kyung-Ho Lee , Seong-Il Kim , Jong-Min Lee , Chul-Won Ju
发明人： Byoung-Gue Min , Kyung-Ho Lee , Seong-Il Kim , Jong-Min Lee , Chul-Won Ju
IPC分类号： H01L21/331 , H01L29/737 , H01L29/739 , H01L21/8222 , H01L31/0328
CPC分类号： H01L29/66318 , H01L29/7371
摘要： Disclosed are a heterojunction bipolar transistor and a method of fabricating the same. A first dielectric layer easily etched is deposited on the overall surface of a substrate before an isolation region is defined. The first dielectric layer and a sub-collector layer are selectively etched, and then a second dielectric layer etched at a low etch rate is deposited on the overall surface of the substrate. Via holes are formed in the first and second dielectric layers, and then the first dielectric layer is removed using a difference between etch characteristics of the first and second dielectric layers. Accordingly, a reduction in power gain, generated at the interface of a compound semiconductor and a dielectric insulating layer (the second dielectric layer), can be eliminated.
摘要翻译：公开了异质结双极晶体管及其制造方法。在限定隔离区之前，易于蚀刻的第一电介质层沉积在基板的整个表面上。选择性地蚀刻第一介电层和次集电极层，然后以低蚀刻速率蚀刻的第二电介质层沉积在基板的整个表面上。在第一和第二电介质层中形成通孔，然后使用第一和第二电介质层的蚀刻特性之间的差异去除第一介电层。因此，可以消除在化合物半导体和介电绝缘层（第二介电层）的界面处产生的功率增益的降低。

4. 发明授权

US09698151B2 Vertical memory devices 有权
公开(公告)号：US09698151B2
公开(公告)日：2017-07-04
申请号：US15179068
申请日：2016-06-10
申请人： Seung-Min Lee , Hoo-Sung Cho , Jeong-Seok Nam , Jong-Min Lee , Yong-Joon Choi
发明人： Seung-Min Lee , Hoo-Sung Cho , Jeong-Seok Nam , Jong-Min Lee , Yong-Joon Choi
IPC分类号： H01L27/115 , H01L27/11565 , H01L27/1157 , H01L27/11582 , H01L23/528 , H01L23/522 , H01L21/768
CPC分类号： H01L27/11565 , H01L21/76816 , H01L21/76877 , H01L23/5226 , H01L23/528 , H01L23/544 , H01L27/1157 , H01L27/11573 , H01L27/11575 , H01L27/11582 , H01L2223/5442 , H01L2223/54433 , H01L2223/54453
摘要： A vertical memory device includes a substrate, a plurality of channels on the substrate and extending in a first direction that is vertical to a top surface of the substrate, a plurality of gate lines stacked on top of each other on the substrate, a plurality of wiring over the gate lines and electrically connected to the gate lines, and an identification pattern on the substrate at the same level as a level of at least one of the wirings. The gate lines surround the channels. The gate lines are spaced apart from each other along the first direction.

5. 发明申请

US20160073502A1 CAPACITOR STRUCTURES, DECOUPLING STRUCTURES AND SEMICONDUCTOR DEVICES INCLUDING THE SAME 有权
标题翻译：电容器结构，分解结构和包括其中的半导体器件
公开(公告)号：US20160073502A1
公开(公告)日：2016-03-10
申请号：US14732278
申请日：2015-06-05
申请人： Jong-Min Lee , Jongryul Jun , Eun A Kim , Jung-Bum Lim
发明人： Jong-Min Lee , Jongryul Jun , Eun A Kim , Jung-Bum Lim
IPC分类号： H05K1/16
CPC分类号： H01L28/90 , H01L27/0805 , H01L27/10808 , H01L27/10817 , H01L27/10847 , H01L27/10852 , H01L28/82 , H01L28/86 , H01L28/88 , H01L28/92
摘要： Decoupling structures are provided. The decoupling structures may include first conductive patterns, second conductive patterns and a unitary supporting structure that structurally supports the first conductive patterns and the second conductive patterns. The decoupling structures may also include a common electrode disposed between ones of the first conductive patterns and between ones of the second conductive patterns. The first conductive patterns and the common electrode are electrodes of a first capacitor, and the second conductive patterns and the common electrode are electrodes of a second capacitor. The unitary supporting structure may include openings when viewed from a plan perspective. The first conductive patterns and the second conductive patterns are horizontally spaced apart from each other with a separation region therebetween, and none of the openings extend into the separation region.
摘要翻译：提供去耦结构。去耦结构可以包括第一导电图案，第二导电图案和结构上支撑第一导电图案和第二导电图案的整体支撑结构。去耦结构还可以包括设置在第一导电图案之间和第二导电图案之间的公共电极。第一导电图案和公共电极是第一电容器的电极，第二导电图案和公共电极是第二电容器的电极。从平面图看，整体支撑结构可以包括开口。第一导电图案和第二导电图案在其间具有分离区域彼此水平间隔开，并且没有一个开口延伸到分离区域中。

6. 发明授权

US09166012B2 Semiconductor memory devices including an air gap and methods of fabricating the same 有权
标题翻译：包括气隙的半导体存储器件及其制造方法
公开(公告)号：US09166012B2
公开(公告)日：2015-10-20
申请号：US14096195
申请日：2013-12-04
申请人： Jae-Hwang Sim , Jinhyun Shin , Jong-Min Lee
发明人： Jae-Hwang Sim , Jinhyun Shin , Jong-Min Lee
IPC分类号： H01L29/788 , H01L29/423 , H01L21/764 , H01L27/115
CPC分类号： H01L27/11524 , H01L21/764 , H01L29/42324
摘要： Provided are a semiconductor memory device and a method of fabricating the same, the semiconductor memory device may include a semiconductor substrate with a first trench defining active regions in a first region and a second trench provided in a second region around the first region, a gate electrode provided on the first region to cross the active regions, a charge storing pattern disposed between the gate electrode and the active regions, a blocking insulating layer provided between the gate electrode and the charge storing pattern and extending over the first trench to define a first air gap in the first trench, and an insulating pattern provided spaced apart from a bottom surface of the second trench to define a second air gap in the second trench.
摘要翻译：提供一种半导体存储器件及其制造方法，半导体存储器件可以包括半导体衬底，该半导体衬底具有限定第一区域中的有源区域的第一沟槽和设置在第一区域周围的第二区域中的第二沟槽，栅极电极，设置在第一区域上以与有源区交叉，设置在栅电极和有源区之间的电荷存储图案，设置在栅电极和电荷存储图案之间并在第一沟槽上延伸以限定第一第一沟槽中的空气间隙，以及设置成与第二沟槽的底表面间隔开的绝缘图案，以在第二沟槽中限定第二气隙。

7. 发明授权

US08617910B2 Display device and a method of manufacturing the same 有权
标题翻译：显示装置及其制造方法
公开(公告)号：US08617910B2
公开(公告)日：2013-12-31
申请号：US13239822
申请日：2011-09-22
申请人： Jae-Han Lee , Jong-Min Lee , Sun-Kyu Son , Young-Il Ban , Ok-Kwon Shin
发明人： Jae-Han Lee , Jong-Min Lee , Sun-Kyu Son , Young-Il Ban , Ok-Kwon Shin
IPC分类号： H01L21/00 , H01L29/18 , H05K7/00
CPC分类号： G02F1/13452
摘要： A display device includes an array substrate, a driving film and an adhesive member. The array substrate includes a first base substrate, a plurality of first signal pads formed on the first base substrate and a first dummy pad formed adjacent to the first signal pads. The driving film includes a base film, a plurality of output terminals formed on the base film and a first alignment mark formed adjacent to the output terminals. The adhesive member adheres the first signal pads to the output terminals, and adheres the first dummy pad to the first alignment mark.
摘要翻译：显示装置包括阵列基板，驱动膜和粘合构件。阵列基板包括第一基底基板，形成在第一基底基板上的多个第一信号焊盘和邻近第一信号焊盘形成的第一虚设焊盘。驱动膜包括基膜，形成在基膜上的多个输出端子和邻近输出端子形成的第一对准标记。粘合剂粘合第一信号垫到输出端，并将第一虚拟垫粘附到第一对准标记。

8. 发明申请

US20130027242A1 DETECTION AND TRACKING RADAR, ANTI HIGH SPEED MOBILE DEFENSE SYSTEM HAVING THE SAME AND HIGH SPEED MOBILE TRACKING METHOD OF DETECTION AND TRACKING RADAR 有权
标题翻译：检测和跟踪雷达，具有相同速度的高速移动防御系统和检测和跟踪雷达的高速移动跟踪方法
公开(公告)号：US20130027242A1
公开(公告)日：2013-01-31
申请号：US13579149
申请日：2011-07-29
申请人： Jong-Min Lee , Sun-gu Sun , Byunglae Cho , Jungsoo Lee , Sangsoon Park , Youn Sik Kang
发明人： Jong-Min Lee , Sun-gu Sun , Byunglae Cho , Jungsoo Lee , Sangsoon Park , Youn Sik Kang
IPC分类号： G01S13/66
CPC分类号： G01S13/87 , G01S7/292 , G01S7/295 , G01S13/726
摘要： A detection and tracking radar includes a hazardous zone set within a preset radius based on a main body having a radar, a plurality of detection and tracking sectors configured to detect a high speed mobile approaching the main body within detection areas, the detection areas being defined by diving the hazardous zone based on an azimuth angle, and a controller configured to recognize the high speed mobile as a target based upon signals received from the detection and tracking sectors and track the target. Accordingly, rapid detection and tracking of the high speed mobile can be allowed. Also, since the detection and tracking sectors can be independently run, expansion of a radar system can be free by virtue of addition of the detection and tracking sectors.
摘要翻译：检测和跟踪雷达包括基于具有雷达的主体设置在预设半径内的危险区域，多个检测和跟踪扇区，被配置为检测在检测区域内接近主体的高速移动站，所述检测区域被定义通过基于方位角潜水危险区域，以及控制器，其被配置为基于从检测和跟踪扇区接收的信号识别高速移动站作为目标，并跟踪目标。因此，可以允许高速移动的快速检测和跟踪。此外，由于可以独立地运行检测和跟踪扇区，所以通过添加检测和跟踪扇区，雷达系统的扩展可以是自由的。

9. 发明申请

US20120197029A1 METHOD FOR PRODUCING CYCLICISED COMPOUNDS FROM ORGANIC ACIDS HAVING FROM 4 TO 6 CARBON ATOMS 有权
标题翻译：从4〜6碳原子生产有机酸的循环化合物的方法
公开(公告)号：US20120197029A1
公开(公告)日：2012-08-02
申请号：US13395168
申请日：2010-08-27
申请人： Young Kyu Hwang , Jong San Chang , Jung Ho Lee , Jong-Min Lee
发明人： Young Kyu Hwang , Jong San Chang , Jung Ho Lee , Jong-Min Lee
IPC分类号： C07D313/04 , C07D307/33 , C07D307/06
CPC分类号： B01J23/72 , B01J21/08 , B01J23/75 , B01J23/755 , B01J23/76 , B01J23/78 , B01J23/80 , B01J23/868 , B01J23/8892 , B01J23/8896 , B01J23/8926 , B01J27/057 , B01J35/006 , B01J37/031 , C07C61/00 , C07D307/06 , C07D307/08 , C07D307/32 , C07D307/33 , C07D313/04
摘要： The present invention relates to a method for producing a cyclic compound that has high selectivity, high yield, and stability over a long period of time depending on a metal content ratio of a catalyst, specifically a lactone compound or a heterocyclic compound including oxygen, which includes hydrogenating an organic acid, organic acid ester, or a mixture of the organic acid and organic acid ester, which are having 4 to 6 carbon atoms, by using a selective hydrogenated catalyst.
摘要翻译：本发明涉及根据催化剂，特别是内酯化合物或包含氧的杂环化合物的金属含量比，长时间选择性高，产率高，稳定性高的环状化合物的制造方法，其中，包括通过使用选择性氢化催化剂来氢化有机酸，有机酸酯或具有4-6个碳原子的有机酸和有机酸酯的混合物。

10. 发明申请

US20120129013A1 BATTERY PACK 有权
标题翻译：电池组
公开(公告)号：US20120129013A1
公开(公告)日：2012-05-24
申请号：US13243846
申请日：2011-09-23
申请人： Jong-Min Lee
发明人： Jong-Min Lee
IPC分类号： H01M10/42
CPC分类号： H01M10/4207 , H01M10/425 , H01M10/486 , H01M2200/00
摘要： A battery pack includes a plurality of bare cells electrically connected in series or parallel to one another, and a protection circuit module provided with a thermistor. In the battery pack, the protection circuit module is electrically connected to the bare cells, and the thermistor is provided to be parallel in the length direction of the protection circuit module between the bare cells and the protection circuit module so as to measure a variable resistance by sensing a temperature of the bare cells and to transfer the measured resistance as an electrical signal to the protection circuit module.
摘要翻译：电池组包括彼此串联或并联电连接的多个裸电池，以及设置有热敏电阻的保护电路模块。在电池组中，保护电路模块电连接到裸电池，并且热敏电阻被设置为在裸电池和保护电路模块之间沿保护电路模块的长度方向平行，以便测量可变电阻通过感测裸电池的温度并将测得的电阻作为电信号传送到保护电路模块。

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