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1. 发明授权

US6081139A Differential amplifier with lateral bipolar transistor 失效
标题翻译：带横向双极晶体管的差分放大器
公开(公告)号：US6081139A
公开(公告)日：2000-06-27
申请号：US937907
申请日：1997-09-25
申请人： Carl F. Liepold , James T. Doyle
发明人： Carl F. Liepold , James T. Doyle
IPC分类号： H01L27/07 , H03F3/45 , H03K5/24 , H03K5/22 , H03K17/60
CPC分类号： H03F3/45076 , H01L27/0722 , H03K5/2481
摘要： The present invention provides a differential amplifier. The differential amplifier includes first and second inputs and an output. The differential amplifier further includes a lateral bipolar transistor. The lateral bipolar transistor includes a well region that has a base region, an emitter region and first and second collector regions. The first and second collector regions are spaced apart from the emitter. The lateral bipolar transistor also includes a first gate, coupled to the first input, to overlay a space between the emitter region and the first collector region. Furthermore, the lateral bipolar transistor includes a second gate, coupled to the second input, to overlay a space between the emitter region and the second collector region. The differential amplifier further includes first and second load devices coupled to the first and second collector regions.
摘要翻译：本发明提供了一种差分放大器。差分放大器包括第一和第二输入和输出。差分放大器还包括横向双极晶体管。横向双极晶体管包括具有基极区域，发射极区域以及第一和第二集电极区域的阱区域。第一和第二集电极区域与发射极间隔开。横向双极晶体管还包括耦合到第一输入的第一栅极，以覆盖发射极区域和第一集电极区域之间的空间。此外，横向双极晶体管包括耦合到第二输入的第二栅极，以覆盖发射极区域和第二集电极区域之间的空间。差分放大器还包括耦合到第一和第二集电极区域的第一和第二负载装置。

2. 发明授权

US5841821A Bi-directional low pass filtering method and apparatus 失效
标题翻译：双向低通滤波方法及装置
公开(公告)号：US5841821A
公开(公告)日：1998-11-24
申请号：US764513
申请日：1996-12-12
申请人： James T. Doyle , Carl F. Liepold
发明人： James T. Doyle , Carl F. Liepold
IPC分类号： H03F3/45 , H03H7/01 , H03H11/04 , H04L5/16 , H04L25/03 , H04B1/10
CPC分类号： H03H7/1766 , H03F3/45085 , H03H11/045 , H03H7/0115 , H04L25/03343 , H04L5/16 , H03F2203/45371 , H03F2203/45574 , H03F2203/45612
摘要： The present invention provides a bi-directional low pass filtering method and apparatus for attenuating out-of-baseband components of data transmitted from an encoder to a decoder over a transmission medium. In one embodiment of the present invention, the bi-directional low pass filtering apparatus includes a Chebyshev filter that has a first phase response. This Chebyshev filter is coupled to a phase correction circuit, which has a second phase response. This second phase response of the phase correction circuit is designed to oppose the first phase response in order to offset variations in group delay in the data due to the Chebyshev filter.
摘要翻译：本发明提供一种双向低通滤波方法和装置，用于通过传输介质衰减从编码器发送到解码器的数据的基带外分量。在本发明的一个实施例中，双向低通滤波装置包括具有第一相位响应的切比雪夫滤波器。该切比雪夫滤波器耦合到具有第二相位响应的相位校正电路。相位校正电路的第二相位响应被设计为与第一相位响应相反，以便抵消由切比雪夫滤波器引起的数据中组延迟的变化。

3. 发明授权

US5694439A Bi-directional low pass filtering method and apparatus 失效
标题翻译：双向低通滤波方法及装置
公开(公告)号：US5694439A
公开(公告)日：1997-12-02
申请号：US408270
申请日：1995-03-21
申请人： James T. Doyle , Carl F. Liepold
发明人： James T. Doyle , Carl F. Liepold
IPC分类号： H03F3/45 , H03H7/01 , H03H11/04 , H04L5/16 , H04L25/03 , H04B1/10
CPC分类号： H03H7/1766 , H03F3/45085 , H03H11/045 , H03H7/0115 , H04L25/03343 , H04L5/16 , H03F2203/45371 , H03F2203/45574 , H03F2203/45612
摘要： The present invention provides a bi-directional low pass filtering method and apparatus for attenuating out-of-baseband components of data transmitted from an encoder to a decoder over a transmission medium. In one embodiment of the present invention, the bi-directional low pass filtering apparatus includes a Chebyshev filter that has a first phase response. This Chebyshev filter is coupled to a phase correction circuit, which has a second phase response. This second phase response of the phase correction circuit is designed to oppose the first phase response in order to offset variations in group delay in the data due to the Chebyshev filter.
摘要翻译：本发明提供一种双向低通滤波方法和装置，用于通过传输介质衰减从编码器发送到解码器的数据的基带外分量。在本发明的一个实施例中，双向低通滤波装置包括具有第一相位响应的切比雪夫滤波器。该切比雪夫滤波器耦合到具有第二相位响应的相位校正电路。相位校正电路的第二相位响应被设计为与第一相位响应相反，以便抵消由切比雪夫滤波器引起的数据中组延迟的变化。

4. 发明授权

US5202590A Subthreshold sense circuit for clamping an injected current 失效
标题翻译：用于钳位注入电流的亚阈值感测电路
公开(公告)号：US5202590A
公开(公告)日：1993-04-13
申请号：US788491
申请日：1991-11-06
申请人： Carl F. Liepold , James T. Doyle
发明人： Carl F. Liepold , James T. Doyle
IPC分类号： H03F1/30 , H03K5/003 , H03K5/08
CPC分类号： H03K5/003 , H03F1/301 , H03K5/086
摘要： A subthreshold sense circuit for clamping an injected current at the input pins of an integrated circuit device before the injected current causes the voltage at the input pins to exceed the supply voltage by more than a diode's ON voltage. The subthreshold sense circuit is driven to operate in the linear region of the FETs. The subthreshold sense circuit of the present invention comprises level shifters, a subthreshold current source, a reference voltage generator, a subthreshold comparator, and a clamping circuit. The subthreshold current source generates a reference drain current to drive the sense circuit of the present invention in the linear region. A level shifter is connected to an input pin to shift the voltage level of the input pin by a subthreshold voltage level. The reference voltage generator provides a reference voltage to be compared with the subthreshold-shifted input voltage. The subthreshold comparator compares the subthreshold-shifted input voltage with the reference voltage level such that when the subthreshold-shifted input voltage from the input pin exceeds the reference voltage level, the subthreshold comparator will turn on. The clamping circuit is activated by the subthreshold comparator to clamp the input pin to less than one V.sub.D (ON) drop over the supply voltage by sinking the injected current at the input pin when the subthreshold comparator is turned on.
摘要翻译：在注入电流之前，用于钳位在集成电路器件的输入引脚处的注入电流的亚阈值感测电路使得输入引脚处的电压超过电源电压超过二极管的导通电压。亚阈值检测电路被驱动以在FET的线性区域中工作。本发明的亚阈值检测电路包括电平移位器，亚阈值电流源，参考电压发生器，亚阈值比较器和钳位电路。亚阈值电流源产生参考漏极电流，以在线性区域中驱动本发明的感测电路。电平移位器连接到输入引脚，以将输入引脚的电压电平移位亚阈值电压电平。参考电压发生器提供与亚阈值移位输入电压进行比较的参考电压。亚阈值比较器将亚阈值移位输入电压与参考电压电平进行比较，使得当来自输入引脚的亚阈值移位输入电压超过参考电压电平时，子阈值比较器将导通。钳位电路由次阈值比较器激活，通过在亚阈值比较器导通时将输入引脚上的注入电流吸收，将输入引脚钳位在电源电压下的一个VD（ON）下降。

5. 发明授权

US06198421B1 Neural-flash analog-to-digital converter using weighted current similation 有权
标题翻译：使用加权电流模拟的神经闪光模数转换器
公开(公告)号：US06198421B1
公开(公告)日：2001-03-06
申请号：US09259650
申请日：1999-02-26
申请人： James T. Doyle , Carl F. Liepold
发明人： James T. Doyle , Carl F. Liepold
IPC分类号： H03M136
CPC分类号： H03M1/36
摘要： One embodiment of the present invention provides a flash analog-to-digital converter (ADC) based on a feedforward perceptron. The ADC includes a plurality of N stages to provide N digital signals. The plurality of N stages includes a first stage to provide a sum of an input current, related to a voltage to be converted, and of a reference current. The first stage provides a first digital signal in one of first and second states if the sum has one of first and second signs, respectively. The plurality of N stages further includes i stages, with i=2 . . . N. Each stage i includes an output circuit and 2(i−2) sub-stages coupled to the output circuit. Each sub-stage includes an input and a hidden circuit coupled therebetween. The input circuit is configured to provide a first sum of the input current and of a first reference current. Each hidden circuit provides to the output circuit a second reference current when the first sum has a first sign. The output circuit generates an ith digital signal in one of a first and second states when a second sum of the input current and of the second reference current has one of first and second signs respectively.
摘要翻译：本发明的一个实施例提供一种基于前馈感知器的闪存模数转换器（ADC）。 ADC包括多个N级以提供N个数字信号。多个N级包括提供与要转换的电压相关的输入电流和参考电流的和的第一级。如果总和分别具有第一和第二符号之一，则第一级提供第一和第二状态之一的第一数字信号。多个N级还包括i级，i = 2。。。 N.每级i包括一个输出电路和耦合到输出电路的2（i-2）个子级。每个子级包括耦合在其间的输入和隐藏电路。输入电路被配置为提供输入电流和第一参考电流的第一和。当第一和具有第一符号时，每个隐藏电路向输出电路提供第二参考电流。当输入电流和第二参考电流的第二和分别具有第一和第二符号之一时，输出电路产生第一和第二状态之一的第i个数字信号。

6. 发明授权

US5408235A Second order Sigma-Delta based analog to digital converter having superior analog components and having a programmable comb filter coupled to the digital signal processor 失效
标题翻译：具有优异模拟分量并具有耦合到数字信号处理器的可编程梳状滤波器的基于Σ-Δ的模数转换器
公开(公告)号：US5408235A
公开(公告)日：1995-04-18
申请号：US207040
申请日：1994-03-07
申请人： James T. Doyle , Tim Beatty , Carl F. Liepold
发明人： James T. Doyle , Tim Beatty , Carl F. Liepold
IPC分类号： H03H17/02 , H03M3/02 , H03M1/10
CPC分类号： H03H17/0251 , H03M3/462 , H03M3/43 , H03M3/454
摘要： A "true" 16-bit second order Sigma-Delta based converter that has superior analog components and has a programmable comb filter which is coupled to the digital signal processor. This converter comprises a second order Sigma-Delta modulator and a programmable comb filter. The second order Sigma-Delta modulator dramatically attenuates the baseband quantization noise energy (which in turn increases the resolution of the converter), since its superior amplifiers and comparators enable it to oversample and coarsely quantize the analog input signal at a very high sampling frequency of 12 MHz. The amplifiers are class AB OTAs, which have cross coupled NMOS driven input stages, and cascoded output stages. Also, the common mode voltages are the optimal biasing points, and these voltages are kept constant by a differential input stage, by a PV independent temperature dependent current generator, by optimal device size, and by a common mode feedback circuitry. The programmable comb filter receives the coarsely digitized 1-bit output of the modulator at oversampling frequency F.sub.S, and provides a more accurate representation of the input signal to the DSP at slower sampling rate of F.sub.S /N. In addition, the comb filter uses a 20-bit data path, in order to enable the decimator (which is formed by the comb filter and by the FIR filter) to provide 16 bits of resolution to the DSP. The output of the programmable comb filter is then supplied to an FIR filter which is realized in the DSP, and this filter removes the remaining out-of-baseband noise.
摘要翻译：一个“真正的”16位二阶Σ-Delta转换器，具有卓越的模拟分量，并具有耦合到数字信号处理器的可编程梳状滤波器。该转换器包括二阶Σ-Δ调制器和可编程梳状滤波器。第二级Σ-Δ调制器极大地衰减了基带量化噪声能量（这反过来又增加了转换器的分辨率），因为其优越的放大器和比较器能够以非常高的采样频率对模拟输入信号进行过采样和粗量化 12 MHz。放大器是AB类ABA，它们具有交叉耦合的NMOS驱动输入级和级联输出级。此外，共模电压是最佳偏置点，这些电压通过差分输入级，PV独立温度相关电流发生器，最佳器件尺寸以及共模反馈电路保持恒定。可编程梳状滤波器以过采样频率FS接收调制器的粗略数字化1位输出，并以较慢的FS / N采样速率向DSP提供更精确的输入信号表示。此外，梳状滤波器使用20位数据路径，以便使能由梳状滤波器和FIR滤波器形成的抽取器能够向DSP提供16位分辨率。然后将可编程梳状滤波器的输出提供给在DSP中实现的FIR滤波器，该滤波器去除剩余的基带外噪声。

7. 发明申请

US20120117348A1 TECHNIQUES FOR SECURITY MANAGEMENT PROVISIONING AT A DATA STORAGE DEVICE 有权
标题翻译：用于在数据存储设备上提供安全管理的技术
公开(公告)号：US20120117348A1
公开(公告)日：2012-05-10
申请号：US12941915
申请日：2010-11-08
申请人： Nicholas D. Triantafillou , Paritosh Saxena , Robert W. Strong , Richard J. Heiler , Eliezer Tamir , Simoni Ben-Michael , Brad W. Stewart , Akshay R. Kadam , Men Long , James T. Doyle , Hormuzd M. Khosravi , Lokpraveen B. Mosur , Edward J. Pullin , Paul S. Schmitz , Carol L. Barrett , Paul J. Thadikaran
发明人： Nicholas D. Triantafillou , Paritosh Saxena , Robert W. Strong , Richard J. Heiler , Eliezer Tamir , Simoni Ben-Michael , Brad W. Stewart , Akshay R. Kadam , Men Long , James T. Doyle , Hormuzd M. Khosravi , Lokpraveen B. Mosur , Edward J. Pullin , Paul S. Schmitz , Carol L. Barrett , Paul J. Thadikaran
IPC分类号： G06F12/14
CPC分类号： G06F21/566
摘要： Techniques for a data storage device to locally implement security management functionality. In an embodiment, a security management process of the data storage device is to determine whether an access to non-volatile media of the data storage device is authorized. In certain embodiments, the data storage device is to restrict access to a secure region of the non-volatile storage media, the secure region to store information used and/or generated by a security management process of the data storage device.
摘要翻译：用于数据存储设备本地实现安全管理功能的技术。在一个实施例中，数据存储设备的安全管理过程是确定对数据存储设备的非易失性介质的访问是否被授权。在某些实施例中，数据存储设备将限制对非易失性存储介质的安全区域的访问，该安全区域用于存储由数据存储设备的安全管理过程使用和/或生成的信息。

8. 发明申请

US20100164622A1 SINGLE-ENDED TO DIFFERENTIAL AMPLIFICATION AND PIPELINE ANALOG-TO-DIGITAL CONVERSION FOR DIGITALLY CONTROLLED DC-DC CONVERTERS 有权
标题翻译：用于数字控制DC-DC转换器的差分放大和管线模拟数字转换
公开(公告)号：US20100164622A1
公开(公告)日：2010-07-01
申请号：US12347081
申请日：2008-12-31
申请人： Fuding Ge , Brent D. Thomas , Malay Trivedi , James T. Doyle
发明人： Fuding Ge , Brent D. Thomas , Malay Trivedi , James T. Doyle
IPC分类号： H03F3/45
CPC分类号： H03F3/005 , H03F3/45475
摘要： Methods and systems to amplify and convert a single-ended analog signal to a differential signal and to convert the differential signal to a digital value, including to time-multiplex a plurality of windowed single-ended analog error signals, amplify a difference between the time-multiplexed analog signals, sample a corresponding amplified difference signal and an inverted amplified difference signal, amplify and center the samples about a common mode, and convert a corresponding amplified differential signal to digital values in a pipeline fashion. Bias adjustable features may be implemented to control a bandwidth, and clock rates may be adjustable to correspond to the bandwidth.
摘要翻译：将单端模拟信号放大并转换为差分信号并将差分信号转换为数字值的方法和系统，包括对多个窗口化的单端模拟误差信号进行时间复用，放大时间差多路复用模拟信号，对相应的放大差分信号和反相放大差分信号进行采样，对共模进行放大和中心采样，并以相应的方式将相应的放大差分信号转换为数字值。可以实施偏置可调特征以控制带宽，并且时钟速率可以是可调节的以对应于带宽。

9. 发明授权

US07498845B1 Power supply switching at circuit block level to reduce integrated circuit input leakage currents 有权
标题翻译：电源切换电路块级降低集成电路输入漏电流
公开(公告)号：US07498845B1
公开(公告)日：2009-03-03
申请号：US11880648
申请日：2007-07-23
申请人： James T. Doyle
发明人： James T. Doyle
IPC分类号： H03K19/096
CPC分类号： H03K19/00346 , H03K19/0941
摘要： Leakage currents at IC inputs can be avoided while the IC is disabled by providing a switch that is responsive to deactivation of an enable input to isolate functional circuitry of the IC from one of the power supply nodes of the IC. This eliminates power supply current while the IC is disabled. Further unwanted current flow can be avoided while the IC is disabled by providing a switch that is responsive to the enable input for selectively connecting and disconnecting the base of a reference voltage transistor to and from the transistor's grounded collector, which collector is defined by the substrate of the IC. Disconnection of the base from the grounded substrate/collector eliminates base current and thus prevents emitter-to-collector current flow through the transistor when the IC is disabled.
摘要翻译：可以通过提供响应于使能输入的去激活而将IC与IC的电源节点之一隔离的开关来禁用IC来禁止IC输入端的泄漏电流。这可以在IC禁用时消除电源电流。通过提供响应于使能输入的开关来禁用IC，可以避免IC的不需要的电流流动，该开关用于选择性地将参考电压晶体管的基极连接到晶体管的接地集电极和从晶体管的接地集电极断开，该集电极由衬底的IC。基极与接地的基板/集电极的断开消除了基极电流，因此当IC被禁用时，防止发射极到集电极电流流过晶体管。

10. 发明授权

US07493149B1 Method and system for minimizing power consumption in mobile devices using cooperative adaptive voltage and threshold scaling 有权
标题翻译：使用协作自适应电压和阈值缩放来最小化移动设备功耗的方法和系统
公开(公告)号：US07493149B1
公开(公告)日：2009-02-17
申请号：US10106428
申请日：2002-03-26
申请人： James T. Doyle , Dragan Maksimovic
发明人： James T. Doyle , Dragan Maksimovic
IPC分类号： H04M1/73
CPC分类号： G06F1/3203 , H04W52/0258 , Y02D70/142 , Y02D70/164
摘要： A method for minimizing power consumption in a mobile device using cooperative adaptive voltage and threshold scaling is provided that includes receiving a supply voltage, a PMOS back bias voltage, and an NMOS back bias voltage. A clock signal is received. The clock signal is propagated through a timing comparison circuit. An output of the timing comparison circuit is examined. A determination is made regarding whether to request more power based on the output of the timing comparison circuit. A voltage control signal is sent to request more power when a determination is made to request more power based on the output of the timing comparison circuit.
摘要翻译：提供一种使用协作自适应电压和阈值缩放来最小化移动设备中的功耗的方法，其包括接收电源电压，PMOS反向偏置电压和NMOS背置偏置电压。接收时钟信号。时钟信号通过定时比较电路传播。检查定时比较电路的输出。确定是否基于定时比较电路的输出请求更多的功率。当确定基于定时比较电路的输出请求更多功率时，发送电压控制信号以请求更多功率。

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