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    • 6. 发明授权
    • Stochastic reset circuit
    • 随机复位电路
    • US07265595B1
    • 2007-09-04
    • US11367139
    • 2006-03-03
    • Harold KutzTimothy WilliamsMorgan Whately
    • Harold KutzTimothy WilliamsMorgan Whately
    • H03L7/00
    • G11C7/20G11C5/143G11C8/10H03K17/223H03K2217/0036
    • In one embodiment, an integrated circuit device includes a power on reset (POR) circuit and a stochastic reset circuit configured to control enabling and disabling of the POR circuit. The stochastic reset circuit may have a value from among many possible values. The POR circuit may be enabled during a power up sequence of the device when the value of the stochastic reset during the power up is not a value designated to allow disabling of the POR circuit. The stochastic reset circuit may be configured such that the probability of the POR circuit being disabled during the power up is extremely low. After the power up sequence, the stochastic reset circuit may be controlled to allow disabling of the POR circuit to conserve power.
    • 在一个实施例中,集成电路器件包括上电复位(POR)电路和被配置为控制使能和禁止POR电路的随机复位电路。 随机复位电路可以具有许多可能值中的值。 当上电期间的随机复位值不是指定为允许禁止POR电路的值时,POR电路可以在器件的上电序列期间使能。 随机复位电路可以被配置为使得在上电期间POR电路被禁用的概率非常低。 在上电序列之后,可以控制随机复位电路以允许禁止POR电路以节省功率。
    • 9. 发明授权
    • Clocking analog components operating in a digital system
    • 在数字系统中运行的时钟模拟组件
    • US08299951B1
    • 2012-10-30
    • US13103862
    • 2011-05-09
    • Harold KutzTimothy Williams
    • Harold KutzTimothy Williams
    • H03M1/50
    • H03M1/0818H03M1/12H03M1/66
    • A system and method are provided for operating first and second components in first and second domains. In one embodiment, the method includes: generating a plurality of clock signals shifted relative to one another; operating a first component in a first domain using a first one of the plurality of clock signals; operating a second component in a second domain using a second one of the plurality of clock signals selected using a selection component; and comparing a present output of the second component to a stored value, determining whether a variation between the present output and the stored value is greater than a threshold, and, if the variation is greater than the threshold, using a controller to cause the selection component to select a third clock signal from the plurality of clock signals that is shifted relative to the second clock signal to drive the second component.
    • 提供了用于在第一和第二域中操作第一和第二组件的系统和方法。 在一个实施例中,该方法包括:产生相对于彼此移位的多个时钟信号; 使用所述多个时钟信号中的第一个来操作第一域中的第一分量; 使用使用选择部件选择的所述多个时钟信号中的第二个来操作第二域中的第二分量; 以及将所述第二分量的当前输出与存储值进行比较,确定所述当前输出和所述存储值之间的变化是否大于阈值,并且如果所述变化大于所述阈值,则使用控制器使所述选择 从相对于第二时钟信号偏移的多个时钟信号中选择第三时钟信号以驱动第二分量。
    • 10. 发明授权
    • Clocking analog components operating in a digital system
    • 在数字系统中运行的时钟模拟组件
    • US07940202B1
    • 2011-05-10
    • US12533772
    • 2009-07-31
    • Harold KutzTimothy Williams
    • Harold KutzTimothy Williams
    • H03M1/50
    • H03M1/0818H03M1/12H03M1/66
    • In one example, a clock generation component is configured to receive a master clock and generate a plurality of clock signals that are shifted relative to one another for a chip having an analog domain and a digital domain. A first selection component is configured to select a first one of the generated clock signals and drive the digital domain according to the first clock signal. A second selection component is configured to select a second one of the generated clock signals that is shifted relative to the first clock signal currently used to drive the digital domain for driving an analog component of the analog domain.
    • 在一个示例中,时钟生成部件被配置为接收主时钟并且生成相对于彼此偏移的多个时钟信号,用于具有模拟域和数字域的芯片。 第一选择部件被配置为选择所生成的时钟信号中的第一个,并根据第一时钟信号驱动数字域。 第二选择部件被配置为选择相对于当前用于驱动数字域的驱动模拟域的模拟分量的第一时钟信号移位的生成的时钟信号中的第二选择部件。