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1. 发明申请

US20080259070A1 ACTIVE LIQUID CRYSTAL DISPLAY DRIVERS AND DUTY CYCLE OPERATION 有权
标题翻译：主动液晶显示驱动器和占空比运行
公开(公告)号：US20080259070A1
公开(公告)日：2008-10-23
申请号：US11965520
申请日：2007-12-27
申请人： Warren Snyder , Harold Kutz , Timothy Williams , Bert Sullam , David Wright
发明人： Warren Snyder , Harold Kutz , Timothy Williams , Bert Sullam , David Wright
IPC分类号： G09G5/00
CPC分类号： H03K17/687 , H03K19/0016 , H03K19/00369
摘要： A liquid crystal display (LCD) driving system includes a reference voltage generator to generate a plurality of reference voltages. The LCD driving system also includes a plurality of drive buffers to generate drive voltages according to at least one of the reference voltages, and to drive at least a portion of a liquid crystal display to present data according to the drive voltages.
摘要翻译：液晶显示器（LCD）驱动系统包括用于产生多个参考电压的参考电压发生器。 LCD驱动系统还包括多个驱动缓冲器，以根据至少一个参考电压产生驱动电压，并且驱动至少一部分液晶显示器以根据驱动电压呈现数据。

2. 发明授权

US08686985B2 Active liquid crystal display drivers and duty cycle operation 有权
标题翻译：主动液晶显示驱动器和占空比操作
公开(公告)号：US08686985B2
公开(公告)日：2014-04-01
申请号：US11965520
申请日：2007-12-27
申请人： Warren Snyder , Harold Kutz , Timothy Williams , Bert Sullam , David Wright
发明人： Warren Snyder , Harold Kutz , Timothy Williams , Bert Sullam , David Wright
IPC分类号： G09G5/00
CPC分类号： H03K17/687 , H03K19/0016 , H03K19/00369
摘要： A liquid crystal display (LCD) driving system includes a reference voltage generator to generate a plurality of reference voltages. The LCD driving system also includes a plurality of drive buffers to generate drive voltages according to at least one of the reference voltages, and to drive at least a portion of a liquid crystal display to present data according to the drive voltages.
摘要翻译：液晶显示器（LCD）驱动系统包括用于产生多个参考电压的参考电压发生器。 LCD驱动系统还包括多个驱动缓冲器，以根据至少一个参考电压产生驱动电压，并且驱动至少一部分液晶显示器以根据驱动电压呈现数据。

3. 发明授权

US09612987B2 Dynamically reconfigurable analog routing circuits and methods for system on a chip 有权
公开(公告)号：US09612987B2
公开(公告)日：2017-04-04
申请号：US12776323
申请日：2010-05-07
申请人： Bert Sullam , Harold Kutz , Timothy Williams , James Shutt , Bruce E. Byrkett , Melany Ann Richmond , Nathan Kohagen , Mark Hastings , Eashwar Thiagarajan , Warren Snyder
发明人： Bert Sullam , Harold Kutz , Timothy Williams , James Shutt , Bruce E. Byrkett , Melany Ann Richmond , Nathan Kohagen , Mark Hastings , Eashwar Thiagarajan , Warren Snyder
IPC分类号： H04L12/50 , G06F13/40
CPC分类号： G06F13/4022 , G06F2213/0038
摘要： An integrated circuit device may include a reconfigurable analog signal switching fabric comprising a plurality of global buses that are selectively connected to external pins by pin connection circuits in response to changeable analog routing data, and a plurality of local buses that are selectively connected to analog blocks and/or global buses by routing connection circuits in response to the analog routing data; and at least one processor circuit that executes predetermined operations in response to instruction data.

4. 发明授权

US08601254B1 Configurable reset pin for input/output port 有权
标题翻译：可配置的输入/输出端口复位引脚
公开(公告)号：US08601254B1
公开(公告)日：2013-12-03
申请号：US12759426
申请日：2010-04-13
申请人： Harold Kutz , Timothy Williams , Bert Sullam , Robert W. Metzler , Craig Nemecek , Eric Blom , Melany Richmond , Warren Snyder , David G. Wright , Jeffrey Erickson , Greg Verge
发明人： Harold Kutz , Timothy Williams , Bert Sullam , Robert W. Metzler , Craig Nemecek , Eric Blom , Melany Richmond , Warren Snyder , David G. Wright , Jeffrey Erickson , Greg Verge
IPC分类号： G06F1/24 , H03K19/173
CPC分类号： G06F1/24 , H03K19/018585 , H03K19/018592 , H03K19/1732
摘要： A programmable system includes an input/output (I/O) pin that is configurable into multiple operational states. The programmable system further includes a memory device to store configuration data that, when provided to the I/O pin, causes the I/O pin to reconfigure into one of the operational states. When power is supplied to the system, the memory device is configured to provide the configuration data to the I/O pin prior to a system microcontroller becoming operational responsive to the power.
摘要翻译：可编程系统包括可配置为多种工作状态的输入/输出（I / O）引脚。可编程系统还包括存储器件，用于存储当提供给I / O引脚时使I / O引脚重新配置为其中一个操作状态的配置数据。当向系统供电时，存储器件被配置为在系统微控制器响应于电力而变得可操作之前将配置数据提供给I / O引脚。

5. 发明申请

US20110026519A1 DYNAMICALLY RECONFIGURABLE ANALOG ROUTING CIRCUITS AND METHODS FOR SYSTEM ON A CHIP 有权
标题翻译：动态系统的动态可重构模拟路由电路及方法
公开(公告)号：US20110026519A1
公开(公告)日：2011-02-03
申请号：US12776323
申请日：2010-05-07
申请人： Bert Sullam , Harold Kutz , Timothy Williams , James Shutt , Bruce E. Byrkett , Melany Ann Richmond , Nathan Kohagen , Mark Hastings , Eashwar Thiagarajan , Warren Snyder
发明人： Bert Sullam , Harold Kutz , Timothy Williams , James Shutt , Bruce E. Byrkett , Melany Ann Richmond , Nathan Kohagen , Mark Hastings , Eashwar Thiagarajan , Warren Snyder
IPC分类号： H04L12/50
CPC分类号： G06F13/4022 , G06F2213/0038
摘要： An integrated circuit device may include a reconfigurable analog signal switching fabric comprising a plurality of global buses that are selectively connected to external pins by pin connection circuits in response to changeable analog routing data, and a plurality of local buses that are selectively connected to analog blocks and/or global buses by routing connection circuits in response to the analog routing data; and at least one processor circuit that executes predetermined operations in response to instruction data.
摘要翻译：集成电路装置可以包括可重新配置的模拟信号交换结构，其包括响应于可变模拟路由数据而被引脚连接电路选择性地连接到外部引脚的多个全局总线，以及选择性地连接到模拟块的多个局部总线和/或全局总线，通过响应于模拟路由数据路由连接电路; 以及响应于指令数据执行预定操作的至少一个处理器电路。

6. 发明授权

US08441298B1 Analog bus sharing using transmission gates 有权
标题翻译：使用传输门的模拟总线共享
公开(公告)号：US08441298B1
公开(公告)日：2013-05-14
申请号：US12496579
申请日：2009-07-01
申请人： Timothy Williams , David G. Wright , Harold Kutz , Eashwar Thiagarajan , Warren Snyder , Mark E. Hastings
发明人： Timothy Williams , David G. Wright , Harold Kutz , Eashwar Thiagarajan , Warren Snyder , Mark E. Hastings
IPC分类号： H03L5/00 , H01L25/00
CPC分类号： G06F13/4022 , H03K19/1732
摘要： In one example, a chip includes an integrated analog component configured to communicate over an internal analog bus of the chip. A plurality of I/O pads located on the chip is configured to provide a connected device access to the integrated analog component. A plurality of transmission gates configured to selectively connect the I/O pads to a bus line of the analog bus.
摘要翻译：在一个示例中，芯片包括被配置为通过芯片的内部模拟总线进行通信的集成模拟组件。位于芯片上的多个I / O焊盘被配置为提供连接的器件对集成模拟部件的访问。多个传输门被配置为选择性地将I / O焊盘连接到模拟总线的总线。

7. 发明授权

US08217700B1 Multifunction input/output circuit 有权
标题翻译：多功能输入/输出电路
公开(公告)号：US08217700B1
公开(公告)日：2012-07-10
申请号：US12496590
申请日：2009-07-01
申请人： Timothy Williams , Harold Kutz , Warren Snyder , David G. Wright
发明人： Timothy Williams , Harold Kutz , Warren Snyder , David G. Wright
IPC分类号： H03L5/00
CPC分类号： H03K19/1732
摘要： In one example, a chip includes integrated components configured to operate in the digital domain and the analog domain. An I/O pad located on the chip is configured to provide an external device access to the integrated components. A multifunction I/O interface cell between the I/O pad and the integrated components is configured to selectively connect different combinations of the components to the same I/O pad at different times. The multifunction I/O interface cell may include a first switching device connected to ground, a second switching device connected to a reference voltage, an analog input/output buffer, and a digital input/output buffer.
摘要翻译：在一个示例中，芯片包括被配置为在数字域和模拟域中操作的集成组件。位于芯片上的I / O焊盘被配置为提供对集成部件的外部设备访问。 I / O焊盘和集成组件之间的多功能I / O接口单元被配置为在不同时间有选择地将组件的不同组合连接到相同的I / O焊盘。多功能I / O接口单元可以包括连接到地的第一开关器件，连接到参考电压的第二开关器件，模拟输入/输出缓冲器和数字输入/输出缓冲器。

8. 发明授权

US07089133B1 Method and circuit for providing a system level reset function for an electronic device 有权
标题翻译：为电子设备提供系统电平复位功能的方法和电路
公开(公告)号：US07089133B1
公开(公告)日：2006-08-08
申请号：US10942523
申请日：2004-09-15
申请人： Timothy Williams , Harold Kutz , Eric Blom , Warren Snyder
发明人： Timothy Williams , Harold Kutz , Eric Blom , Warren Snyder
IPC分类号： G06F19/00 , G06F1/24
CPC分类号： G06F1/24
摘要： A method and circuit provide a system level reset function for an electronic device. An initial reset function is provided under a low voltage condition of supply voltage, such as occur upon first energizing the electronic device. A tunable reset function is also provided, which can first be asserted at a voltage level setting less precise than that setting becomes upon tuning. Further, a boot-up reset function is provided, which provides its reset function at a voltage level setting that is set according to a calibration. Calibration can be based on data stored in a non-volatile memory, and can involve a checksum operation. The electronic device, a microcontroller for instance, is held in a reset state with any of the initial, tunable, and boot-up reset functions.
摘要翻译：方法和电路为电子设备提供系统级复位功能。在电源电压的低电压条件下提供初始复位功能，例如在电子设备首次通电时发生。还提供了可调谐复位功能，其可以首先在比调谐时设置的精度低的电压电平设置下被断言。此外，提供启动复位功能，其提供其按照校准设置的电压电平设置的复位功能。校准可以基于存储在非易失性存储器中的数据，并且可以涉及校验和操作。例如，电子设备（例如微控制器）被保持在具有任何初始，可调谐和启动复位功能的复位状态。

9. 发明授权

US08026739B2 System level interconnect with programmable switching 有权
标题翻译：系统级互连与可编程切换
公开(公告)号：US08026739B2
公开(公告)日：2011-09-27
申请号：US11965677
申请日：2007-12-27
申请人： Bert Sullam , Warren Snyder , Haneef Mohammed
发明人： Bert Sullam , Warren Snyder , Haneef Mohammed
IPC分类号： G06F7/38 , H03K19/177
CPC分类号： H03K19/17744 , H03K19/173 , H03K19/177 , H03K19/17704 , H03K19/1776
摘要： Different functional elements are all located on a same integrated circuit wherein at least one of the functional elements comprises a micro-controller. Configuration registers or configuration memory in the integrated circuit store configuration values loaded by the micro-controller. Connectors are configured to connect the integrated circuit to external signals. A system level interconnect also located in the integrated circuit programmably connects together the different functional elements and different connectors according to the configuration values loaded into the configuration registers.
摘要翻译：不同的功能元件都位于相同的集成电路中，其中至少一个功能元件包括微控制器。集成电路中的配置寄存器或配置存储器存储由微控制器加载的配置值。连接器配置为将集成电路连接到外部信号。位于集成电路中的系统级互连可根据加载到配置寄存器中的配置值可编程地将不同功能元件和不同连接器连接在一起。

10. 发明申请

US20080258759A1 UNIVERSAL DIGITAL BLOCK INTERCONNECTION AND CHANNEL ROUTING 有权
标题翻译：通用数字块互连和通道路由
公开(公告)号：US20080258759A1
公开(公告)日：2008-10-23
申请号：US11965291
申请日：2007-12-27
申请人： Warren Snyder , Bert Sullam , Haneef Mohammed
发明人： Warren Snyder , Bert Sullam , Haneef Mohammed
IPC分类号： H03K19/173
CPC分类号： G06F13/28 , G06F13/4009 , H03K19/177
摘要： A programmable routing scheme provides improved connectivity both between Universal Digital Blocks (UDBs) and between the UDBs and other micro-controller elements, peripherals and external Inputs and Outputs (I/Os) in the same Integrated Circuit (IC). The routing scheme increases the number of functions, flexibility, and the overall routing efficiency for programmable architectures. The UDBs can be grouped in pairs and share associated horizontal routing channels. Bidirectional horizontal and vertical segmentation elements extend routing both horizontally and vertically between different UDB pairs and to the other peripherals and I/O.
摘要翻译：可编程路由方案提供通用数字模块（UDB）之间以及UDB与其他微控制器元件，外设和同一集成电路（IC）中的外部输入和输出（I / O）之间的改进连接。路由方案增加了可编程架构的功能数量，灵活性和总体布线效率。 UDB可以成对分组并共享相关的水平路由信道。双向水平和垂直分割元素在不同的UDB对之间和其他外围设备和I / O之间水平和垂直扩展路由。

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