专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US06624496B2 Method of forming T-shaped isolation layer, method of forming elevated salicide source/drain region using the same, and semiconductor device having T-shaped isolation layer 有权
公开(公告)号：US06624496B2
公开(公告)日：2003-09-23
申请号：US10044991
申请日：2002-01-15
申请人： Ja-Hum Ku , Dong-Ho Ahn , Chul-Sung Kim , Jae-Yoon Yoo , Sug-Hun Hong , Chul-Joon Choi
发明人： Ja-Hum Ku , Dong-Ho Ahn , Chul-Sung Kim , Jae-Yoon Yoo , Sug-Hun Hong , Chul-Joon Choi
IPC分类号： H01L2176
CPC分类号： H01L29/66598 , H01L21/28518 , H01L21/76232 , H01L21/823481 , H01L29/41783 , H01L29/665 , H01L29/66636
摘要： A method of forming a T-shaped isolation layer, a method of forming an elevated salicide source/drain region using the same, and a semiconductor device having the T-shaped isolation layer are provided. In the method of forming the T-shaped isolation layer, an isolation layer having a narrow trench region in the lower portion thereof and a wide trench region in the upper portion thereof is formed on a semiconductor substrate. Also, in the method of forming the elevated salicide source/drain region, the method of forming the T-shaped isolation layer is used. In particular, conductive impurities can also be implanted into the lower portion of the wide trench region which constitutes the head of the T-shaped isolation layer and is extended to both sides from the upper end of the narrow trench region by controlling the depth of the wide trench region in an ion implantation step for forming the source/drain region.

2. 发明申请

US20170084834A1 VARIABLE RESISTANCE MATERIAL LAYERS AND VARIABLE RESISTANCE MEMORY DEVICES INCLUDING THE SAME 审中-公开
公开(公告)号：US20170084834A1
公开(公告)日：2017-03-23
申请号：US15366893
申请日：2016-12-01
申请人： Do-Hyung Kim , Jong-Uk Kim , Dong-Ho Ahn , Sung-Lae Cho
发明人： Do-Hyung Kim , Jong-Uk Kim , Dong-Ho Ahn , Sung-Lae Cho
IPC分类号： H01L45/00 , C01B19/00 , H01L27/24
摘要： A variable resistance material layer including germanium (Ge), antimony (Sb), tellurium (Te), and at least one type of impurities X. The variable resistance material layer having a composition represented by a chemical formula of Xp(GeaSb(1-a-b)Teb)(1-p), wherein an atomic concentration of the impurities X is in a range of 0

3. 发明授权

US08039297B2 Plasma treating methods of fabricating phase change memory devices, and memory devices so fabricated 有权
标题翻译：制造相变存储器件的等离子体处理方法以及如此制造的存储器件
公开(公告)号：US08039297B2
公开(公告)日：2011-10-18
申请号：US12487292
申请日：2009-06-18
申请人： Young-Kuk Kim , Mi-Lim Park , Dong-Ho Ahn
发明人： Young-Kuk Kim , Mi-Lim Park , Dong-Ho Ahn
IPC分类号： H01L21/06 , H01L21/00
CPC分类号： H01L45/126 , H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/1641 , H01L45/1683
摘要： Phase change memory devices may be fabricated by forming a first electrode on a substrate and forming a chalcogenide material on the first electrode. The chalcogenide material is plasma treated sufficiently to induce a plasma species throughout the chalcogenide material. A second electrode is formed on the chalcogenide material. Related devices are also described.
摘要翻译：可以通过在衬底上形成第一电极并在第一电极上形成硫族化物材料来制造相变存储器件。硫族化物材料被充分等离子体处理以在整个硫族化物材料中诱导血浆物质。在硫族化物材料上形成第二电极。还描述了相关设备。

4. 发明授权

US08021977B2 Methods of forming contact structures and semiconductor devices fabricated using contact structures 有权
标题翻译：形成接触结构的方法和使用接触结构制造的半导体器件
公开(公告)号：US08021977B2
公开(公告)日：2011-09-20
申请号：US12627810
申请日：2009-11-30
申请人： Young-Lim Park , Hyeong-Geun An , Gyu-Hwan Oh , Dong-Ho Ahn , Jin-Il Lee
发明人： Young-Lim Park , Hyeong-Geun An , Gyu-Hwan Oh , Dong-Ho Ahn , Jin-Il Lee
IPC分类号： H01L21/4763 , H01L21/768
CPC分类号： H01L21/76816 , H01L27/24
摘要： Provided are methods of forming contact structures and semiconductor devices fabricated using the contact structures. The formation of a contact structure can include forming a first molding pattern on a substrate, forming an insulating layer to cover at least a sidewall of the first molding pattern, forming a second molding pattern to cover a sidewall of the insulating layer and spaced apart from the first molding pattern, removing a portion of the insulating layer between the first and second molding patterns to form a hole, and forming an insulating pattern between the first and second molding patterns, and forming a contact pattern in the hole.
摘要翻译：提供了形成使用接触结构制造的接触结构和半导体器件的方法。接触结构的形成可以包括在基底上形成第一模制图案，形成绝缘层以覆盖至少第一模制图案的侧壁，形成第二模制图案以覆盖绝缘层的侧壁并与第一模制图案，去除第一和第二模制图案之间的绝缘层的一部分以形成孔，并且在第一和第二模制图案之间形成绝缘图案，并在孔中形成接触图案。

5. 发明授权

US07112849B2 Method of preventing semiconductor layers from bending and semiconductor device formed thereby 有权
标题翻译：防止半导体层弯曲的方法和由此形成的半导体器件
公开(公告)号：US07112849B2
公开(公告)日：2006-09-26
申请号：US11059884
申请日：2005-02-17
申请人： Dong-Ho Ahn , Ho-Kyu Kang , Geum-Jong Bae
发明人： Dong-Ho Ahn , Ho-Kyu Kang , Geum-Jong Bae
IPC分类号： H01L27/01
CPC分类号： H01L21/76235 , H01L21/02238 , H01L21/02255 , H01L21/31662 , H01L21/76264 , H01L21/76283 , H01L27/1203
摘要： Disclosed herein are various methods for preventing bending of a patterned SOI layer during trench sidewall oxidation, the methods comprising providing a patterned SOI layer having at least one trench, said patterned SOI layer disposed upon an underlying buried silicon oxide layer; and blocking diffusion of oxygen between said patterned SOI and buried silicon oxide layer.
摘要翻译：本文公开了用于在沟槽侧壁氧化期间防止图案化SOI层弯曲的各种方法，所述方法包括提供具有至少一个沟槽的图案化SOI层，所述图案化SOI层设置在下面的掩埋氧化硅层上; 并阻止氧在所述图案化SOI和掩埋氧化硅层之间的扩散。

6. 发明授权

US06988707B2 Anti-lock brake equipment solenoid valve 失效
标题翻译：防抱死制动设备电磁阀
公开(公告)号：US06988707B2
公开(公告)日：2006-01-24
申请号：US10322733
申请日：2002-12-19
申请人： Dong-Ho Ahn
发明人： Dong-Ho Ahn
IPC分类号： B60T8/36
CPC分类号： F16K31/0658 , B60T8/363
摘要： An oil pressure control valve for an Anti-Lock Braking System (ABS) includes a modulator block comprising at least an inlet port, a discharge port, and a receiving unit. The control valve also comprises an armature, a coil body, and a housing. The housing includes at least a coupling hole to receive a valve seat, which comprises at least a filter and a seal cup on its outer periphery. When the coil body is energized, a plunger performs a reciprocating motion in which a projection of the plunger moves into contact with and separates from an opening in the valve seat to adjust fluid flow to the discharge port. A region encompassing the discharge port includes at least the aperture and the projection.
摘要翻译：用于防抱死制动系统（ABS）的油压控制阀包括至少包括入口端口，排放口和接收单元的调制器块。控制阀还包括电枢，线圈体和壳体。壳体至少包括一个用于容纳阀座的联接孔，该阀座至少包括一个过滤器和一个在其外周上的密封杯。当线圈体通电时，柱塞执行往复运动，其中柱塞的突起与阀座中的开口接触并分离，以调节流体到排出口的流体。包围排出口的区域至少包括孔和突起。

7. 发明申请

US20100051893A1 PLASMA TREATING METHODS OF FABRICATING PHASE CHANGE MEMORY DEVICES, AND MEMORY DEVICES SO FABRICATED 有权
标题翻译：制造相变存储器件的等离子体处理方法，以及制造的存储器件
公开(公告)号：US20100051893A1
公开(公告)日：2010-03-04
申请号：US12487292
申请日：2009-06-18
申请人： Young-Kuk Kim , Mi-Lim Park , Dong-Ho Ahn
发明人： Young-Kuk Kim , Mi-Lim Park , Dong-Ho Ahn
IPC分类号： H01L47/00
CPC分类号： H01L45/126 , H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/1641 , H01L45/1683
摘要： Phase change memory devices may be fabricated by forming a first electrode on a substrate and forming a chalcogenide material on the first electrode. The chalcogenide material is plasma treated sufficiently to induce a plasma species throughout the chalcogenide material. A second electrode is formed on the chalcogenide material. Related devices are also described.
摘要翻译：可以通过在衬底上形成第一电极并在第一电极上形成硫族化物材料来制造相变存储器件。硫族化物材料被充分等离子体处理以在整个硫族化物材料中诱导血浆物质。在硫族化物材料上形成第二电极。还描述了相关设备。

8. 发明授权

US07638788B2 Phase change memory device and method of forming the same 有权
标题翻译：相变存储器件及其形成方法
公开(公告)号：US07638788B2
公开(公告)日：2009-12-29
申请号：US11974774
申请日：2007-10-16
申请人： Dong-Ho Ahn , Hideki Horii , Jong-Chan Shin , Jun-Soo Bae , Hyeong-Geun An
发明人： Dong-Ho Ahn , Hideki Horii , Jong-Chan Shin , Jun-Soo Bae , Hyeong-Geun An
IPC分类号： H01L29/04
CPC分类号： H01L45/143 , H01L27/2409 , H01L27/2472 , H01L45/06 , H01L45/1226 , H01L45/1293 , H01L45/144 , H01L45/148 , H01L45/1675 , Y10S438/90
摘要： Provided are a phase change memory device and a method of forming the same. According to the phase change memory, a first plug electrode and a second plug electrode are spaced apart from each other in a mold insulating layer. A phase change pattern is disposed on the mold insulating layer. The phase change pattern contacts a top of the first plug electrode and a first potion of a top of the second plug electrode. An interconnection is electrically connected to a second portion of the top of the second plug electrode.
摘要翻译：提供了一种相变存储器件及其形成方法。根据相变存储器，第一插头电极和第二插头电极在模具绝缘层中彼此间隔开。相变图案设置在模具绝缘层上。相变图案接触第一插头电极的顶部和第二插头电极的顶部的第一部分。互连电连接到第二插头电极的顶部的第二部分。

9. 发明申请

US20090017577A1 Methods of Forming Phase Change Memory Devices Having Bottom Electrodes 有权
标题翻译：形成具有底部电极的相变存储器件的方法
公开(公告)号：US20090017577A1
公开(公告)日：2009-01-15
申请号：US12170038
申请日：2008-07-09
申请人： Hyeong-Geun An , Dong-Ho Ahn , Young-Soo Lim , Yong-Ho Ha , Jun-Young Jang , Dong-Won Lim , Gyeo-Re Lee , Joon-Sang Park , Han-Bong Ko , Young-Lim Park
发明人： Hyeong-Geun An , Dong-Ho Ahn , Young-Soo Lim , Yong-Ho Ha , Jun-Young Jang , Dong-Won Lim , Gyeo-Re Lee , Joon-Sang Park , Han-Bong Ko , Young-Lim Park
IPC分类号： H01L45/00
CPC分类号： H01L45/1253 , H01L27/2409 , H01L27/2436 , H01L27/2472 , H01L45/06 , H01L45/1233 , H01L45/1273 , H01L45/141 , H01L45/16 , Y10S438/90
摘要： Phase change memory devices can have bottom patterns on a substrate. Line-shaped or L-shaped bottom electrodes can be formed in contact with respective bottom patterns on a substrate and to have top surfaces defined by dimensions in x and y axes directions on the substrate. The dimension along the x-axis of the top surface of the bottom electrodes has less width than a resolution limit of a photolithography process used to fabricate the phase change memory device. Phase change patterns can be formed in contact with the top surface of the bottom electrodes to have a greater width than each of the dimensions in the x and y axes directions of the top surface of the bottom electrodes and top electrodes can be formed on the phase change patterns, wherein the line shape or the L shape represents a sectional line shape or a sectional L shape of the bottom electrodes in the x-axis direction.
摘要翻译：相变存储器件可以在衬底上具有底部图案。线形或L形底部电极可以形成为与衬底上的相应底部图案接触并且具有由衬底上沿x和y轴方向的尺寸限定的顶表面。沿着底部电极的顶表面的x轴的尺寸比用于制造相变存储器件的光刻工艺的分辨率极限具有更小的宽度。相变图案可以形成为与底部电极的顶表面接触以具有比底部电极的顶表面的x和y轴方向上的每个尺寸更大的宽度，并且顶部电极可以形成在相位上其中线形或L形表示底部电极在x轴方向上的截面线形状或截面L形。

10. 发明申请

US20060113573A1 Phase change memory cell with transparent conducting oxide for electrode contact layer 有权
标题翻译：具有用于电极接触层的透明导电氧化物的相变存储单元
公开(公告)号：US20060113573A1
公开(公告)日：2006-06-01
申请号：US11290712
申请日：2005-11-29
申请人： Byung-ki Cheong , Jeung-hyun Jeong , Dao-Hwan Kang , Taek Sung Lee , In Ho Kim , Kyeong Seok Lee , Won Mok Kim , Dong-Ho Ahn , Ki-Burn Kim
发明人： Byung-ki Cheong , Jeung-hyun Jeong , Dao-Hwan Kang , Taek Sung Lee , In Ho Kim , Kyeong Seok Lee , Won Mok Kim , Dong-Ho Ahn , Ki-Burn Kim
IPC分类号： H01L29/768
CPC分类号： H01L45/06 , H01L45/1233 , H01L45/1253 , H01L45/126 , H01L45/144
摘要： The present invention provides a non-volatile phase change memory cell containing an electrode contact layer disposed between a metal electrode layer and a phase change material layer, the electrode contact layer being formed of a transparent conducting oxide-based material which has a high electric conductivity, a low thermal conductivity and a good thermal stability. A non-volatile phase change memory cell according to the present invention may be utilized to reduce the electric power needed for reset and set operation.
摘要翻译：本发明提供了一种非易失性相变存储单元，其包含设置在金属电极层和相变材料层之间的电极接触层，电极接触层由透明导电氧化物基材料形成，该材料具有高导电性，导热性低，热稳定性好。可以使用根据本发明的非易失性相变存储器单元来减少复位和设置操作所需的电力。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式