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1. 发明授权

US09577581B2 Signal amplifier with active power management 有权
标题翻译：具有有源电源管理的信号放大器
公开(公告)号：US09577581B2
公开(公告)日：2017-02-21
申请号：US13996035
申请日：2012-04-19
申请人： Nicholas P. Cowley , Isaac Ali , William L. Barber
发明人： Nicholas P. Cowley , Isaac Ali , William L. Barber
IPC分类号： H01Q11/12 , H03F1/02 , H03F1/32 , H03F3/195 , H03F3/24 , H04L25/02 , H04L27/36 , H03G3/30
CPC分类号： H03F1/0227 , H03F1/3241 , H03F3/195 , H03F3/245 , H03F2200/09 , H03F2200/102 , H03F2200/333 , H03F2200/411 , H03F2200/504 , H03F2200/541 , H03G3/30 , H04L25/0264 , H04L25/0272 , H04L27/361
摘要： A system for amplifying a signal with active power management according to one embodiment includes a first digital to analog converter (DAC) circuit configured to provide a modulated carrier signal; a amplifier circuit coupled to the first DAC, where the amplifier circuit is configured to amplify the modulated carrier signal; an output stage circuit coupled to the amplifier circuit, where the output stage circuit is configured to provide the amplified signal to a network; a second DAC circuit configured to provide a full wave rectified envelope of the modulated carrier signal; and a switching regulator circuit including a voltage reference input coupled to the second DAC circuit, where the switching regulator circuit is configured to provide a supply voltage to the output stage circuit and the supply voltage is modulated in response to the envelope received at the voltage reference input.
摘要翻译：根据一个实施例的用于放大具有有功功率管理的信号的系统包括被配置为提供调制载波信号的第一数模转换器（DAC）电路; 耦合到所述第一DAC的放大器电路，其中所述放大器电路被配置为放大所述经调制的载波信号; 耦合到放大器电路的输出级电路，其中输出级电路被配置为向网络提供放大的信号; 第二DAC电路，被配置为提供调制载波信号的全波整流包络; 以及开关调节器电路，其包括耦合到所述第二DAC电路的电压参考输入，其中所述开关调节器电路被配置为向所述输出级电路提供电源电压，并且响应于在所述参考电压处接收到的信封来调制所述电源电压输入。

2. 发明授权

US08736480B1 Successive approximation analog-to-digital conversion architectural arrangement for receivers 有权
标题翻译：用于接收机的连续近似模数转换架构布置
公开(公告)号：US08736480B1
公开(公告)日：2014-05-27
申请号：US13739510
申请日：2013-01-11
申请人： Nicholas P. Cowley , Isaac Ali , Viatcheslav I. Suetinov , Keith Pinson
发明人： Nicholas P. Cowley , Isaac Ali , Viatcheslav I. Suetinov , Keith Pinson
IPC分类号： H03M1/12
CPC分类号： H03M1/0626 , H03M1/466
摘要： An apparatus and method of successive approximation analog-to-digital conversion for receivers comprising that during a sample mode, connecting an array of capacitors to a plurality of sampling switches coupled to a plurality of amplified input signals, and during a conversion mode, connecting in common the array of capacitors to a comparator and isolating the array of capacitors from the plurality of sampling switches. Additionally, filtering is done by the summation of samples at phase offsets.
摘要翻译：一种用于接收机的逐次逼近模数转换的装置和方法，包括在采样模式期间，将电容器阵列连接到耦合到多个放大输入信号的多个采样开关，并且在转换模式期间，连接到将电容器阵列与比较器共用，并将电容器阵列与多个采样开关隔离。另外，通过相位偏移处的样本的求和来进行滤波。

3. 发明授权

US08611467B2 DC offset correction techniques 失效
标题翻译：直流偏移校正技术
公开(公告)号：US08611467B2
公开(公告)日：2013-12-17
申请号：US12790344
申请日：2010-05-28
申请人： Isaac Ali , Nicholas P. Cowley
发明人： Isaac Ali , Nicholas P. Cowley
IPC分类号： H04L25/06
CPC分类号： H04L25/061 , H04B1/30 , H04B2001/305 , H04L27/3863
摘要： Techniques are disclosed that involve the reduction of DC offsets. For instance, embodiments may receive a baseband signal, and determine a DC characteristic of the baseband signal. When the DC characteristic has a value that is outside of a predetermined range, a correction signal is adjusted. The correction signal is injected into the baseband signal.
摘要翻译：公开了涉及DC偏移减少的技术。例如，实施例可以接收基带信号，并确定基带信号的DC特性。当DC特性具有超出预定范围的值时，调整校正信号。校正信号被注入到基带信号中。

4. 发明授权

US08301102B2 Correcting quadrature crosstalk contamination in receivers 有权
标题翻译：纠正接收机中的正交串扰污染
公开(公告)号：US08301102B2
公开(公告)日：2012-10-30
申请号：US12646513
申请日：2009-12-23
申请人： Isaac Ali , Nicholas P. Cowley
发明人： Isaac Ali , Nicholas P. Cowley
IPC分类号： H04B1/00
CPC分类号： H04B1/28 , H04L27/3863
摘要： An apparatus, a method and a system for correcting a phase imbalance are described. Embodiments may measure the phase imbalance inherent in a tuner and use the imbalance measure to correct the output of the tuner. Embodiments may include a tone generator to produce a single frequency tone and a tuner to receive the single frequency tone and output an intermediate frequency. The intermediate frequency may be corrected by a correction loop. Other embodiments are described and claimed.
摘要翻译：描述了用于校正相位不平衡的装置，方法和系统。实施例可以测量调谐器固有的相位不平衡，并使用不平衡度量来校正调谐器的输出。实施例可以包括产生单个频率音调的音调发生器和用于接收单个频率音调并输出中频的调谐器。中间频率可以通过校正回路来校正。描述和要求保护其他实施例。

5. 发明授权

US09343963B2 Dual mode voltage regulator with dynamic reconfiguration capability 有权
标题翻译：具有动态重新配置功能的双模式稳压器
公开(公告)号：US09343963B2
公开(公告)日：2016-05-17
申请号：US13994810
申请日：2011-12-22
申请人： Nicholas P. Cowley , Andrew D. Talbot , Isaac Ali , Keith Pinson , Colin L. Perry , Matthew T. Aitken , Chi Man Kan , Mark S. Mudd , Stephen J. Spinks , Alan J. Martin , William L. Barber
发明人： Nicholas P. Cowley , Andrew D. Talbot , Isaac Ali , Keith Pinson , Colin L. Perry , Matthew T. Aitken , Chi Man Kan , Mark S. Mudd , Stephen J. Spinks , Alan J. Martin , William L. Barber
IPC分类号： H02M3/156 , G05F1/46 , H02M3/158 , H02M1/00
CPC分类号： H02M3/156 , G05F1/46 , H02M3/158 , H02M2001/0045
摘要： A dual mode voltage regulator according to one embodiment includes a passive regulator circuit; a switching regulator circuit; and a controller circuit configured to monitor operational parameters of the dual mode voltage regulator and selectively couple either the passive regulator circuit or the switching regulator circuit between an input voltage port and an output load. The selective coupling is based on the monitoring of parameters including current through the output load, voltage at the input voltage port and voltage at the output load as well as the availability of a system clock signal.
摘要翻译：根据一个实施例的双模式电压调节器包括无源调节器电路; 开关稳压电路; 以及控制器电路，被配置为监视双模式电压调节器的操作参数，并且在输入电压端口和输出负载之间选择性地耦合无源调节器电路或开关调节器电路。选择耦合是基于对参数的监视，包括输出负载的电流，输入电压端口的电压和输出负载的电压以及系统时钟信号的可用性。

6. 发明授权

US09054720B2 System, apparatus and method to improve analog-to-digital converter output 有权
标题翻译：提高模数转换器输出的系统，装置和方法
公开(公告)号：US09054720B2
公开(公告)日：2015-06-09
申请号：US13976329
申请日：2012-04-19
申请人： Nicholas P. Cowley , Isaac Ali
发明人： Nicholas P. Cowley , Isaac Ali
IPC分类号： H03M1/06 , H03M1/08 , H03M1/10 , H03M1/00 , H03M1/12
CPC分类号： H03M1/08 , H03M1/00 , H03M1/0695 , H03M1/1028 , H03M1/12 , H03M1/1215
摘要： According to various embodiments, a system, an apparatus and a method are presented that relate to determining and correcting signal imbalances between output samples of an analog-to-digital (A-D) converter array (that may be implemented as part of a wideband ADC). A statistic module and correction module are associated with the A-D converter array. The statistic module is configured to receive digital samples from the plurality of A-D converters, and generate a statistical sample value for each A-D converter using a set of digital samples received therefrom. The correction module is configured to, for at least one of the plurality of A-D converters, determine an offset value by comparing the statistical sample value for the at least one of the plurality of A-D converters with a reference value, and apply the offset value to a digital sample from that at least one A-D converter to generate a corrected digital sample.
摘要翻译：根据各种实施例，提出了一种涉及确定和校正模数（AD）转换器阵列（可被实现为宽带ADC的一部分）的输出采样之间的信号不平衡的系统，装置和方法，。统计模块和校正模块与A-D转换器阵列相关联。统计模块被配置为从多个A-D转换器接收数字样本，并且使用从其接收的一组数字样本为每个A-D转换器生成统计采样值。校正模块被配置为，对于多个AD转换器中的至少一个，通过将多个AD转换器中的至少一个AD转换器的统计采样值与参考值进行比较来确定偏移值，并将偏移值应用于来自该至少一个AD转换器的数字样本以产生经校正的数字样本。

7. 发明授权

US08823568B2 Methods and arrangements for high-speed digital-to-analog conversion 有权
标题翻译：高速数模转换的方法和布置
公开(公告)号：US08823568B2
公开(公告)日：2014-09-02
申请号：US13631858
申请日：2012-09-28
申请人： Nicholas P. Cowley , Isaac Ali
发明人： Nicholas P. Cowley , Isaac Ali
IPC分类号： H03M1/66
CPC分类号： H03M1/662
摘要： Embodiments may comprise logic such as hardware and/or code for high-speed digital-to-analog conversion of signals. Many embodiments comprise a demultiplexer to distribute sets of bits to digital-to-analog converters, the digital-to-analog converters to receive the sets of bits and the operate concurrently to convert the sets of bits from digital representations of signal segments to output analog signal segments, and an interleaver to interleave the analog signal segments from each of digital-to-analog converters in the sequence to generate an analog signal. In many embodiments, the interleaver is adapted to interleave the analog signal segments by latching magnitudes of each of the analog signal segments to an interleaved output near ends of clock cycles to attenuate non-linearities in the magnitudes of each of the analog signal segments when the magnitudes are output.
摘要翻译：实施例可以包括诸如用于信号的高速数模转换的硬件和/或代码的逻辑。许多实施例包括解复用器以将位集合分配给数模转换器，数模转换器用于接收位组并且同时操作以将位组从信号段的数字表示转换为输出模拟信号段和交织器，以在序列中对来自每个数模转换器的模拟信号段进行交织以产生模拟信号。在许多实施例中，交织器适于通过将模拟信号段中的每一个的大小锁存到接近于时钟周期端的交错输出来对模拟信号段进行交织，以衰减每个模拟信号段的幅度中的非线性输出大小。

8. 发明申请

US20110151818A1 CORRECTING QUADRATURE CROSSTALK CONTAMINATION IN RECEIVERS 有权
标题翻译：修正接收器中的平台CROSSTALK污染
公开(公告)号：US20110151818A1
公开(公告)日：2011-06-23
申请号：US12646513
申请日：2009-12-23
申请人： Isaac Ali , Nicholas P. Cowley
发明人： Isaac Ali , Nicholas P. Cowley
IPC分类号： H04B1/10
CPC分类号： H04B1/28 , H04L27/3863
摘要： An apparatus, a method and a system for correcting a phase imbalance are described. Embodiments may measure the phase imbalance inherent in a tuner and use the imbalance measure to correct the output of the tuner. Embodiments may include a tone generator to produce a single frequency tone and a tuner to receive the single frequency tone and output an intermediate frequency. The intermediate frequency may be corrected by a correction loop. Other embodiments are described and claimed.
摘要翻译：描述了用于校正相位不平衡的装置，方法和系统。实施例可以测量调谐器固有的相位不平衡，并使用不平衡度量来校正调谐器的输出。实施例可以包括产生单个频率音调的音调发生器和用于接收单个频率音调并输出中频的调谐器。中间频率可以通过校正回路来校正。描述和要求保护其他实施例。

9. 发明授权

US09325339B2 System for analog to digital conversion with improved spurious free dynamic range 有权
标题翻译：具有改进的无杂散动态范围的模数转换系统
公开(公告)号：US09325339B2
公开(公告)日：2016-04-26
申请号：US13995211
申请日：2012-05-01
申请人： Nicholas P. Cowley , Isaac Ali , William L. Barber
发明人： Nicholas P. Cowley , Isaac Ali , William L. Barber
IPC分类号： H03M1/12 , H03M1/06 , H03B28/00 , H03H7/01
CPC分类号： H03M1/124 , H03B28/00 , H03H7/01 , H03M1/0626 , H03M1/1215
摘要： Generally, this disclosure describes an apparatus, systems and methods for analog to digital conversion with improved spurious free dynamic range. The system includes a segmented ADC circuit with a plurality of interleaved ADC segments, the segmented ADC circuit configured to generate a digital signal including a channel with an associated channel frequency; a frequency down-converter circuit coupled to the segmented ADC circuit, the frequency down-converter circuit configured to frequency shift the digital signal by a frequency offset; a spur frequency prediction circuit coupled to the frequency down-converter circuit, the spur frequency prediction circuit configured to predict frequencies of spurs generated by the ADC segments, the prediction based on the number of ADC segments and based on the sampling rate of the digital signal; the spur frequency prediction circuit further configured to generate the frequency offset based on the predicted spur frequencies and based on a frequency band of the channel; and a filter circuit coupled to the frequency down-converter circuit, the filter circuit configured to remove one or more of the spurs from the frequency shifted digital signal to generate a filtered signal.
摘要翻译：通常，本公开描述了具有改进的无杂散动态范围的用于模数转换的装置，系统和方法。该系统包括具有多个交错ADC段的分段ADC电路，分段ADC电路被配置为生成包括具有相关信道频率的信道的数字信号; 所述降频转换器电路被耦合到所述分段ADC电路，所述降频转换器电路被配置为使所述数字信号频率偏移频率偏移; 耦合到所述降频转换器电路的杂散频率预测电路，所述杂散频率预测电路被配置为预测由所述ADC段产生的杂散的频率，所述预测基于所述ADC段的数量，并且基于所述数字信号的采样率 ; 所述杂音频率预测电路还被配置为基于所述预测的杂散频率并且基于所述信道的频带来生成所述频率偏移; 以及耦合到所述降频转换器电路的滤波器电路，所述滤波器电路被配置为从所述频移数字信号中去除所述杂波中的一个或多个以产生经滤波的信号。

10. 发明申请

US20110293043A1 DC OFFSET CORRECTION TECHNIQUES 失效
标题翻译： DC偏移校正技术
公开(公告)号：US20110293043A1
公开(公告)日：2011-12-01
申请号：US12790344
申请日：2010-05-28
申请人： Isaac Ali , Nicholas P. Cowley
发明人： Isaac Ali , Nicholas P. Cowley
IPC分类号： H04L25/06
CPC分类号： H04L25/061 , H04B1/30 , H04B2001/305 , H04L27/3863
摘要： Techniques are disclosed that involve the reduction of DC offsets. For instance, embodiments may receive a baseband signal, and determine a DC characteristic of the baseband signal. When the DC characteristic has a value that is outside of a predetermined range, a correction signal is adjusted. The correction signal is injected into the baseband signal.
摘要翻译：公开了涉及DC偏移减少的技术。例如，实施例可以接收基带信号，并确定基带信号的DC特性。当DC特性具有超出预定范围的值时，调整校正信号。校正信号被注入到基带信号中。

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