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1. 发明授权

US08536670B2 Semiconductor device, manufacturing method therefor, and electronic apparatus 有权
公开(公告)号：US08536670B2
公开(公告)日：2013-09-17
申请号：US13216654
申请日：2011-08-24
申请人： Ikuo Yoshihara , Taku Umebayashi , Hiroshi Takahashi , Hironobu Yoshida
发明人： Ikuo Yoshihara , Taku Umebayashi , Hiroshi Takahashi , Hironobu Yoshida
IPC分类号： H01L31/04 , H01L21/66 , H01L23/538
CPC分类号： H01L25/00 , H01L21/76251 , H01L23/147 , H01L23/49805 , H01L23/49822 , H01L25/0657 , H01L25/167 , H01L25/50 , H01L27/14634 , H01L27/14636 , H01L27/1464 , H01L27/1469 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device includes: a first semiconductor chip; and a second semiconductor chip that is stacked on the first semiconductor chip. The first semiconductor chip includes a first wiring portion of which a side surface is exposed at a side portion of the first semiconductor chip. The second semiconductor chip includes a second wiring portion of which a side surface is exposed at a side portion of the second semiconductor chip. The respective side surfaces of the first wiring portion and the second wiring portion, which are exposed at the side portions of the first semiconductor chip and the second semiconductor chip, are covered by a conductive layer, and the first wiring portion and the second wiring portion are electrically connected to each other through the conductive layer.

2. 发明申请

US20120056288A1 SEMICONDUCTOR DEVICE, MANUFACTURING METHOD THEREFOR, AND ELECTRONIC APPARATUS 有权
标题翻译：半导体器件及其制造方法和电子设备
公开(公告)号：US20120056288A1
公开(公告)日：2012-03-08
申请号：US13216654
申请日：2011-08-24
申请人： Ikuo Yoshihara , Taku Umebayashi , Hiroshi Takahashi , Hironobu Yoshida
发明人： Ikuo Yoshihara , Taku Umebayashi , Hiroshi Takahashi , Hironobu Yoshida
IPC分类号： H01L31/04 , H01L21/66 , H01L23/538
CPC分类号： H01L25/00 , H01L21/76251 , H01L23/147 , H01L23/49805 , H01L23/49822 , H01L25/0657 , H01L25/167 , H01L25/50 , H01L27/14634 , H01L27/14636 , H01L27/1464 , H01L27/1469 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device includes: a first semiconductor chip; and a second semiconductor chip that is stacked on the first semiconductor chip. The first semiconductor chip includes a first wiring portion of which a side surface is exposed at a side portion of the first semiconductor chip. The second semiconductor chip includes a second wiring portion of which a side surface is exposed at a side portion of the second semiconductor chip. The respective side surfaces of the first wiring portion and the second wiring portion, which are exposed at the side portions of the first semiconductor chip and the second semiconductor chip, are covered by a conductive layer, and the first wiring portion and the second wiring portion are electrically connected to each other through the conductive layer.
摘要翻译：半导体器件包括：第一半导体芯片; 以及堆叠在第一半导体芯片上的第二半导体芯片。第一半导体芯片包括第一布线部分，其侧表面在第一半导体芯片的侧部暴露。第二半导体芯片包括第二布线部分，其侧表面在第二半导体芯片的侧部暴露。在第一半导体芯片和第二半导体芯片的侧面露出的第一布线部分和第二布线部分的各个侧表面被导电层覆盖，并且第一布线部分和第二布线部分通过导电层彼此电连接。

3. 发明授权

US08410569B2 Solid-state imaging device and method for producing the same 有权
标题翻译：固态成像装置及其制造方法
公开(公告)号：US08410569B2
公开(公告)日：2013-04-02
申请号：US12842583
申请日：2010-07-23
申请人： Ikuo Yoshihara , Masaya Nagata , Naoto Sasaki , Taku Umebayashi , Hiroshi Takahashi , Yoichi Otsuka , Isaya Kitamura , Tokihisa Kaneguchi , Keishi Inoue , Toshihiko Hayashi , Hiroyasu Matsugai , Mayoshi Aonuma , Hiroshi Yoshioka
发明人： Ikuo Yoshihara , Masaya Nagata , Naoto Sasaki , Taku Umebayashi , Hiroshi Takahashi , Yoichi Otsuka , Isaya Kitamura , Tokihisa Kaneguchi , Keishi Inoue , Toshihiko Hayashi , Hiroyasu Matsugai , Mayoshi Aonuma , Hiroshi Yoshioka
IPC分类号： H01L27/146
CPC分类号： H01L27/14632 , H01L27/14621 , H01L27/14627 , H01L27/14685 , H01L27/14687
摘要： A solid-state imaging device includes a first substrate including a light-sensing portion configured to perform photoelectric conversion of incident light and a wiring portion provided on a light-incident side; an optically transparent second substrate provided on a wiring portion side of the first substrate at a certain distance; a through-hole provided in the first substrate; a through-via provided in the through-hole; a front-surface-side electrode connected to the through-via and provided on a front surface of the first substrate; a back-surface-side electrode connected to the through-via and provided on a back surface of the first substrate; and a stopper electrode provided on the front-surface-side electrode and filling a space between the front-surface-side electrode and the second substrate.
摘要翻译：固态成像装置包括：第一基板，包括被配置为执行入射光的光电转换的光感测部分和设置在光入射侧的布线部分; 光学透明的第二基板，设置在所述第一基板的布线部侧一定距离; 设置在所述第一基板中的通孔; 通孔，设置在通孔中; 连接到所述通孔并设置在所述第一基板的前表面上的前表面侧电极; 连接到所述通孔并设置在所述第一基板的背面上的背面侧电极; 以及设置在前表面侧电极上并填充前表面侧电极和第二基板之间的间隔的止动电极。

4. 发明申请

US20110024858A1 SOLID-STATE IMAGING DEVICE AND METHOD FOR PRODUCING THE SAME 有权
标题翻译：固态成像装置及其制造方法
公开(公告)号：US20110024858A1
公开(公告)日：2011-02-03
申请号：US12842583
申请日：2010-07-23
申请人： Ikuo Yoshihara , Masaya Nagata , Naoto Sasaki , Taku Umebayashi , Hiroshi Takahashi , Yoichi Otsuka , Isaya Kitamura , Tokihisa Kaneguchi , Keishi Inoue , Toshihiko Hayashi , Hiroyasu Matsugai , Masayoshi Aonuma , Hiroshi Yoshioka
发明人： Ikuo Yoshihara , Masaya Nagata , Naoto Sasaki , Taku Umebayashi , Hiroshi Takahashi , Yoichi Otsuka , Isaya Kitamura , Tokihisa Kaneguchi , Keishi Inoue , Toshihiko Hayashi , Hiroyasu Matsugai , Masayoshi Aonuma , Hiroshi Yoshioka
IPC分类号： H01L31/0232 , H01L31/02 , H01L31/18
CPC分类号： H01L27/14632 , H01L27/14621 , H01L27/14627 , H01L27/14685 , H01L27/14687
摘要： A solid-state imaging device includes a first substrate including a light-sensing portion configured to perform photoelectric conversion of incident light and a wiring portion provided on a light-incident side; an optically transparent second substrate provided on a wiring portion side of the first substrate at a certain distance; a through-hole provided in the first substrate; a through-via provided in the through-hole; a front-surface-side electrode connected to the through-via and provided on a front surface of the first substrate; a back-surface-side electrode connected to the through-via and provided on a back surface of the first substrate; and a stopper electrode provided on the front-surface-side electrode and filling a space between the front-surface-side electrode and the second substrate.
摘要翻译：固态成像装置包括：第一基板，包括被配置为执行入射光的光电转换的光感测部分和设置在光入射侧的布线部分; 光学透明的第二基板，设置在所述第一基板的布线部侧一定距离; 设置在所述第一基板中的通孔; 通孔，设置在通孔中; 连接到所述通孔并设置在所述第一基板的前表面上的前表面侧电极; 连接到所述通孔并设置在所述第一基板的背面上的背面侧电极; 以及设置在前表面侧电极上并填充前表面侧电极和第二基板之间的间隔的止动电极。

5. 发明申请

US20120261554A1 SEMICONDUCTOR IMAGE SENSOR MODULE, METHOD FOR MANUFACTURING THE SAME AS WELL AS CAMERA AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：半导体图像传感器模块，用于制造相机的方法以及用于制造相机的方法
公开(公告)号：US20120261554A1
公开(公告)日：2012-10-18
申请号：US13442414
申请日：2012-04-09
申请人： Ikuo Yoshihara , Masamitsu Yamanaka
发明人： Ikuo Yoshihara , Masamitsu Yamanaka
IPC分类号： H01L27/00
CPC分类号： H01L27/14634 , H01L27/14618 , H01L27/14632 , H01L27/1464 , H01L31/0203 , H01L31/024 , H01L2924/0002 , H04N5/2257 , H01L2924/00
摘要： A semiconductor image sensor module 1 at least includes a semiconductor image sensor chip 2 having a transistor forming region on a first main surface of a semiconductor substrate and having a photoelectric conversion region with a light incident surface formed on a second main surface on the side opposite to the first main surface and an image signal processing chip 3 for processing image signals formed in the semiconductor image sensor chip 2, wherein a plurality of bump electrodes 15a are formed on a first main surface, a plurality of bump electrodes 15b are formed on the image signal processing chip 3, both the chips 2 and 3 are formed to be laminated through heat dissipating means 4 and the plurality of bump electrodes 15a of the semiconductor image sensor chip 2 and the plurality of bump electrodes 15b on the image signal processing chip 3 are electrically connected.
摘要翻译：半导体图像传感器模块1至少包括半导体图像传感器芯片2，半导体图像传感器芯片2在半导体基板的第一主表面上具有晶体管形成区域，并且具有光反射区域，光电转换区域形成在相对侧的第二主表面上的第二主表面上到第一主表面上的图像信号处理芯片3和用于处理形成在半导体图像传感器芯片2中的图像信号的图像信号处理芯片3，其中在第一主表面上形成有多个凸块电极15a，图像信号处理芯片3，芯片2和3都通过散热装置4和半导体图像传感器芯片2的多个凸块电极15a和图像信号处理芯片3上的多个凸起电极15b 电连接。

6. 发明申请

US20120146173A1 METHOD OF MANUFACTURING SOLID-STATE IMAGING DEVICE, SOLID-STATE IMAGING DEVICE, AND ELECTRONIC APPARATUS 有权
标题翻译：固态成像装置的制造方法，固体成像装置和电子装置
公开(公告)号：US20120146173A1
公开(公告)日：2012-06-14
申请号：US13308854
申请日：2011-12-01
申请人： Kazuo Ohta , Ikuo Yoshihara
发明人： Kazuo Ohta , Ikuo Yoshihara
IPC分类号： H01L31/02 , H01L31/0224
CPC分类号： H01L27/14634 , H01L27/1266 , H01L27/14621 , H01L27/14627 , H01L27/1463 , H01L27/14632 , H01L27/14687 , H01L27/1469
摘要： The present disclosure provides a method of manufacturing a solid-state imaging device, including, forming on a first substrate a semiconductor thin film which is to be photoelectric conversion sections, forming driving circuits on a face side of a second substrate, laminating the first substrate and the second substrate by disposing the first substrate and second substrate opposite to each other in a condition in which the semiconductor thin film is connected to the driving circuits, and removing the first substrate from the semiconductor thin film in a condition in which the semiconductor thin film is left on the second substrate side.
摘要翻译：本公开内容提供了一种制造固态成像装置的方法，包括：在第一基板上形成作为光电转换部的半导体薄膜，在第二基板的正面形成驱动电路，层叠第一基板并且在半导体薄膜连接到驱动电路的条件下，将第一基板和第二基板相对地配置，并且在半导体薄膜的条件下从半导体薄膜去除第一基板，膜留在第二基板侧。

7. 发明授权

US07851838B2 Solid-state imaging device and method of manufacturing the same 有权
标题翻译：固态成像装置及其制造方法
公开(公告)号：US07851838B2
公开(公告)日：2010-12-14
申请号：US11941583
申请日：2007-11-16
申请人： Ikuo Yoshihara
发明人： Ikuo Yoshihara
IPC分类号： H01L31/09
CPC分类号： H01L27/1463 , H01L27/14612 , H01L27/14632 , H01L27/14643 , H01L27/14645 , H01L27/14687 , H01L27/14689 , H01L31/035281
摘要： A solid-state imaging device with a semiconductor substrate; a pixel formation region in the substrate and including a pixel made of a photoelectric conversion element; and an element isolation portion in the substrate and including an element isolation insulating layer and an impurity element isolation region. The element isolation insulating layer is positioned in a surface of the substrate. The impurity element isolation region is positioned under the element isolation insulating layer and within the substrate. The impurity element isolation region has at least a portion with a width that is narrower than that of the element isolation insulating layer. The photoelectric conversion element extends to a position under the element isolation insulating layer of the element isolation portion.
摘要翻译：一种具有半导体衬底的固态成像器件; 该基板中的像素形成区域包括由光电转换元件构成的像素; 以及衬底中的元件隔离部分，并且包括元件隔离绝缘层和杂质元件隔离区。元件隔离绝缘层位于基板的表面中。杂质元素隔离区域位于元件隔离绝缘层下方和衬底内。杂质元素隔离区具有至少一部分宽度比元件隔离绝缘层窄的部分。光电转换元件延伸到元件隔离部分的元件隔离绝缘层下方的位置。

8. 发明授权

US06362037B1 Semiconductor device and method of fabricating same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US06362037B1
公开(公告)日：2002-03-26
申请号：US09131350
申请日：1998-08-10
申请人： Ikuo Yoshihara , Kazuaki Kurooka
发明人： Ikuo Yoshihara , Kazuaki Kurooka
IPC分类号： H01L218238
CPC分类号： H01L27/0623 , Y10S257/903 , Y10S257/904
摘要： An N-type buried diffusion layer as a portion of the collector region of a bipolar transistor and an N-type buried diffusion layer of a memory cell region are simultaneously formed, and the buried diffusion layer of the memory cell region serves as a potential groove for electrons. The threshold voltage of a MOS transistor in the memory cell region is higher than the threshold voltage of a MOS transistor in a peripheral circuit region, preventing an increase in the standby current in the memory cell region. This increases the soft error resistance of the memory cell and prevents a decrease in the operating speed and an increase in the consumption power.
摘要翻译：同时形成作为双极晶体管的集电极区域的一部分的N型埋入扩散层和存储单元区域的N型埋入扩散层，并且存储单元区域的埋入扩散层用作电位沟槽对于电子。存储单元区域中的MOS晶体管的阈值电压高于外围电路区域中的MOS晶体管的阈值电压，从而防止存储单元区域中的待机电流的增加。这增加了存储单元的软错误电阻，并且防止了运行速度的降低和消耗功率的增加。

9. 发明授权

US5043873A Method of parallel processing for avoiding competition control problems and data up dating problems common in shared memory systems 失效
标题翻译：并行处理方法，用于避免共享内存系统中常见的竞争控制问题和数据上传问题
公开(公告)号：US5043873A
公开(公告)日：1991-08-27
申请号：US395444
申请日：1989-08-17
申请人： Akira Muramatsu , Kousuke Sakoda , Ikuo Yoshihara , Kazuo Nakao , Makoto Nohmi , Naoki Hamanaka , Shigeo Nagashima , Teruo Tanaka
发明人： Akira Muramatsu , Kousuke Sakoda , Ikuo Yoshihara , Kazuo Nakao , Makoto Nohmi , Naoki Hamanaka , Shigeo Nagashima , Teruo Tanaka
IPC分类号： G06F9/45 , G06F9/50
CPC分类号： G06F9/5016 , G06F8/451 , G06F2209/484
摘要： A plurality of elemental processors each include a local memory for storing data and task programs and an execution section for executing the task programs. A communications section transfers data among the processors. In a method of parallel processing with these elemental processors, a task program is executed in one of the processors. A detection operation is conducted to determine whether the data from the task program is to be copied to the local memories of other processors. The detection is based on predetermined information which is stored in the local memory of the processor which performs the task program and indicates which of the other processors will need the data. The detection also determines which of the other processors that will require access to the data are ready to receive the data. Concurrently and in parallel with the execution of the task program, the data is transmitted to each of the elemental processors that are awaiting the data with only a write instruction and without any communications instruction.

10. 发明授权

US4951193A Parallel computer with distributed shared memories and distributed task activating circuits 失效
标题翻译：具有分布式共享存储器和分布式任务激活电路的并行计算机
公开(公告)号：US4951193A
公开(公告)日：1990-08-21
申请号：US85646
申请日：1987-08-14
申请人： Akira Muramatsu , Kousuke Sakoda , Ikuo Yoshihara , Kazuo Nakao , Makoto Nohmi , Naoki Hamanaka , Shigeo Nagashima , Teruo Tanaka
发明人： Akira Muramatsu , Kousuke Sakoda , Ikuo Yoshihara , Kazuo Nakao , Makoto Nohmi , Naoki Hamanaka , Shigeo Nagashima , Teruo Tanaka
IPC分类号： G06F9/45 , G06F9/50
CPC分类号： G06F9/5016 , G06F8/451 , G06F2209/484
摘要： In accessing a memory, each element processor executes a program constructed so as to designate an address belonging to a predetermined local address area for each element processor. When a memory write instruction is executed by an element processor, it is detected if the memory address designated by the instruction coincides with a predetermined address. If detected, a predetermined address belonging to a local address space of another element processor and assigned to the first-mentioned predetermined address, and the data written in response to the write instruction, are sent to the other element processor to instruct the data to be written therein as a copy data. A next task to be executed is decided independently for each element processor.
摘要翻译：在访问存储器时，每个元件处理器执行构造成为每个元件处理器指定属于预定本地地址区域的地址的程序。当由元件处理器执行存储器写入指令时，检测由指令指定的存储器地址是否与预定地址一致。如果检测到，则属于另一元件处理器的本地地址空间并分配给首先提到的预定地址的预定地址以及响应写指令写入的数据被发送到另一元件处理器以指示数据为在其中写入作为复制数据。对于每个元件处理器独立地确定要执行的下一个任务。

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