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    • 1. 发明授权
    • Normal mode and green mode pulse width modulation controller
    • 正常模式和绿色模式脉宽调制控制器
    • US07436233B2
    • 2008-10-14
    • US11555426
    • 2006-11-01
    • Hsian-Pei YeeTung Sheng Chang
    • Hsian-Pei YeeTung Sheng Chang
    • H03K3/17
    • H03K7/08H02M3/156H02M2001/0032Y02B70/16
    • A PWM controller that effectively transitions between normal mode and green power mode is disclosed. A driver provides a normal drive signal during normal operation. A pulse width detector detects the pulse width of the PWM signal and if the pulse width drops below a threshold the normal mode drive signal will be turned off and a pulse ON time measurer will begin storing the pulse ON time. When the total ON time reaches a total ON time threshold or the output voltage drops below a voltage limit, a green mode drive signal will be output to the power converter. During green mode the driver will continue sending the green mode drive signal at intervals until a heavy load condition when the green mode drive signal will be shut off and the driver will resume sending the normal mode drive signal.
    • 公开了在正常模式和绿色功率模式之间有效转换的PWM控制器。 驾驶员在正常操作期间提供正常的驱动信号。 脉冲宽度检测器检测PWM信号的脉冲宽度,如果脉冲宽度下降到阈值以下,则正常模式驱动信号将被关闭,脉冲ON时间测量器将开始存储脉冲接通时间。 当总导通时间达到总导通时间阈值或输出电压下降到电压限制以下时,绿色模式驱动信号将被输出到功率转换器。 在绿色模式期间,当绿色模式驱动信号关闭并且驱动器将恢复发送普通模式驱动信号时,驱动器将会间隔地继续发送绿色模式驱动信号,直到重负载状态。
    • 2. 发明授权
    • Transistorized rectifier for a multiple output converter
    • 用于多输出转换器的晶体管整流器
    • US6038150A
    • 2000-03-14
    • US39018
    • 1998-03-13
    • Hsian-Pei YeeSatoru SawahataMasaru Wakatabe
    • Hsian-Pei YeeSatoru SawahataMasaru Wakatabe
    • H02M3/28H02M3/335H02M7/217
    • H02M3/33561H02M3/33576
    • A secondary subcircuit of a converter circuit is disclosed where a method and circuit for operating a transistor to prevent reverse conduction of the current in the secondary subcircuit is disclosed. The diode in the secondary subcircuits of the prior art is replaced by a transistor and the circuitry for controlling the transistor is made part of the control circuit (ASIC). The secondary converter subcircuit includes a secondary coil for generating a voltage that passes through a first transistor M1, a capacitor, and a second transistor M2, where the output terminal of the subcircuit is across said capacitor. A presently preferred embodiment of a control circuit detects the voltage level at a sync node and the output voltage level at the output terminal and controls transistors M1 and M2 accordingly in generating the desired voltage level at the output terminal.
    • 公开了一种转换器电路的次级分支电路,其中公开了用于操作晶体管以防止次级子电路中的电流反向导通的方法和电路。 现有技术的次级子电路中的二极管被晶体管替代,并且用于控制晶体管的电路被制成控制电路(ASIC)的一部分。 次级转换器子电路包括用于产生通过第一晶体管M1,电容器和第二晶体管M2的电压的次级线圈,其中子电路的输出端子跨过所述电容器。 控制电路的当前优选实施例检测同步节点处的电压电平和输出端子处的输出电压电平,并相应地控制晶体管M1和M2,以在输出端产生期望的电压电平。
    • 3. 发明授权
    • Maximize efficiency method for resonant converter with self-adjusting switching points
    • 最大化具有自调节开关点的谐振转换器的效率方法
    • US08441813B2
    • 2013-05-14
    • US13160184
    • 2011-06-14
    • Allen Y. TanHsian-Pei YeeCheng-Wen Tsui
    • Allen Y. TanHsian-Pei YeeCheng-Wen Tsui
    • H02M3/335
    • H02M3/338H02M2001/0058Y02B70/1433Y02B70/1491Y02P80/112
    • A maximize efficiency method for resonant converter with self-adjusting switching points is disclosed. The method is operated by a resonant converter, which comprises a transformer and a field effect transistor (FET). When the transistor is turned on, energy is stored in the transformer. When the transistor is turned off, a resonant signal is generated at a drain of the transistor. At this time, a suitable trigger time has to be found to turn on the transistor, so as to reduce switching power loss. The method measures the slope of the resonant signal at the trigger time. This is used as a reference to adjust the next cycle's trigger time. If the slope is negative at the time of trigger, a delta time is added to the trigger time in the next cycle, If the slope is positive, a delta time is subtracted from the trigger time for the next cycle.
    • 公开了一种具有自调节开关点的谐振转换器的最大效率方法。 该方法由包括变压器和场效应晶体管(FET)的谐振转换器操作。 当晶体管导通时,能量就被存储在变压器中。 当晶体管截止时,在晶体管的漏极处产生谐振信号。 此时,必须找到合适的触发时间来打开晶体管,以便降低开关功率损耗。 该方法测量触发时谐振信号的斜率。 这用作参考以调整下一个周期的触发时间。 如果在触发时斜率为负,则在下一个周期中将增量时间添加到触发时间。如果斜率为正,则从下一个周期的触发时间减去增量时间。
    • 6. 发明申请
    • Devices and Methods for Detection of Occult Blood
    • 隐匿血液检测装置及方法
    • US20080227208A1
    • 2008-09-18
    • US11687476
    • 2007-03-16
    • Hsiao-Ching YeeKuo-Ching YeeHsian-Pei Yee
    • Hsiao-Ching YeeKuo-Ching YeeHsian-Pei Yee
    • G01N33/72
    • G01N33/72
    • The present invention relates to devices and methods for the detection of occult blood in a test sample. These devices and methods can detect the presence of one or more of the following components of occult blood: hemoglobin, transferrin, hemoglobin-haptoglobin complex, and albumin. Methods for the detection of occult blood in a test sample include the following steps: exposing said test sample to two or more of the following antibodies: anti-hemoglobin antibodies, anti-hemoglobin-haptoglobin-complex antibodies, anti-transferrin antibodies, and anti-albumin antibodies or one or more of the following antibodies: anti-hemoglobin-haptoglobin-complex antibodies, anti-transferrin antibodies, and anti-albumin antibodies; determining the level of reactions between the antibodies and their corresponding components of occult blood that may be in the test sample; and deciding on the presence of occult blood. The devices of this invention can have two or more of test areas containing two or more of the following antibodies: anti-hemoglobin antibodies, anti-transferrin antibodies, anti-hemoglobin-haptoglobin complex antibodies, and anti-albumin antibodies or one or more of test areas containing one or more of the following antibodies: anti-transferrin antibodies, anti-hemoglobin-haptoglobin complex antibodies, and, anti-albumin antibodies. The devices and methods of this invention are simple and produce rapid responses.
    • 本发明涉及用于检测测试样品中隐藏血液的装置和方法。 这些装置和方法可以检测潜血中的一种或多种以下组分的存在:血红蛋白,转铁蛋白,血红蛋白 - 触珠蛋白复合物和白蛋白。 用于检测测试样品中隐藏血液的方法包括以下步骤:将所述测试样品暴露于以下两种或更多种抗体:抗血红蛋白抗体,抗血红蛋白 - 触珠蛋白复合抗体,抗转铁蛋白抗体和抗 - 白蛋白抗体或一种或多种以下抗体:抗血红蛋白 - 触珠蛋白复合抗体,抗转铁蛋白抗体和抗白蛋白抗体; 确定可能在测试样品中的抗体及其相应的潜血成分之间的反应水平; 并决定隐血的存在。 本发明的装置可以具有两个或更多个含有两种或更多种以下抗体的测试区域:抗血红蛋白抗体,抗转铁蛋白抗体,抗血红蛋白 - 触珠蛋白复合抗体和抗白蛋白抗体或一种或多种 包含一种或多种以下抗体的测试区域:抗转铁蛋白抗体,抗血红蛋白 - 触珠蛋白复合抗体和抗白蛋白抗体。 本发明的装置和方法是简单的并且产生快速响应。
    • 7. 发明授权
    • Method and circuit for detection of primary switches status in isolated DC/DC converters
    • 用于检测隔离DC / DC转换器中初级开关状态的方法和电路
    • US06456106B1
    • 2002-09-24
    • US09581097
    • 2000-06-07
    • Hsian-Pei Yee
    • Hsian-Pei Yee
    • G01R3136
    • H02M3/33576H02M3/33523H02M3/33592H02M2001/0038Y02B70/1475
    • A method and circuit for detecting primary switch (12) status in isolated DC/DC converters by observing the falling speed of the voltage level at the sensing point (node Z) is disclosed. It is noted that high impedance oscillation has a relatively slow falling or rising time when compared to a valid signal. By observing the falling or rising time of a given signal during the appropriate time period, a determination can be made to differentiate a valid signal and an oscillating signal. More specifically, two reference voltages (A & B) are provided to compare against node Z voltage to generate a sense pulse. A reference pulse having a predefined duration is compared to the sense pulse. If the duration of the sense pulse is greater than the duration of the reference pulse, a latch is used to generate a low output signal. If the duration of the sense pulse is less than the duration of the reference pulse, a high output signal is generated. The latch is reset when node Z voltage rises above reference voltage B.
    • 公开了一种用于通过观察感测点(节点Z)处的电压电平的下降速度来检测隔离DC / DC转换器中的初级开关(12)状态的方法和电路。 注意,与有效信号相比,高阻抗振荡具有相对较慢的下降或上升时间。 通过在适当的时间段内观察给定信号的下降或上升时间,可以确定区分有效信号和振荡信号。 更具体地,提供两个参考电压(A和B)以与节点Z电压进行比较以产生感测脉冲。 将具有预定持续时间的参考脉冲与感测脉冲进行比较。 如果感测脉冲的持续时间大于参考脉冲的持续时间,则使用锁存器来产生低输出信号。 如果感测脉冲的持续时间小于参考脉冲的持续时间,则产生高输出信号。 当节点Z电压上升到参考电压B以上时,锁存器复位。
    • 8. 发明授权
    • Majority carrier power diode
    • 多数载波功率二极管
    • US5510641A
    • 1996-04-23
    • US40920
    • 1993-03-31
    • Hsian-Pei YeePeter O. LauritzenSinclair S. Yee
    • Hsian-Pei YeePeter O. LauritzenSinclair S. Yee
    • H01L29/78H01L29/06H01L29/861H01L29/76
    • H01L29/861H01L29/0696H01L29/7802
    • A power diode having substantially no reverse-recovery time and relatively high conductance. The power diode is a majority carrier semiconductor having a structure that is similar to that of a metal oxide semiconductor field effect transistor (MOSFET), in that it includes a source, a drain, a gate, and a body. In one embodiment, to increase conductance of the power diode, a linked-cell configuration that reverses the geometry of a conventional cell-type MOSFET is employed, thereby increasing the width of a conductance channel over that of a conventional MOSFET, and compensating for a relatively low level of inversion in the channel region. Negative and positive feedback circuits are used to further improve the conductance of the power diode by dynamically setting a bias voltage applied between the gate and the source to a level just below a threshold voltage. In the positive feedback circuit, the magnitude of the bias voltage is greater than the threshold voltage if the power diode is forward biased, but substantially reduced if the power diode is reverse biased, thereby minimizing its turn-on delay without risking reverse conductance. Although separate components are used for biasing the device in the disclosed embodiments, it is contemplated that these components be integrated on a common substrate with the source, drain, and gate in a commercially practiced preferred embodiment. Another embodiment employs a charge carrier region diffused into the body and at least in part underlying the gate. This region provides a variable threshold voltage along the channel and reduces the effective length of the channel to increase its conductance. A threshold voltage ranges between a higher value, V.sub.TMAX, adjacent the source, to a lower value, V.sub.T, elsewhere in the device.
    • 功率二极管基本上没有反向恢复时间和相对高的电导率。 功率二极管是具有类似于金属氧化物半导体场效应晶体管(MOSFET)的结构的多数载流子半导体,其包括源极,漏极,栅极和主体。 在一个实施例中,为了增加功率二极管的电导,采用反转常规电池型MOSFET的几何形状的连接电池配置,从而增加电导通道的宽度超过常规MOSFET的宽度,并补偿 通道区域反相水平相对较低。 负和正反馈电路用于通过将施加在栅极和源极之间的偏置电压动态地设置到刚好低于阈值电压的电平来进一步提高功率二极管的电导。 在正反馈电路中,如果功率二极管正向偏置,则偏置电压的大小大于阈值电压,但如果功率二极管被反向偏置,则极大地减小,从而使其导通延迟最小化,而不会产生反向导通风险。 虽然在所公开的实施例中使用单独的部件来偏置器件,但是可以设想,在商业上实践的优选实施例中,这些部件在源极,漏极和栅极上集成在公共衬底上。 另一个实施例采用扩散到体内并至少部分地位于栅极下方的电荷载体区域。 该区域沿着通道提供可变的阈值电压并且减小通道的有效长度以增加其电导。 阈值电压范围在与源相邻的较高值VTMAX之间,设备的其他位置的VT值较低。