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1. 发明专利

JP2005308763A Apparatus for evaluating semiconductor device junction strength 有权
标题翻译：用于评估半导体器件结强度的装置
公开(公告)号：JP2005308763A
公开(公告)日：2005-11-04
申请号：JP2005207964
申请日：2005-07-19
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： UENO ISAO , OKABE SATORU , MORITA TOSHIAKI , KAJIWARA RYOICHI , KODAMA HIRONORI
IPC分类号： G01N19/04 , G01N3/00 , G01N3/31
摘要： PROBLEM TO BE SOLVED: To provide an apparatus for evaluating quantitatively the impact resistance of a connection in an electronic component and an electronic element, selecting a suitable material which does not impair reliability over a long time, and for identifying junction conditions.
SOLUTION: The evaluation apparatus has a table for mounting a measuring sample, an arm having the weight at a tip, a fixing/opening apparatus for fixing or opening the arm, a swinging arm for upwardly swinging the arm at an arbitrary angle, an analysis pattern recognizing apparatus for checking the movement of the weight, and an analyzer for processing a signal from the analysis pattern recognizing apparatus and finding the speed of the weight.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：提供一种用于定量评价电子部件和电子元件中的连接的耐冲击性的装置，选择长时间不损害可靠性的合适材料，以及用于识别接合条件。解决方案：评估装置具有用于安装测量样本的桌子，具有尖端的重物的臂，用于固定或打开臂的定影/打开装置，用于以任意角度向上摆动臂的摆动臂，用于检查重量的移动的分析模式识别装置，以及用于处理来自分析模式识别装置的信号并找到重量的速度的分析器。版权所有（C）2006，JPO＆NCIPI

2. 发明专利

JP2004022914A Insulated circuit board, cooling structure therefor, power semiconductor device, and cooling structure therefor 审中-公开
公开(公告)号：JP2004022914A
公开(公告)日：2004-01-22
申请号：JP2002177833
申请日：2002-06-19
申请人： Hitachi Ltd , Hitachi Metals Ltd , 日立金属株式会社 , 株式会社日立製作所
发明人： SUZUKI KIYOMITSU , KURIHARA YASUTOSHI , KODAMA HIRONORI , IMAMURA TOSHIYUKI , TEJIMA HIROYUKI
IPC分类号： H05K7/20 , H01L23/36 , H01L23/473 , H05K1/02
摘要： PROBLEM TO BE SOLVED: To provide an insulated circuit board, a cooling structure therefor, a power semiconductor device and a cooling structure therefor in which a structure which is cooled by a cooling liquid-state medium is bonded by frictional stirring and bonding, heat radiation characteristics are improved and high reliability is provided.
SOLUTION: In the insulated circuit board in which a circuit board composed of copper or copper alloy, a ceramics wafer and a radiation shield composed of copper or steel alloy are successively bonded by brazing material, the radiation shield has a plurality of plate-like fins or stick-like fins except for its full peripheral portion, a plate portion thicker than the fins is integrally formed on both outer sides of the arrangement of the plate-like fins, and a plate portion thicker than a diameter of the stick-like fins is integrally formed on both outer sides of one of arrangements of the stick-like fins. Besides, the insulated circuit board is composed of the power semiconductor device in which a semiconductor power element is packaged on the circuit board of the insulated circuit board.
COPYRIGHT: (C)2004,JPO

3. 发明专利

JP2003273288A Shock-resistant strength evaluating method, evaluating device and semiconductor device 有权
标题翻译：耐冲击强度评估方法，评估装置和半导体装置
公开(公告)号：JP2003273288A
公开(公告)日：2003-09-26
申请号：JP2002069452
申请日：2002-03-14
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： MORITA TOSHIAKI , KAJIWARA RYOICHI , KODAMA HIRONORI , UENO ISAO , OKABE SATORU
IPC分类号： H01L23/12
摘要： PROBLEM TO BE SOLVED: To provide an evaluating method which quantitatively evaluates the shock- resistance of the connecting part of an electronic part or an electronic element, selects a proper material and specifies joining conditions which do not impair long-termed reliability; and to provide its evaluating device.
SOLUTION: A joining part strength evaluating method of a semiconductor device is attained as a semiconductor mounted part shock-resistant strength evaluating method and its evaluating device in which an impactive force is applied to the specific location of the semiconductor device to destroy a joining part, and a time required for the destruction is set as a shock-resistant strength index of the joining part of the semiconductor device. The joining part strength evaluating method of a semiconductor device is attained as the semiconductor mounted part shock-resistant strength evaluating method and its evaluating device in which a jig for acceleration motion is made to collide in an impactive manner with the solder bal carried part of the semiconductor device to destroy the solder ball from the joining part, and from a maximum acceleration value applied to the jig, a force required for destroying the joining part of the solder ball is set as shock-resistant strength required for destroying the joining part of the solder ball.
COPYRIGHT: (C)2003,JPO
摘要翻译：要解决的问题：为了提供对电子部件或电子元件的连接部件的抗冲击性进行定量评价的评价方法，选择适当的材料，并指定不损害长期可靠性的接合条件; 并提供其评估装置。解决方案：作为半导体安装部件抗冲击强度评估方法及其评估装置，获得半导体装置的接合部件强度评估方法，其中冲击力施加到半导体装置的特定位置以破坏接合部分，并且将破坏所需的时间设定为半导体器件的接合部分的抗冲击强度指数。半导体器件的接合部分强度评估方法作为半导体安装部件抗冲击强度评估方法及其评估装置获得，其中加速运动的夹具以冲击的方式与所携带的焊料的部分碰撞半导体装置，从接合部破坏焊球，从施加到夹具的最大加速度值，将焊球的接合部破坏所需的力设定为破坏焊球的接合部所需的抗冲击强度焊球版权所有（C）2003，JPO

4. 发明专利

JP2003031732A Insulated semiconductor device 审中-公开
标题翻译：绝缘半导体器件
公开(公告)号：JP2003031732A
公开(公告)日：2003-01-31
申请号：JP2001219099
申请日：2001-07-19
申请人： Hitachi Ltd , Hitachi Metals Ltd , 日立金属株式会社 , 株式会社日立製作所
发明人： KURIHARA YASUTOSHI , MORITA TOSHIAKI , KODAMA HIRONORI , IIZUKA MAMORU , KOYAMA KENJI , OSHIMA MASAHIKO , FUKUI SATOSHI , HAMAYOSHI SHIGEYUKI
IPC分类号： H01L23/13 , H01L23/373
CPC分类号： H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/49111 , H01L2224/49175 , H01L2224/73265 , H01L2924/10253 , H01L2924/1301 , H01L2924/13055 , H01L2924/13091 , H01L2924/181 , H01L2924/19107 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： PROBLEM TO BE SOLVED: To provide a highly reliable insulated semiconductor device in which each member has little possibility of being deformed, denatured, and broken by reducing thermal stresses or thermal strains caused when the device is manufactured or operated, and to provide the members of the device. SOLUTION: This insulated semiconductor device is constituted by firmly fixing a semiconductor substrate to a metallic wiring layer provided on one main surface of a ceramic board and the other main surface of the ceramic board to a supporting member through a metallic junction layer. In addition, the supporting member is constituted of a composite metallic plate manufactured by scattering ceramic power and particles in a matrix metal composed of an Al-alloy, and the metallic wiring layer and metallic junction layer are composed of Al-alloys.
摘要翻译：要解决的问题：为了提供一种高度可靠的绝缘半导体器件，其中每个部件几乎不会因制造或操作器件时引起的热应力或热应变而变形，变形和破坏，并且提供装置。解决方案：该绝缘半导体器件通过金属结层将半导体衬底牢固地固定在设置在陶瓷板的一个主表面上的金属布线层和陶瓷板的另一个主表面上的支撑构件上。此外，支撑构件由通过将陶瓷功率和颗粒散射在由Al合金构成的基体金属中而制造的复合金属板构成，金属布线层和金属接合层由Al合金构成。

5. 发明专利

JPH11274185A Compression-bonded semiconductor device and converter using the same 有权
标题翻译：压电结合半导体器件和使用它的转换器
公开(公告)号：JPH11274185A
公开(公告)日：1999-10-08
申请号：JP22784798
申请日：1998-08-12
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： KODAMA HIRONORI , KATO MITSUO , SAWAHATA MAMORU
IPC分类号： H01L29/74 , H01L21/52 , H01L29/78
CPC分类号： H01L24/01 , H01L2924/1301 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To ensure a uniform contact condition between a semiconductor element and a package electrode for reducing the thermal resistance and element resistance of a pressure contact type passage device. SOLUTION: Metal nets or embossed metal plates 6 are disposed between the main electrodes of a plurality of semiconductor elements 1 and main electrode plate 5 of a planar package, whereby a uniform pressure contact at a wide area can be realized simply at a comparatively low pressure, i.e., the height variations in the contact faces can be absorbed adequately to reduce the thermal and electrical resistances at the contact faces, which would become all the more difficult because of the increased size of the package with the increase of the wafer size, or parallel multi-chip arrangement of elements for increasing the capacity.
摘要翻译：要解决的问题：为了确保半导体元件和封装电极之间的均匀接触状态，用于降低压接式通路装置的耐热性和元件电阻。解决方案：金属网或压花金属板6设置在多个半导体元件1的主电极和平面封装的主电极板5之间，从而可以简单地在较低压力下实现广泛的均匀压力接触即，可以充分吸收接触面的高度变化，以降低接触面处的热电阻和电阻，这将随着晶片尺寸的增加而随着封装尺寸的增加而变得更加困难，或者并行多芯片排列的元件，增加容量。

6. 发明专利

JP2004282905A Ac polyphase electric rotating machine 有权
公开(公告)号：JP2004282905A
公开(公告)日：2004-10-07
申请号：JP2003071211
申请日：2003-03-17
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： TAKAHASHI YOSHIMASA , KODAMA HIRONORI , KOBAYASHI YUTAKA , MASUNO KEIICHI , MASUMOTO MASATOSHI
IPC分类号： H02K11/00 , H01L23/367 , H01L23/373 , H02K9/06 , H02K11/04
CPC分类号： H01L23/3737 , H01L23/3672 , H01L2224/45124 , H01L2224/48247 , H01L2224/48472 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/181 , H02K9/06 , H02K11/048 , H01L2924/00 , H01L2924/00012
摘要： PROBLEM TO BE SOLVED: To provide an AC polyphase electric rotating machine having a packaging structure suitable for a switching element, e.g. an MOSFET or an IGBT, by ensuring reliable electric insulation between the element and the earth required for high voltage application by suppressing temperature variation among a plurality of elements. SOLUTION: In the AC polyphase electric rotating machine, a semiconductor switching element and a heat sink are insulated electrically, the heat sink is earthed to the housing, and each phase is arranged to be isolated thermally. Since temperature variation can be suppressed among a plurality of elements, reliable electric insulation between the element and the earth required for high voltage application can be ensured, and a packaging structure suitable for a switching element, e.g. an MOSFET or an IGBT, can be realized. COPYRIGHT: (C)2005,JPO&NCIPI

7. 发明专利

JP2003297873A Semiconductor device, structure and electronic device 审中-公开
标题翻译：半导体器件，结构和电子器件
公开(公告)号：JP2003297873A
公开(公告)日：2003-10-17
申请号：JP2002093558
申请日：2002-03-29
申请人： Hitachi Ltd , Renesas Eastern Japan Semiconductor Inc , 株式会社ルネサス東日本セミコンダクタ , 株式会社日立製作所
发明人： TAKAHASHI YOSHIMASA , KURIHARA YASUTOSHI , KODAMA HIRONORI , ENDO TSUNEO , SAKURAI YOSUKE , NAKAJIMA KOICHI , NEGISHI MIKIO
IPC分类号： B23K35/26 , C22C5/02 , C22C11/06 , C22C13/00 , H01L21/60
CPC分类号： H01L24/97 , H01L24/01 , H01L24/73 , H01L2224/16145 , H01L2224/16225 , H01L2224/2929 , H01L2224/293 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/48247 , H01L2224/73204 , H01L2224/73265 , H01L2224/83851 , H01L2224/97 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01009 , H01L2924/01012 , H01L2924/01013 , H01L2924/01015 , H01L2924/01019 , H01L2924/0102 , H01L2924/01023 , H01L2924/01025 , H01L2924/01027 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01039 , H01L2924/0104 , H01L2924/01042 , H01L2924/01045 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/01051 , H01L2924/01072 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/09701 , H01L2924/10329 , H01L2924/13091 , H01L2924/14 , H01L2924/15311 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19105 , H01L2924/30105 , H01L2924/3025 , H01L2224/85 , H01L2924/00014 , H01L2224/83 , H01L2224/92247 , H01L2924/00012 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device for which the flow-out of a primary mounting solder material and short-circuit, the disconnection and the position deviation of a chip component due to the flow-out are prevented when loading the semiconductor device composed by loading the chip component on a substrate and resin-sealing the loaded chip component on an external wiring board. SOLUTION: For the semiconductor device, a solder layer fixing the chip component and a wiring member is sealed with a resin layer, and the solder layer is constituted of a composite material for which non-metal powder is dispersed in a matrix metal. Thus, for the semiconductor device, the flow-out of the solder material and the short-circuit, the disconnection and the position deviation of the chip component due to the flow-out at secondarily mounting the semiconductor device composed by loading the chip component on the wiring member by the solder material and resin-sealing the soldered part on an external wiring member can be prevented. COPYRIGHT: (C)2004,JPO
摘要翻译：要解决的问题：为了提供一种主要安装焊料流出和短路的半导体器件，当加载时防止由于流出而导致的芯片部件的断开和位置偏移所述半导体器件通过将芯片部件加载在基板上并将负载的芯片部件树脂密封在外部布线板上而构成。解决方案：对于半导体器件，用树脂层密封固定芯片部件和布线部件的焊料层，并且焊料层由非金属粉末分散在基体金属中的复合材料构成。因此，对于半导体器件，由于在二次安装通过将芯片部件加载而构成的半导体器件的流出时，芯片部件的流出和短路，芯片部件的断开和位置偏移可以防止通过焊料的配线构件和将焊接部件树脂密封在外部配线构件上。版权所有（C）2004，JPO

8. 发明专利

JP2009174429A Rotary machine 有权
标题翻译：旋转机
公开(公告)号：JP2009174429A
公开(公告)日：2009-08-06
申请号：JP2008013932
申请日：2008-01-24
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： SEKIHARA TAKASHI , HAYASAKA YASUSHI , ARIKAWA HIDEYUKI , KODAMA HIRONORI
IPC分类号： F01D11/08 , F01D5/28 , F01D25/24 , F02C7/28
摘要： PROBLEM TO BE SOLVED: To provide a rotary machine in which a gap between a rotor blade and a casing is decreased to the maximum extent to improve fluid performance and besides the quantity of heat generated by friction when an extremity of the rotor blade comes in contact with the casing and reactive force against the rotor blade can be decreased. SOLUTION: There is provided a rotary machine equipped with a rotating rotor blade 5 and the casing 4 enclosing the rotor blade. In the rotary machine, an inter-rotor blade gap control coating 19 applied to an inner surface of the casing 4 comprise a first coating 7 which is composed of alloy layers and is used for joining and a second coating 8 which is applied to the inner surface of the casing 4 via the first coating 7 and is composed of alloy layers or ceramic layers and further abrades away when coming in contact with the extremity of the rotor blade 5. The second coating 8 is applied to a region corresponding to the range in thickness of the extremity of the rotor blade 5 from 50% to 100% of the maximum value. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：提供一种旋转机械，其中转子叶片和壳体之间的间隙最大程度地减小以改善流体性能，以及当转子叶片的末端处的摩擦产生的热量与壳体接触，可以减小对转子叶片的反作用力。解决方案：提供一种旋转机械，其配备有旋转的转子叶片5和包围转子叶片的壳体4。在旋转机中，应用于壳体4的内表面的转子间叶片间隙控制涂层19包括由合金层构成并用于接合的第一涂层7和施加到内部的第二涂层8 外壳4的表面经由第一涂层7，并且由合金层或陶瓷层构成，并且当与转子叶片5的末端接触时进一步磨损。第二涂层8被施加到对应于转子叶片5的末端的厚度为最大值的50％至100％。版权所有（C）2009，JPO＆INPIT

9. 发明专利

JP2003309133A High thermostability semiconductor element and power converter using the same 有权
标题翻译：高温可控硅半导体元件和功率转换器
公开(公告)号：JP2003309133A
公开(公告)日：2003-10-31
申请号：JP2002113245
申请日：2002-04-16
申请人： Hitachi Ltd , Kansai Electric Power Co Inc:The , 株式会社日立製作所 , 関西電力株式会社
发明人： KODAMA HIRONORI , TAKAYAMA DAISUKE , ASANO KATSUNORI , SUGAWARA YOSHITAKA
IPC分类号： H01L25/10 , H01L21/52
CPC分类号： H01L24/01 , H01L2924/12032 , H01L2924/1301 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor element wherein a plurality of SiC semiconductor chips are incorporated in a flat package, for attaining high reliability in higher temperature use and also durability in higher temperature use without causing oxidation deterioration, and provide a power converter that exerts higher performance comparing with a conventional power converter using an Si semiconductor element. SOLUTION: The semiconductor element of high thermostability has such an arrangement that; a plurality of semiconductor chips are incorporated, being juxtaposed, in the flat package whose interior is airtightly sealed by a pair of common electrode plates and an insulating outer cylinder made of ceramics; and a Pt layer is formed at least on the externally exposed surface of each of the common electrode plates. Such an element is used for a power converter for exerting high performance. COPYRIGHT: (C)2004,JPO
摘要翻译：要解决的问题：为了提供一种半导体元件，其中多个SiC半导体芯片被并入扁平封装中，为了在较高温度使用中获得高可靠性，并且还提供了在较高温度下的耐久性而不会引起氧化劣化，并提供一种功率转换器与使用Si半导体元件的常规功率转换器相比具有更高的性能。解决方案：高热稳定性的半导体元件具有以下结构：多个半导体芯片被并入，并入其内部由一对公共电极板和由陶瓷制成的绝缘外筒气密密封的扁平封装中; 并且至少在每个公共电极板的外露表面上形成Pt层。这种元件用于实现高性能的功率转换器。版权所有（C）2004，JPO

10. 发明专利

JP2003068979A Semiconductor device 审中-公开
标题翻译：半导体器件
公开(公告)号：JP2003068979A
公开(公告)日：2003-03-07
申请号：JP2001258143
申请日：2001-08-28
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： KUSHIMA TADAO , TSUYUNO ENJIYOU , SUZUKI KAZUHIRO , KODAMA HIRONORI , KAMOSHITA RIKUO , BANDO AKIRA , HIRAI TSUTOMU , SAITO KATSUAKI , KAWASE DAISUKE
IPC分类号： H01L23/28 , H01L25/07 , H01L25/18
CPC分类号： H01L2224/32225 , H01L2224/45124 , H01L2224/48091 , H01L2224/48227 , H01L2224/48472 , H01L2224/73265 , H01L2924/10253 , H01L2924/00014 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a power semiconductor device which is kept high in dielectric strength, simple in structure, and inexpensive. SOLUTION: A case is composed of a case side wall 5 and a case bottom plate 4, an insulating board 1a provided with a front and a rear where a conductor 1b is formed respectively is bonded to the case bottom plate 4 with solder, and a Si chip 2 and an external extracting terminal 7 are bonded on one surface of the insulating board 1a by solder for the formation of a semiconductor device. The top surface of the case is sealed up with a sealing plate 8a which is provided with a gel agent inlet 8d and a protruding structure 8b which extracts out a external leading terminal 7. The protruding structure 8b is constituted extending downward to the sealing plate 8a. Gel agent 10 is made to fill up the case so as to reach the lower end of the projection of the structure 8B, and a cavity is formed extending from the top surface of the gel agent to the undersurface of the sealing plate 8a. A hole bored in the structure 8b is filled up with a hard resin so as to fix the external terminal, and the gel agent inlet 8d is filled up with a silicone rubber cap 13.
摘要翻译：要解决的问题：提供一种电介质强度高，结构简单，成本低廉的功率半导体器件。解决方案：壳体由壳体侧壁5和壳体底板4构成，设置有导体1b的前后的绝缘板1a分别用焊料接合到壳体底板4，并且 Si芯片2和外部提取端子7通过用于形成半导体器件的焊料接合在绝缘板1a的一个表面上。壳体的上表面用密封板8a密封，密封板8a设置有凝胶剂入口8d和从外部引出端子7抽出的突出结构8b。突出结构8b向下延伸到密封板8a 。凝胶剂10被填充到壳体的下端，从而形成从凝胶剂的顶表面延伸到密封板8a的下表面的空腔。在结构体8b中钻孔的孔用硬树脂填充以固定外部端子，并且凝胶剂入口8d填充有硅橡胶盖13。

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