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1. 发明授权

US5091880A Memory device 失效
标题翻译：内存设备
公开(公告)号：US5091880A
公开(公告)日：1992-02-25
申请号：US471841
申请日：1990-01-29
申请人： Yasuo Isono , Toshihito Kouchi , Akitoshi Toda , Hiroshi Kajimura , Yoshiyuki Mimura , Hiroko Ohta , Ryouhei Shimizu
发明人： Yasuo Isono , Toshihito Kouchi , Akitoshi Toda , Hiroshi Kajimura , Yoshiyuki Mimura , Hiroko Ohta , Ryouhei Shimizu
IPC分类号： G01Q80/00 , G11B9/00 , G11B11/03 , G11B17/00 , G11B19/00 , G11B21/00
CPC分类号： G11C13/0014 , B82Y10/00 , G11B11/03 , G11B17/00 , G11B19/00 , G11B21/00 , G11B9/14 , G11B9/149 , G11C13/04 , Y10S977/849 , Y10S977/861 , Y10S977/881 , Y10S977/94 , Y10S977/943 , Y10S977/947
摘要： A memory device comprises a base plate with a memory element supporting layer, a probe with a pointed tip portion, and a fine scan element for causing the probe to scan over the surface of the memory element supporting layer. When the probe is approached to the surface of the memory element supporting layer and a suitable bias voltage is applied across the probe and the memory element supporting layer, a tunnel current is cause to flow therebetween and a specific region of the surface of the supporting layer is excited. The excited region can adsorb one molecule of, for example, di-(2-ethylhexyl)phthalate. By causing the memory element to be adsorbed selectively on the memory element supporting layer, data is recorded in the form of a projection-and-recess pattern. The recorded data can be read out by observing the surface configuration of the supporting layer in accordance with the principle of an STM (scanning tunneling microscope).

2. 发明授权

US5216254A Circuit pattern forming apparatus using MU-STM 失效
标题翻译：使用MU-STM的电路图形成装置
公开(公告)号：US5216254A
公开(公告)日：1993-06-01
申请号：US517588
申请日：1990-05-01
申请人： Hiroko Ohta , Ryouhei Shimizu , Toshihito Kouchi , Akitoshi Toda , Yasuo Isono , Yoshiyuki Mimura , Hiroshi Kajimura
发明人： Hiroko Ohta , Ryouhei Shimizu , Toshihito Kouchi , Akitoshi Toda , Yasuo Isono , Yoshiyuki Mimura , Hiroshi Kajimura
IPC分类号： H01J37/26 , G01Q60/10 , G01Q70/06 , G01Q80/00 , H01J37/28 , H01J37/317 , H05K3/00 , H05K3/06 , H05K3/14
CPC分类号： H05K3/0082 , H05K3/146 , B82Y10/00 , H05K2203/0121 , H05K2203/1338 , H05K3/061 , Y10S977/849 , Y10S977/855 , Y10S977/861 , Y10S977/872 , Y10S977/874 , Y10S977/887
摘要： An apparatus for forming a predetermined circuit pattern on a circuit substrate by using a .mu.-STM write head, the .mu.-STM write head comprising a write head substrate having a flat surface, a plurality of micro chip electrodes formed upright on the flat surface of the write head substrate and constituting a .mu.-STM, a level of a distal end of each of the chip electrodes being set to be constant, and scanning means for scanning the micro chip electrodes on the circuit substrate by moving the micro chip electrodes and the circuit substrate relative to each other in two-dimensional directions.

3. 发明授权

US5144581A Apparatus including atomic probes utilizing tunnel current to read, write and erase data 失效
标题翻译：包括使用隧道电流读取，写入和删除数据的原子探针的装置
公开(公告)号：US5144581A
公开(公告)日：1992-09-01
申请号：US471854
申请日：1990-01-29
申请人： Akitoshi Toda , Ryouhei Shimizu , Hiroko Ohta , Hiroshi Kajimura , Yoshiyuki Mimura , Yasuo Isono , Toshihito Kouchi
发明人： Akitoshi Toda , Ryouhei Shimizu , Hiroko Ohta , Hiroshi Kajimura , Yoshiyuki Mimura , Yasuo Isono , Toshihito Kouchi
IPC分类号： G01N27/00 , G01Q60/10 , G06F5/01 , G06F5/10 , G06F7/76 , G06F7/78 , G11B9/00 , G11B27/19 , G11B27/30 , G11C11/21
CPC分类号： G06F7/785 , G06F5/01 , G06F5/10 , G06F7/768 , G11B27/19 , G11B27/3027 , G11B9/14 , G11B9/1418 , B82Y10/00 , G01Q80/00 , G06F2205/104 , G11B9/1481 , Y10S977/861 , Y10S977/947
摘要： A micro scanning tunneling microscope ("STM") arithmetic circuit device comprises an information-rewritable micro STM recording medium and a micro STM recording apparatus which temporarily stores information on the recording medium such that the information can be read as a variation in a tunnel current. The recording apparatus has a probe (probes) for writing/reading information on the recording medium and a scanner for varying a relationship in position between the probe and the recording medium. The micro STM recording apparatus uses a recording medium having a specific format as the micro STM recording medium in which recorded information is read as a variation in a tunnel current. That is, the recording medium has an address area in which address information is recorded and a data area in which data information is recorded.

4. 发明授权

US5289408A Memory apparatus using tunnel current techniques 失效
标题翻译：使用隧道电流技术的存储设备
公开(公告)号：US5289408A
公开(公告)日：1994-02-22
申请号：US873635
申请日：1992-04-23
申请人： Yoshiyuki Mimura , Hiroshi Kajimura , Toshihito Kouchi , Akitoshi Toda , Yasuo Isono , Hiroko Ohta , Ryouhei Shimizu
发明人： Yoshiyuki Mimura , Hiroshi Kajimura , Toshihito Kouchi , Akitoshi Toda , Yasuo Isono , Hiroko Ohta , Ryouhei Shimizu
IPC分类号： G01Q10/00 , G01Q70/06 , G11B5/00 , G11B9/00 , G11B11/00 , G11B11/03 , G11B11/08 , G11B17/00 , G11B19/00 , G11B19/02 , G11B19/20 , G11B20/10 , G11B21/02 , G11B21/12 , G11C13/00 , G01N27/00
CPC分类号： G11B20/10 , G11B11/00 , G11B11/03 , G11B11/08 , G11B17/00 , G11B19/00 , G11B19/02 , G11B19/20 , G11B21/02 , G11B21/12 , G11B5/00 , G11B9/14 , G11B9/1427 , B82Y10/00 , G01Q80/00 , Y10S977/947
摘要： A scanning tunneling microscope memory apparatus comprises first and second integrated circuit (IC) substrates. First and second cantilevers, which can be moved by piezoelectric elements, are arranged on the first and second IC substrates, respectively. Tunnel current probes are provided on a free end of the first cantilever, and a recording element is provided on a free end of the second cantilever. The first and second cantilevers are spaced from each other and overlap such that the tunnel current probes face the recording element. The first or second substrate includes a charge coupled device (CCD) circuit, a control circuit for controlling the CCD circuit and cantilevers, and a drive circuit having a preamplifier, a write circuit, and a servo circuit.
摘要翻译：扫描隧道显微镜存储装置包括第一和第二集成电路（IC）基板。可以分别通过压电元件移动的第一和第二悬臂分别布置在第一和第二IC基板上。隧道电流探针设置在第一悬臂的自由端上，并且记录元件设置在第二悬臂的自由端上。第一和第二悬臂彼此间隔开并重叠，使得隧道电流探针面对记录元件。第一或第二基板包括电荷耦合器件（CCD）电路，用于控制CCD电路和悬臂的控制电路，以及具有前置放大器，写入电路和伺服电路的驱动电路。

5. 发明授权

US5053995A Tunnel current data storage apparatus having separate lever bodies 失效
标题翻译：隧道电流数据存储装置具有独立的杠杆体
公开(公告)号：US5053995A
公开(公告)日：1991-10-01
申请号：US468640
申请日：1990-01-23
申请人： Hiroshi Kajimura , Toshihito Kouchi , Akitoshi Toda , Yasuo Isono , Yoshiyuki Mimura , Hiroko Ohta , Ryouhei Shimizu
发明人： Hiroshi Kajimura , Toshihito Kouchi , Akitoshi Toda , Yasuo Isono , Yoshiyuki Mimura , Hiroko Ohta , Ryouhei Shimizu
IPC分类号： G01Q10/04 , G01Q20/04 , G01Q60/16 , G01Q70/06 , G01Q80/00 , G11B9/00 , G11B9/14 , G11B11/08 , G11B11/10 , G11B17/32 , G11B17/34 , G11B21/00 , G11B21/02 , G11B21/12 , G11C11/21
CPC分类号： G11B9/14 , G11B11/08 , G11B11/10 , G11B17/32 , G11B17/34 , G11B21/00 , G11B21/02 , G11B21/12 , G11B9/1427 , G11B9/1454 , B82Y10/00 , B82Y35/00 , G01Q70/06 , G01Q80/00 , Y10S977/947
摘要： A data storage apparatus includes a first lever body having a piezoelectric driving section, and a second lever body which is disposed to separate from and to be perpendicular to the first lever body, and has a piezoelectric driving section. A recording medium is formed on a portion of the second lever body, and records desired data. A plurality of probes are disposed on a portion of the first lever body to oppose the recording medium at a predetermined interval, and detect a change in state at predetermined positions on the recording medium as a change in tunnel current or a change in three-dimensional pattern. A voltage applying circuit alternately applies predetermined voltages to the piezoelectric driving sections of the first and second lever bodies to separately drive the plurality of probes in different directions, thereby three-dimensionally scanning the recording medium.

6. 发明授权

US4743800A Array of light emitting elements for electrophotographic printer 失效
标题翻译：电子照相打印机用发光元件阵列
公开(公告)号：US4743800A
公开(公告)日：1988-05-10
申请号：US821420
申请日：1986-01-22
申请人： Yoshiyuki Mimura , Akitoshi Toda , Yasuo Isono
发明人： Yoshiyuki Mimura , Akitoshi Toda , Yasuo Isono
IPC分类号： H01J63/06 , B41J2/44 , B41J2/447 , B41J2/45 , B41J2/455 , H01J31/15 , H01J63/04 , H01J5/16
CPC分类号： B41J2/4476 , H01J31/15
摘要： An array of light emitting elements comprises an insulating substrate, a dot anode array including a multitude of dot anodes defined by conductors and phosphors formed on the substrate, a thermionic emission cathode disposed in opposing relationship with the dot anode array, and a grid interposed between the cathode and the dot anode array. An accelerating electric field is selectively established between the dot anodes and the cathode to excite the phosphors on the dot anodes with low speed electron beams, thus causing the phosphors to emit light. The array is primarily used in an electrophotographic printer.
摘要翻译：发光元件阵列包括绝缘衬底，包括由形成在衬底上的导体和荧光体限定的多个点阳极的点阳极阵列，与点阳极阵列相对置设置的热离子发射阴极和插入在阴极和点阳极阵列。在点阳极和阴极之间选择性地建立加速电场，以低速电子束激发点阳极上的荧光体，从而使荧光体发光。该阵列主要用于电子照相打印机。

7. 发明授权

US4972370A Three-dimensional memory element and memory device 失效
标题翻译：三维存储元件和存储器件
公开(公告)号：US4972370A
公开(公告)日：1990-11-20
申请号：US398271
申请日：1989-08-24
申请人： Masamichi Morimoto , Yoshiyuki Mimura , Yasuo Isono
发明人： Masamichi Morimoto , Yoshiyuki Mimura , Yasuo Isono
IPC分类号： H01L27/04 , H01L21/822 , H01L21/8246 , H01L27/00 , H01L27/10 , H01L27/105 , H01L27/28 , H01L29/66 , H01L45/00 , H01L51/05
CPC分类号： H01L45/00
摘要： A three-dimensional memory element comprises a multilayer tunnel switch portion formed by alternately stacking conductive films and insulating films, both the ends of the switch portion consisting of insulating films, a write electrode formed on the insulating film as one end of the multilayer tunnel switch portion, a read electrode formed on the insulating film as the other end of the multilayer tunnel switch portion, and charge accumulating capacitors respectively connected to the conductive films of the multilayer tunnel switch portion.

8. 发明授权

US4701042A Duplicating apparatus 失效
标题翻译：复制设备
公开(公告)号：US4701042A
公开(公告)日：1987-10-20
申请号：US803150
申请日：1985-12-02
申请人： Yoshiyuki Mimura , Yasuo Isono
发明人： Yoshiyuki Mimura , Yasuo Isono
IPC分类号： G03G15/00 , G03G15/06 , G03G15/08 , G03G15/095
CPC分类号： G03G15/065 , G03G15/08 , G03G15/095
摘要： A duplicating apparatus including a charge retentive drum arranged rotatably, an electrostatic latent image forming device, a non-contact type developing device, a transferring device for transferring a toner image onto a record paper and a fixing device for fixing the toner image onto the record paper. A correction electrode is provided between the developing device and transferring device and an AC bias voltage is applied to the correction electrode to generate a vibrating electric field. Image quality of the duplicated copies can be improved by passing the toner image through the vibrating electric field.
摘要翻译：一种复制装置，包括可旋转地布置的电荷保持鼓，静电潜像形成装置，非接触型显影装置，用于将调色剂图像转印到记录纸上的转印装置和用于将调色剂图像定影到记录上的定影装置纸。在显影装置和转印装置之间设置校正电极，并且将AC偏压施加到校正电极以产生振动电场。通过使调色剂图像通过振动电场，可以改善复印份数的图像质量。

9. 发明授权

US5341325A Ferroelectric memory device with crosstalk protection in reading/writing operation 失效
标题翻译：在读/写操作中具有串扰保护的铁电存储器件
公开(公告)号：US5341325A
公开(公告)日：1994-08-23
申请号：US971947
申请日：1992-11-05
申请人： Hiroshi Nakano , Yasuo Isono
发明人： Hiroshi Nakano , Yasuo Isono
IPC分类号： G11C11/22
CPC分类号： G11C11/22
摘要： A plurality of memory cells are constituted by a large number of belt-like first conductive members, a ferroelectric thin film formed on the first conductive members, and a large number of belt-like second conductive members formed on the film in a direction perpendicular to the first conductive members. A reading/writing section performs a reading/writing operation with respect to each memory cell after applying a predetermined voltage to at least memory cells other than a target memory cell to cause ferroelectric polarization corresponding to crosstalk components. A two-terminal switch integrally stacked on each of the memory cells serves to reduce dielectric polarization for the elimination of crosstalk caused in each memory cell.
摘要翻译：多个存储单元由多个带状的第一导电构件，形成在第一导电构件上的铁电薄膜构成，并且在垂直于第一导电构件的方向上形成在膜上的多个带状第二导电构件第一导电构件。读/写部分在至少对目标存储单元以外的存储单元施加预定电压之后，对每个存储单元执行读/写操作，以产生对应于串扰分量的铁电极化。整体堆叠在每个存储单元上的两端开关用于减少用于消除每个存储单元中引起的串扰的电介质极化。

10. 发明授权

US5220202A Memory device and memory apparatus using the same suitable for neural network 失效
标题翻译：使用相同适用于神经网络的存储器件和存储器件
公开(公告)号：US5220202A
公开(公告)日：1993-06-15
申请号：US651654
申请日：1991-02-06
申请人： Yasuo Isono , Hiroshi Nakano
发明人： Yasuo Isono , Hiroshi Nakano
IPC分类号： H01L27/04 , G06N3/063 , G11C11/22 , G11C11/34 , H01L21/822 , H01L27/10 , H01L27/28 , H01L51/05 , H03K3/45 , H03K17/80
CPC分类号： G06N3/063 , G06N3/0635 , G11C11/22 , G11C11/34 , H03K17/80 , H03K3/45 , G11C11/223
摘要： A memory device includes a nonlinear electric conductivity element, a charge accumulation element, and a switching element. The nonlinear electric conductivity element has an insulating layer having opposite surfaces, and first and second conductive layers respectively formed on the opposite surfaces of the insulating layer. The nonlinear electric conductivity element receives an external write signal applied to one of the first and second conductive layers, and outputs a signal having nonlinear electric conductivity characteristics from the other of the first and second conductive layers. The charge accumulation element has charge accumulation characteristics and is connected to receive and store the signal output from the other of the first and second conductive layers. The switching element is ON/OFF-controlled upon reception of the signal charge stored in the charge accumulation element. The switching element receives an external read voltage to read out the signal charge stored in the charge accumulation element as storage data. A memory apparatus includes a plurality of memory devices each having the nonlinear electric conductivity element the charge accumulation element and the switching element. The plurality of memory devices are connected in a matrix form such that the switching elements in at least two memory devices can commonly receive the read voltage and can commonly read out the storage data.
摘要翻译：存储器件包括非线性导电元件，电荷累积元件和开关元件。非线性导电性元件具有具有相反表面的绝缘层，并且分别形成在绝缘层的相对表面上的第一和第二导电层。非线性导电元件接收施加到第一和第二导电层之一的外部写入信号，并且从第一和第二导电层中的另一个输出具有非线性电导率特性的信号。电荷累积元件具有电荷累积特性并被连接以接收和存储从第一和第二导电层中的另一个输出的信号。接收到存储在电荷累积元件中的信号电荷时，开关元件被ON / OFF控制。开关元件接收外部读取电压以读出存储在电荷累积元件中的信号电荷作为存储数据。存储装置包括多个存储器件，每个存储器件具有电荷累积元件和开关元件的非线性导电元件。多个存储器件以矩阵形式连接，使得至少两个存储器件中的开关元件可以共同地接收读取电压，并且可以共同地读出存储数据。

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