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1. 发明授权

US07584431B2 Communication system and terminal units connected thereto 有权
标题翻译：通信系统和与其连接的终端单元
公开(公告)号：US07584431B2
公开(公告)日：2009-09-01
申请号：US10724778
申请日：2003-12-02
申请人： Hiroi Kazushige , Nobukazu Kondo , Tsutomu Hara , Tooru Yokozawa , Kazuchika Ogiwara , Masaya Umemura , Shinichiro Okamura
发明人： Hiroi Kazushige , Nobukazu Kondo , Tsutomu Hara , Tooru Yokozawa , Kazuchika Ogiwara , Masaya Umemura , Shinichiro Okamura
IPC分类号： G06F3/00
CPC分类号： H04L29/06 , H04L67/38
摘要： A communication system including a network and at least two terminal units connected thereto. Each terminal unit includes a session controlling unit for controlling a session for enabling transmission/receiving of voice, image, handwritten data to/from the remote terminal unit individually, and a display unit for displaying the image and the handwritten data. The image data and the handwritten data are overlapped and displayed on a display of the display unit.
摘要翻译：一种通信系统，包括网络和与其连接的至少两个终端单元。每个终端单元包括会话控制单元，用于控制会话以使得能够单独地向/从远程终端单元发送/接收语音，图像，手写数据，以及用于显示图像和手写数据的显示单元。图像数据和手写数据被重叠并显示在显示单元的显示器上。

2. 发明授权

US06850267B2 Video telephone system and terminal device therefor 有权
标题翻译：视频电话系统及其终端设备
公开(公告)号：US06850267B2
公开(公告)日：2005-02-01
申请号：US10372811
申请日：2003-02-26
申请人： Kazushige Hiroi , Nobukazu Kondo , Kazuchika Ogiwara , Tooru Yokozawa , Takeo Tomokane
发明人： Kazushige Hiroi , Nobukazu Kondo , Kazuchika Ogiwara , Tooru Yokozawa , Takeo Tomokane
IPC分类号： H04N7/14 , H04Q7/38
CPC分类号： H04N7/147 , H04N7/148
摘要： A terminal device stores in a nonvolatile memory a video encoding method, a size expressed by pixels, a frame rate, a bit rate, and a key frame insertion interval suitable for reception. A receiving side terminal device notifies information to a sending side terminal. According to the information, the sending side terminal device encodes video data obtained by shooting an object and transmits encoded video data. Also, the sending side terminal device cuts, from the video data, video data of a size not exceeding a least size among a size of the video data obtained by the sending side terminal device, a size expressed by pixels suitable for transmission in the sending side terminal device, and a size expressed by pixels suitable for reception in the reception side terminal device. The sending side terminal device encodes and transmits the video data.
摘要翻译：终端装置在非易失性存储器中存储视频编码方法，由像素表示的尺寸，帧速率，比特率和适合于接收的关键帧插入间隔。接收侧终端装置向发送侧终端通知信息。根据该信息，发送侧终端装置对通过拍摄对象而获得的视频数据进行编码，并发送编码后的视频数据。此外，发送侧终端装置从视频数据切断由发送侧终端装置获取的视频数据的大小之中的尺寸不超过最小尺寸的视频数据，由适于发送的发送的像素表示的大小侧终端装置，以及由接收侧终端装置中适合接收的像素表示的尺寸。发送侧终端装置编码并发送视频数据。

3. 发明授权

US6021455A Method and system for arbitrating a bus according to the status of a buffer and destination information 失效
标题翻译：根据缓冲区和目的地信息的状态仲裁总线的方法和系统
公开(公告)号：US6021455A
公开(公告)日：2000-02-01
申请号：US708324
申请日：1996-09-05
申请人： Nobukazu Kondo , Koichi Okazawa , Yukihiro Seki , Ryuichi Hattori , Masaya Umemura , Shigemi Adachi , Kouichi Nakai , Takashi Moriyama
发明人： Nobukazu Kondo , Koichi Okazawa , Yukihiro Seki , Ryuichi Hattori , Masaya Umemura , Shigemi Adachi , Kouichi Nakai , Takashi Moriyama
IPC分类号： G06F13/36 , G06F13/362 , G06F13/364 , G06F13/00
CPC分类号： G06F13/364
摘要： An information processing system includes a first bus, a second bus, a plurality of modules connected to both buses, a bus arbiter for arbitrating a bus access request of a bus master, and a storage means for storing access data up to a predetermined amount for one of modules when access destination information indicates that said module is the access destination. Each bus master outputs access destination information and when the bus arbiter judges that one of the bus masters issues a bus access request when it performs an access operation, the bus arbiter refers to whether the predetermined amount of access destination information is fully stored in the storage means, and decides whether or not to give a bus access to the bus master.
摘要翻译：一种信息处理系统，包括第一总线，第二总线，连接到两个总线的多个模块，用于仲裁总线主机的总线访问请求的总线仲裁器，以及用于存储高达预定量的访问数据的存储装置，当访问目的地信息指示所述模块是访问目的地时，模块之一。每个总线主机输出接入目的地信息，当总线仲裁器在执行访问操作时判断总线主机之一发出总线访问请求时，总线仲裁器是指预定量的访问目的地信息是否完全存储在存储器中意味着，并决定是否给总线访问总线主控。

4. 发明授权

US06425037B1 Information processing system, bus arbiter, and bus controlling method 有权
标题翻译：信息处理系统，总线仲裁器和总线控制方法
公开(公告)号：US06425037B1
公开(公告)日：2002-07-23
申请号：US09407064
申请日：1999-09-28
申请人： Nobukazu Kondo , Koichi Okazawa , Yukihiro Seki , Ryuichi Hattori , Masaya Umemura , Shigemi Adachi , Kouichi Nakai , Takashi Moriyama
发明人： Nobukazu Kondo , Koichi Okazawa , Yukihiro Seki , Ryuichi Hattori , Masaya Umemura , Shigemi Adachi , Kouichi Nakai , Takashi Moriyama
IPC分类号： G06F1300
CPC分类号： G06F13/364
摘要： The present invention provides a means for preventing execution of a transaction such as main storage access from obstruction by bus competition with low-speed IO access and improving the bus occupation efficiency. The present invention includes a first bus, a second bus, a plurality of modules connected to both buses, a bus conversion means for performing protocol conversion of information between both buses, a bus arbiter for arbitrating a bus occupation right request of a bus master, and a storage means for storing access data up to a predetermined amount when the access destination is a predetermined module. Each bus master outputs access destination information and when the bus arbiter judges that one of the bus masters issues a bus occupation right request when it performs an access operation, the bus arbiter refers to the access destination information and the data storage status of the storage means and decides whether or not to give a bus occupation right to the bus master.
摘要翻译：本发明提供了一种用于防止诸如通过具有低速IO接入的总线竞争阻塞的主存储访问的事务的执行并提高总线占用效率的手段。本发明包括第一总线，第二总线，多个连接到两个总线的模块，用于在两个总线之间执行信息的协议转换的总线转换装置，用于仲裁总线主机的总线占用权请求的总线仲裁器，以及用于当存储访问数据达到预定量时存储访问数据的存储装置访问目的地是预定模块。每个总线主机输出接入目的地信息，当总线仲裁器在执行访问操作时判断其中一个总线主机发出总线占用权请求时，总线仲裁器参考存取装置的访问目的地信息和数据存储状态并决定是否给予巴士总线职业权。

5. 发明授权

US06584530B2 Information processing system, bus arbiter, and bus controlling method 有权
标题翻译：信息处理系统，总线仲裁器和总线控制方法
公开(公告)号：US06584530B2
公开(公告)日：2003-06-24
申请号：US10173819
申请日：2002-06-19
申请人： Nobukazu Kondo , Koichi Okazawa , Yukihiro Seki , Ryuichi Hattori , Masaya Umemura , Shigemi Adachi , Kouichi Nakai , Takashi Moriyama
发明人： Nobukazu Kondo , Koichi Okazawa , Yukihiro Seki , Ryuichi Hattori , Masaya Umemura , Shigemi Adachi , Kouichi Nakai , Takashi Moriyama
IPC分类号： G06F1338
CPC分类号： G06F13/364
摘要： The present invention provides a means for preventing execution of a transaction such as main storage access from obstruction by bus competition with low-speed IO access and improving the bus occupation efficiency. Apparatus for preventing execution of a transaction such as storage access from obstruction by bus competition with low-speed IO access. The invention includes a first bus, a second bus, a plurality of modules connected to both buses, a bus conversion unit for performing protocol conversion of information between both buses, a bus arbiter for arbitrating a bus occupation right request of a bus master, and a storage for storing access data up to a predetermined amount when the access destination is a predetermined module. Each bus master outputs access destination information and when the bus arbiter judges that one of the bus masters issues a bus occupation right request, the bus arbiter refers to the access destination information and the data storage status of the storage and decides whether to give a bus occupation right to the bus master.
摘要翻译：本发明提供了一种用于防止执行诸如主存储器访问的事务的方法，以便通过具有低速IO访问的总线竞争阻塞，并且提高总线占用效率。用于防止执行诸如存储访问以避免总线阻塞的事务的装置竞争与低速IO访问。本发明包括第一总线，第二总线，连接到两个总线的多个模块，用于在两个总线之间执行信息协议转换的总线转换单元，用于仲裁总线主机的总线占用权请求的总线仲裁器和存储器，用于当访问目的地是预定模块时存储高达预定量的访问数据。每个总线主机输出接入目的地信息，当总线仲裁器判断其中一个总线主机发出总线占用权请求时，总线仲裁器参考存储的访问目的地信息和数据存储状态，并决定是否给出总线占领权掌握公交车主。

6. 发明授权

US06665807B1 Information processing apparatus 有权
标题翻译：信息处理装置
公开(公告)号：US06665807B1
公开(公告)日：2003-12-16
申请号：US09389228
申请日：1999-09-03
申请人： Nobukazu Kondo , Koki Noguchi , Ikuya Kawasaki
发明人： Nobukazu Kondo , Koki Noguchi , Ikuya Kawasaki
IPC分类号： G06F112
CPC分类号： G06F13/4059
摘要： A circuit includes a transmission function of transmitting data together with a source clock synchronized to the data to another module, a reception circuit for receiving the data outputted by the module and a source clock synchronized to the data, and a synchronization circuit for connecting the circuit having a transmission function to the reception circuit are formed on a single-chip integrated circuit. Even if the module connected to the bus is changed, i.e., even if the operation clock frequency of the module of the other party is changed, other modules can be used as they are without making any change. The cost needed at the time of system construction can thus be reduced. Furthermore, as for the aspect of performance, only one synchronization circuit is needed. The increase of latency caused by synchronization can also be suppressed to the minimum.
摘要翻译：电路包括将与数据同步的源时钟与数据一起发送的另一模块的发送功能，用于接收模块输出的数据的接收电路和与数据同步的源时钟，以及用于连接电路的同步电路在单芯片集成电路上形成对接收电路具有传输功能。即使连接到总线的模块被改变，即使对方的模块的操作时钟频率改变，也可以使用其他模块，而不进行任何改变。因此可以减少系统建造时所需的成本。此外，对于性能方面，仅需要一个同步电路。由同步引起的延迟的增加也可以抑制到最小。

7. 发明授权

US06519667B2 Bus control system 失效
公开(公告)号：US06519667B2
公开(公告)日：2003-02-11
申请号：US09991925
申请日：2001-11-26
申请人： Nobukazu Kondo , Seiji Kaneko , Koichi Okazawa , Hideaki Gemma , Tetsuya Mochida , Takehisa Hayashi
发明人： Nobukazu Kondo , Seiji Kaneko , Koichi Okazawa , Hideaki Gemma , Tetsuya Mochida , Takehisa Hayashi
IPC分类号： G06F1300
CPC分类号： G06F13/4027 , G06F13/36
摘要： In a data processing system, a plurality of modules connected to a system bus thereof are assigned with identifiers. When a source module initiates a split read access to another module, the source module sends an address of the access destination module and an identifier of the source module. When sending a response to the source module, the destination module returns response data and the identifier of the source module thereto. Checking the identifier from the destination module, the source module determines the response data returned as a response to the initiated access.

8. 发明授权

US6094521A Information processing system 有权
标题翻译：信息处理系统
公开(公告)号：US6094521A
公开(公告)日：2000-07-25
申请号：US260498
申请日：1999-03-02
申请人： Masataka Okayama , Tomohisa Kohiyama , Nobukazu Kondo , Kazutoshi Katoh , Kazuaki Tanaka , Yoshihiro Harada
发明人： Masataka Okayama , Tomohisa Kohiyama , Nobukazu Kondo , Kazutoshi Katoh , Kazuaki Tanaka , Yoshihiro Harada
IPC分类号： G06T9/00 , G11B27/10 , G11B27/11 , G11B27/28 , G11B27/32 , G11B27/34 , H04N5/77 , H04N5/781 , H04N5/85 , H04N5/907 , H04N9/804 , H04N5/91 , H04N5/76
CPC分类号： H04N5/772 , G06T9/007 , G11B27/105 , G11B27/11 , G11B27/28 , G11B27/329 , H04N9/8045 , G11B2220/20 , G11B27/34 , H04N5/77 , H04N5/781 , H04N5/85 , H04N5/907 , H04N9/8042
摘要： An object is to provide a video recording/playing apparatus for facilitating recording/playing of motion pictures. The configuration is provided with, at least, a video input device for inputting analog motion pictures (video), a video capture device for digitizing the motion pictures inputted through the video input device and recording the digitized motion pictures and, at the same time, for converting the motion pictures inputted through the video input device into compressed motion pictures capable of being played in a high compression ratio and in a high picture quality and recording the compressed motion pictures, an information extracting device for extracting arbitrary information from the non-compressed motion pictures captured by the video capture device, a correspondence information generating device for associating the information extracted by the information extracting device with the compressed motion pictures captured by the video capture device, an input device for designating a result of the correspondence, and a compressed video playing device for playing the compressed motion pictures.
摘要翻译：目的在于提供一种便于记录/播放动态影像的视频记录/播放装置。该配置至少提供有用于输入模拟运动图像（视频）的视频输入装置，用于数字化通过视频输入装置输入的运动图像并记录数字化运动图像的视频捕获装置，并且同时，用于将通过视频输入装置输入的运动图像转换为能够以高压缩比和高图像质量播放的压缩运动图像，并记录压缩的运动图像;信息提取装置，用于从非压缩由视频捕捉装置拍摄的动态图像，将信息提取装置提取的信息与由视频捕获装置拍摄的压缩运动图像相关联的对应信息生成装置，用于指定对应结果的输入装置，以及压缩用于播放压缩动画图片的视频播放设备 tures。

9. 发明授权

US5899575A Video capture device, video recording/playing apparatus having the video capture device attached thereto, and video input device 失效
标题翻译：视频采集装置，附带有视频捕获装置的视频记录/播放装置和视频输入装置
公开(公告)号：US5899575A
公开(公告)日：1999-05-04
申请号：US750826
申请日：1996-12-13
申请人： Masataka Okayama , Tomohisa Kohiyama , Nobukazu Kondo , Kazutoshi Katoh , Kazuaki Tanaka , Yoshihiro Harada
发明人： Masataka Okayama , Tomohisa Kohiyama , Nobukazu Kondo , Kazutoshi Katoh , Kazuaki Tanaka , Yoshihiro Harada
IPC分类号： G06T9/00 , G11B27/10 , G11B27/11 , G11B27/28 , G11B27/32 , G11B27/34 , H04N5/77 , H04N5/781 , H04N5/85 , H04N5/907 , H04N9/804 , H04N5/91 , H04N5/225
CPC分类号： H04N5/772 , G06T9/007 , G11B27/105 , G11B27/11 , G11B27/28 , G11B27/329 , H04N9/8045 , G11B2220/20 , G11B27/34 , H04N5/77 , H04N5/781 , H04N5/85 , H04N5/907 , H04N9/8042
摘要： An object is to provide a video recording/playing apparatus for facilitating recording/playing of motion pictures. The configuration is provided with, at least, a video input device for inputting analog motion pictures (video), a video capture device for digitizing the motion pictures inputted through the video input device and recording the digitized motion pictures and, at the same time, for converting the motion pictures inputted through the video input device into compressed motion pictures capable of being played in a high compression ratio and in a high picture quality and recording the compressed motion pictures, an information extracting device for extracting arbitrary information from the non-compressed motion pictures captured by the video capture device, a correspondence information generating device for associating the information extracted by the information extracting device with the compressed motion pictures captured by the video capture device, an input device for designating a result of the correspondence, and a compressed video playing device for playing the compressed motion pictures.
摘要翻译： PCT No.PCT / JP96 / 02499 Sec。 371日期1996年12月13日第 102（e）1996年12月13日PCT PCT 1996年9月4日PCT公布。公开号WO97 / 23093 日期1996年6月26日目的在于提供一种便于记录/播放动态影像的视频记录/播放装置。该配置至少提供有用于输入模拟运动图像（视频）的视频输入装置，用于数字化通过视频输入装置输入的运动图像并记录数字化运动图像的视频捕获装置，并且同时，用于将通过视频输入装置输入的运动图像转换为能够以高压缩比和高图像质量播放的压缩运动图像，并记录压缩的运动图像;信息提取装置，用于从非压缩由视频捕捉装置拍摄的动态图像，将信息提取装置提取的信息与由视频捕获装置拍摄的压缩运动图像相关联的对应信息生成装置，用于指定对应结果的输入装置，以及压缩用于播放压缩动画图片的视频播放设备 tures。

10. 发明授权

US5774679A Method for controlling a bus to progress transfer cycles without inserting a cycle for acknowledgement 失效
公开(公告)号：US5774679A
公开(公告)日：1998-06-30
申请号：US774614
申请日：1996-12-30
申请人： Nobukazu Kondo , Seiji Kaneko , Hideaki Gemma , Tetsuhiko Okada , Kazuhiko Komori , Koichi Okazawa
发明人： Nobukazu Kondo , Seiji Kaneko , Hideaki Gemma , Tetsuhiko Okada , Kazuhiko Komori , Koichi Okazawa
IPC分类号： G06F13/362 , G06F13/00 , G06F13/12 , G06F13/364 , G06F13/38 , G06F13/42 , G06F13/14
CPC分类号： G06F13/364
摘要： An information processing system wherein a module to operate as a master which executes a read access to a module to operate as a slave requests a bus arbiter to afford the mastership of a bus with a bus mastership request signal, and it simultaneously asserts a last cycle signal so as to notify the bus arbiter of the fact that the next cycle will be the last cycle to be used by the master. Subsequently, when the master has had the use of the bus granted by a bus use grant signal from the bus arbiter, it transfers an address to the slave by the use of the bus in the next cycle, thereby starting the read access. After the read access, the master releases the bus mastership. Only when the slave has failed to accept the transferred address, does it assert a retry request signal two cycles after the transfer cycle of the address not accepted. In this case, the module having executed the transfer two cycles before the cycle of the asserted signal executes again the transfer executed before. Thus, the address to be transferred can be transferred to the module ready to accept the address, in only one cycle.

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