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1. 发明专利

DE69922587T2 未知
公开(公告)号：DE69922587T2
公开(公告)日：2005-12-08
申请号：DE69922587
申请日：1999-06-01
申请人： HITACHI LTD
发明人： TANAKA SATOSHI , ISHIFUJI TOMOAKI , NAGAI KENJI , FURUKAWA KATSUHIRO
IPC分类号： G06K17/00 , G06K7/00 , H04B5/02 , H04L12/28 , H04L25/49 , G06K19/07

2. 发明专利

DE69922587D1 未知
公开(公告)号：DE69922587D1
公开(公告)日：2005-01-20
申请号：DE69922587
申请日：1999-06-01
申请人： HITACHI LTD
发明人： TANAKA SATOSHI , ISHIFUJI TOMOAKI , NAGAI KENJI , FURUKAWA KATSUHIRO
IPC分类号： G06K17/00 , G06K7/00 , H04B5/02 , H04L12/28 , H04L25/49 , G06K19/07

3. 发明公开

EP1120915A4 OVER-SAMPLING A/D, D/A CONVERTER 审中-公开
标题翻译： ÜBERABTASTENDERA / O，D / A WANDLER
公开(公告)号：EP1120915A4
公开(公告)日：2003-10-08
申请号：EP99924006
申请日：1999-06-11
申请人： HITACHI LTD
发明人： KANEKAWA NOBUYASU , KOJIMA YASUYUKI , YUKUTAKE SEIGOU , NEMOTO MINEHIRO , TAKAMI KAZUHISA , IWASAKI TAKAYUKI , TAKEUCHI YUSUKE , FURUKAWA KATSUHIRO
IPC分类号： H03M1/00 , H03M3/00 , H03M3/02
CPC分类号： H03M3/392 , H03M3/498
摘要： Hardware for an over-sampling A/D, D/A converter capable of operating under either software handling a first method having a fixed over-sampling ratio or software handling a second method having a variable over-sampling ratio, wherein a value N3 written in a pseudo division ratio register (11) via a user interface and a value N4 written in a pseudo over-sampling ratio register (21) are converted into a division ratio N1 by a conversion circuit (12) and written in a division ratio register (10).
摘要翻译：用于能够在处理具有固定过采样率的第一方法的软件或处理具有可变过采样率的第二方法的软件下运行的过采样A / D，D / A转换器的硬件，其中写入的值N3 在经由用户接口的伪分频比寄存器（11）中，并且写入伪过采样率寄存器（21）的值N4被转换电路（12）转换为分频比N1，并被写入分频比寄存器（10）。

4. 发明专利

JPH07202595A INVERTER TYPE AMPLIFIER 失效
公开(公告)号：JPH07202595A
公开(公告)日：1995-08-04
申请号：JP35179493
申请日：1993-12-28
申请人： HITACHI LTD
发明人： NISHIKAWA NORIMITSU , OKAZAKI TAKAO , YAMAKIDO KAZUO , FURUKAWA KATSUHIRO
IPC分类号： H03F3/72
摘要： PURPOSE:To provide the inverter type amplifier with low power consumption and high frequency band characteristics, capable of being subjected to power on and power down at high speed. CONSTITUTION:A power-down switch MOSFET 117 is provided on an amplifier 106. In a bias circuit 105 producing the bias voltage at the operation point, a power-down switch MOSFET 110 is provided. The output of the bias circuit 105 is connected to the input terminal of the amplifier 106 through a resistance 107. When the power-on signal PON is at the power-down state at high level, a node 108 is forced to the earth potential GND. In the power-on state, the node 108 is biased at the level of the operation point of the amplifier.

5. 发明专利

JPH06303268A PHASE COMPARATING CIRCUIT AND DEMODULATING CIRCUIT PROVIDING THE SAME 失效
公开(公告)号：JPH06303268A
公开(公告)日：1994-10-28
申请号：JP31060693
申请日：1993-12-10
申请人： HITACHI LTD
发明人： MATSUBARA OSAMU , YOKOTA MITSUKUNI , IGARASHI YUUKI , ISHIHARA HAYATO , YAMAKIDO KAZUO , OKAZAKI TAKAO , FURUKAWA KATSUHIRO , AKIYAMA HIROKI
IPC分类号： H03D3/00 , H03D3/14 , H04L27/22 , H04L27/227
摘要： PURPOSE:To execute phase comparison with high precision in a phase comparing circuit. CONSTITUTION:The circuit is the phase comparing circuit for detecting phase difference between an input signal VIN and a referring signal LO to be reference. It is provided with a phase difference detecting means 20 outputting a pulse with pulse width corresponding to phase difference between the input signal VIN and the referring signal LO, a voltage converting means 11 converting the pulse outputted from the phase difference detecting means 20 into a voltage value corresponding to the pulse width of the pulse, an analog/ digital converting means 13 converting the voltage value outputted from the voltage converting means 11 into a digital value based on the voltage value to be reference, an adjusting means 12 adjusting the voltage value to be reference in the analog/digital converting means 13 and a control means 41 controlling the adjusting means to execute adjustment and outputting an adjusting signal for adjustment.

6. 发明专利

JPH058578B2 失效
公开(公告)号：JPH058578B2
公开(公告)日：1993-02-02
申请号：JP7287383
申请日：1983-04-27
申请人： HITACHI LTD
发明人： FURUKAWA KATSUHIRO , SAKAGUCHI JIRO
IPC分类号： H01L27/04 , H01L21/82 , H01L21/822 , H01L23/525

7. 发明专利

JPH01198815A COMPARATOR 失效
公开(公告)号：JPH01198815A
公开(公告)日：1989-08-10
申请号：JP26154587
申请日：1987-10-19
申请人： HITACHI LTD , HITACHI VLSI ENG
发明人： KODERA KOICHI , DAIMON KAZUO , FURUKAWA KATSUHIRO
IPC分类号： H03F3/45
摘要： PURPOSE:To make the vicinity of a power voltage to be in the operating range with comparatively simple circuit constitution by providing a selecting means selecting the output of the 1st and 2nd differential amplifier means in response to the comparison reference level. CONSTITUTION:For example, a 1st differential amplifier circuit 1 having an N-channel input MOSFET and for example, a 2nd differential, amplifier circuit 2 having a P-channel input MOSFET are provided. The output selection operation in an output selection circuit 4 and the setting operation by a comparator voltage setting circuit 3 are applied based on a control signal outputted from a control circuit 5. That is, the 2nd differential amplifier circuit 2 is selected with respect to a comparison reference voltage Vref near one power voltage like a ground potential if the circuit, and the 1st differential amplifier circuit 1 is selected with respect to a comparison reference voltage Vref near other power voltage like a power supply potential of the circuit. Thus, the circuit is operated stably even in the vicinity of the power voltage and the comparison operating range is expanded by comparatively simple circuit constitution.

8. 发明专利

JPS62150919A SWITCHED CAPACITOR FILTER 失效
公开(公告)号：JPS62150919A
公开(公告)日：1987-07-04
申请号：JP29054485
申请日：1985-12-25
申请人： HITACHI LTD
发明人： FURUKAWA KATSUHIRO , FUJII FUMIAKI , SAKAGUCHI JIRO
IPC分类号： H03H19/00
摘要： PURPOSE:To obtain a narrow band frequency discrimination circuit transmitting only a frequency signal being an odd number of times of the sampling frequency by supplying an input signal having a frequency band including a signal being an odd number of times of the sampling frequency. CONSTITUTION:A signal at an input terminal is fed to a switched capacitor filter operated according to the sampling signal set to a frequency being 1/(2N+1) of the specific frequency included in the signal frequency band so as to send the specific frequency signal having an odd number (2N+1) times of the frequency of the sampling signal. For example, an input signal Vin is fed to one electrode of an input capacitor CI via a switch means SI and the other electrode is coupled with an inversed input terminal (-) of an operational amplifier circuit OP. A feedback capacitor Cf is provided between the inversed input terminal (-) and an output terminal of the operational amplifier OP. Further, a capacitor C2 whose one electrode is connected to a ground potential and whose other electrode is connected laternately to the inverting input (-) and the output terminal of the operational amplifier circuit OP via a changeover switch means S2 is provided.

9. 发明专利

JPS6298822A SEMICONDUCTOR INTEGRATED CIRCUIT 失效
公开(公告)号：JPS6298822A
公开(公告)日：1987-05-08
申请号：JP23729085
申请日：1985-10-25
申请人： HITACHI LTD
发明人： NAGAI KENJI , FURUKAWA KATSUHIRO
IPC分类号： H03K17/687
摘要： PURPOSE:To decrease the generation frequency of a latch-up phenomenon caused by an internal circuit, by providing a selection controlling circuit for setting a transfer gate circuit to an off-state irrespective of an internal control signal, based on a control signal for instructing a standby mode. CONSTITUTION:A transfer gate 3 for supplying an analog signal from an internal circuit 1, to an external output terminal Pout is connected between an output terminal of a CMOS inverter circuit of the internal circuit 1 and the external output terminal Pout. A gate of an MOSFET Q4 of this transfer gate circuit 3 is connected to an output terminal of a selection controlling circuit 5, and a gate of a MOSFET Q3 is connected to the output terminal of the selection controlling circuit 5 through an inverter circuit 4. Accordingly, the transfer gate circuit 3 is brought to a switch control by the same phase, based on an output of the selection controlling circuit 5. The selection controlling circuit 5 sets the transfer gate circuit 3 to an off-state irrespective of a level of an internal control signal phi1, based on a control signal phi0 for instructing a standby mode.

10. 发明专利

JPS59200453A Manufacture of semiconductor device 失效
标题翻译：半导体器件的制造
公开(公告)号：JPS59200453A
公开(公告)日：1984-11-13
申请号：JP7287383
申请日：1983-04-27
申请人： Hitachi Ltd
发明人： FURUKAWA KATSUHIRO , SAKAGUCHI JIROU
IPC分类号： H01L27/04 , H01L21/82 , H01L21/822 , H01L23/525
CPC分类号： H01L23/5256 , H01L2924/0002 , H01L2924/00
摘要： PURPOSE:To form a hole on a fuse without increasing the number of processes by executing the removal of a PSG film and the formation of an oxide film on the fuse by utilizing a manufacturing process for a capacitor in an MISFET with the fuse and the capacitor. CONSTITUTION:A gate electrode 4 is formed in an active region in a silicon substrate 1 and an electrode 5 for a capacitor and a fuse 6 on a field oxide film 2. A source region 7 and a drain region 8 are formed, and a PSG film 9 as an inter-layer insulating film is shaped. Holes 10, 11 are formed through etching, and silicon oxide films 12, 13 are shaped through oxidation treatment. Contact holes 14, 15 are formed, Al wiring layers 16, 16a are shaped through patterning, and the capacitor C is constituted by the electrode 5, the oxide film 12 and the Al wiring layer 16a. The silicon surface of the fuse is not corroded when Si residue is removed and treated because the silicon surface is coated with the oxide film 13. An SiO2 film 17 is formed, and a hole 18 is shaped to expose one part of the fuse 6.
摘要翻译：目的：通过利用熔丝和电容器的MISFET中的电容器的制造工艺，通过执行去除PSG膜并在熔丝上形成氧化膜，在不增加工艺数量的情况下在熔丝上形成孔。构成：栅电极4形成在硅衬底1的有源区和用于电容器的电极5和场氧化膜2上的保险丝6上。形成源极区7和漏极区8，并且形成PSG 形成作为层间绝缘膜的膜9。孔10,11通过蚀刻形成，氧化硅膜12,13通过氧化处理成形。形成接触孔14,15，通过图案化形成Al布线层16,16a，电容器C由电极5，氧化膜12和Al布线层16a构成。当硅表面被氧化膜13涂覆时，由于硅表面被除去和处理，所以保险丝的硅表面没有被腐蚀。形成SiO 2膜17，并且形成孔18以使熔丝6的一部分露出。

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