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1. 发明专利

JPH09214568A DRIVER AND COMMUNICATION LSI 失效
公开(公告)号：JPH09214568A
公开(公告)日：1997-08-15
申请号：JP3741196
申请日：1996-01-30
申请人： HITACHI LTD , HITACHI TOBU SEMICONDUCTOR LTD
发明人： TAKEUCHI YUSUKE , KUDO MASAKI , OKAZAKI TAKAO
IPC分类号： H01L21/8238 , H01L27/092 , H03K19/0175 , H03K19/0948 , H03M5/16 , H04L25/49
摘要： PROBLEM TO BE SOLVED: To reduce the noise of a driver. SOLUTION: Timing control logic CONT1 and CONT2 start the supply of current to load by p-channel type MOS transistors MA3 and MB3 faster than the supply of current to a transformer 31 by p-channel type MOS transistors MA1 and MB1. Since the capacitive component of load is charged, sudden current at the time of driving load is relieved and therefore the occurrence of noise is suppressed.

2. 发明专利

JPH07202595A INVERTER TYPE AMPLIFIER 失效
公开(公告)号：JPH07202595A
公开(公告)日：1995-08-04
申请号：JP35179493
申请日：1993-12-28
申请人： HITACHI LTD
发明人： NISHIKAWA NORIMITSU , OKAZAKI TAKAO , YAMAKIDO KAZUO , FURUKAWA KATSUHIRO
IPC分类号： H03F3/72
摘要： PURPOSE:To provide the inverter type amplifier with low power consumption and high frequency band characteristics, capable of being subjected to power on and power down at high speed. CONSTITUTION:A power-down switch MOSFET 117 is provided on an amplifier 106. In a bias circuit 105 producing the bias voltage at the operation point, a power-down switch MOSFET 110 is provided. The output of the bias circuit 105 is connected to the input terminal of the amplifier 106 through a resistance 107. When the power-on signal PON is at the power-down state at high level, a node 108 is forced to the earth potential GND. In the power-on state, the node 108 is biased at the level of the operation point of the amplifier.

3. 发明专利

JPH06303268A PHASE COMPARATING CIRCUIT AND DEMODULATING CIRCUIT PROVIDING THE SAME 失效
公开(公告)号：JPH06303268A
公开(公告)日：1994-10-28
申请号：JP31060693
申请日：1993-12-10
申请人： HITACHI LTD
发明人： MATSUBARA OSAMU , YOKOTA MITSUKUNI , IGARASHI YUUKI , ISHIHARA HAYATO , YAMAKIDO KAZUO , OKAZAKI TAKAO , FURUKAWA KATSUHIRO , AKIYAMA HIROKI
IPC分类号： H03D3/00 , H03D3/14 , H04L27/22 , H04L27/227
摘要： PURPOSE:To execute phase comparison with high precision in a phase comparing circuit. CONSTITUTION:The circuit is the phase comparing circuit for detecting phase difference between an input signal VIN and a referring signal LO to be reference. It is provided with a phase difference detecting means 20 outputting a pulse with pulse width corresponding to phase difference between the input signal VIN and the referring signal LO, a voltage converting means 11 converting the pulse outputted from the phase difference detecting means 20 into a voltage value corresponding to the pulse width of the pulse, an analog/ digital converting means 13 converting the voltage value outputted from the voltage converting means 11 into a digital value based on the voltage value to be reference, an adjusting means 12 adjusting the voltage value to be reference in the analog/digital converting means 13 and a control means 41 controlling the adjusting means to execute adjustment and outputting an adjusting signal for adjustment.

4. 发明专利

JPH06301429A REFERENCE VOLTAGE GENERATING CIRCUIT 失效
公开(公告)号：JPH06301429A
公开(公告)日：1994-10-28
申请号：JP8605893
申请日：1993-04-13
申请人： HITACHI LTD , HITACHI TOBU SEMICONDUCTOR LTD
发明人： SONOBE HIROAKI , OKAZAKI TAKAO
IPC分类号： G05F1/10 , H03M1/06 , H03M1/34
摘要： PURPOSE:To quicken the rising and falling of an output reference voltage by providing a voltage transmission circuit which forms a by-pass between the input and output of a filter when the power source is turned ON and a discharging circuit which discharges electric charges accumulated in the filter when the power source is turned OFF. CONSTITUTION:When the power source is turned ON, reference voltages Vr1 and Vr2 which are in certain proportional relation to the reference voltage VS generated by a reference voltage generation source 1 are generated by a voltage converter 2 and the voltage transmission circuit 6 is operated with a power-ON signal Son to by-pass the resistance Rt of the filter 4. Consequently, the time constant of the filter 4 becomes small and the reference voltages Vr1 and Vr2 generated by the voltage converter 2 can rise immediately while charging the capacitor Ct of the filter 4. Then when the power source is turned OFF, the discharging circuit 7 operates and electric charges left in the capacitor Ct of the filter 4 are speedily discharged. Consequently, the output reference voltages Vr1 and Vr2 immediately fall.

5. 发明专利

JPH06152671A SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE 失效
公开(公告)号：JPH06152671A
公开(公告)日：1994-05-31
申请号：JP31642692
申请日：1992-10-30
申请人： HITACHI LTD , KOKUSAI ELECTRIC CO LTD
发明人： KITA MASAHITO , OKAZAKI TAKAO , YAMAKIDO KAZUO , URABE KENZO
IPC分类号： H03D3/00 , H03D3/02 , H04L27/22 , H04L27/233
摘要： PURPOSE:To obtain a DC voltage signal corresponding to a phase difference with high accuracy by using a phase control circuit so as to generate a signal with a pulse width corresponding to the phase difference of two input pulses and applying the signal to an LPF through a CMOS inverter. CONSTITUTION:A pulse signal having a pulse width of an input pulse from terminals 1, 2 and having a phase proportional to a phase difference is outputted from an output of an exclusive OR circuit 11. The pulse signal is waveform- shaped by a waveform shaping circuit 50 and converted into a stable pulse signal independently of fluctuation of a power supply voltage by a switch circuit 51 utilizing the CMOS inverter circuit. Then a dummy MOS circuit 53 cancels a feed-through noise generated from the circuit 51. An output of the circuit 53 is smoothed by an active LPF circuit 54. The smoothed DC voltage is outputted from a terminal 3 through an output buffer 56 comprising a voltage follower circuit.

6. 发明专利

JPH03101520A PLL CIRCUIT 失效
公开(公告)号：JPH03101520A
公开(公告)日：1991-04-26
申请号：JP23881489
申请日：1989-09-14
申请人： HITACHI LTD
发明人： OKAZAKI TAKAO
IPC分类号： H03L7/087
摘要： PURPOSE:To suppress jitters and a steady-state error by providing a phase comparator circuit forming stably a desired phase difference signal and a phase comparator circuit not almost causing hazard, and making both the circuits effective selectively in response to the phase pull-in state of a PLL circuit. CONSTITUTION:A phase comparator circuit PFC1, although causing hazard, stably forms a desired phase difference signal independently of the phase difference between an input clock signal phir and an internal clock signal phiv. The operating enable area of a phase comparator circuit PFC2 is limited to the case that the phase difference of both the clock signals is comparatively small, but hazard is not almost caused. A selection circuit SL delivering a phase difference signal from the phase comparator circuit selectively according to the phase difference of both the clock signals, that is, the phase pull-in state of the PLL circuit is provided. Thus, the optimum phase comparator circuit is selectively valid according to the phase lock state and jitters and a steady-state phase error are suppressed.

7. 发明专利

JPH03101410A VOLTAGE CONTROLLED OSCILLATING CIRCUIT 失效
公开(公告)号：JPH03101410A
公开(公告)日：1991-04-26
申请号：JP23702189
申请日：1989-09-14
申请人： HITACHI LTD
发明人： SATO HARUYUKI , OKAZAKI TAKAO
IPC分类号： H03K3/354
摘要： PURPOSE:To eliminate the need for n-set of current sources in the case of connecting n-stage of inverters and to reduce the chip area by varying a potential difference between a source of an N-channel MOS and a source of a P- channel MOS to control a current flowing to the inverter thereby controlling a delay time of the inverter. CONSTITUTION:The circuit consists of a control input terminal (a), a source follower (b) comprising an N-channel MOS, a + power terminal (c), an output terminal (d), a resistor (e) and a CMOS inverter F. Then a control voltage inputted to the control input terminal (a) is fed to the source of a P-channel MOS of the CMOS inverter F through a source follower (b) of the N-channel MOS. Thus, the potential difference between the source of the P-channel MOS of the CMOS inverter F and the source of the n-channel MOS varies with the control voltage to vary the delay time of the CMOS inverter F. Thus, even when n-stage of inverters are connected, n-set of current sources are not required, then the chip area is reduced.

8. 发明专利

JPS6271332A PLL CIRCUIT 失效
公开(公告)号：JPS6271332A
公开(公告)日：1987-04-02
申请号：JP20995285
申请日：1985-09-25
申请人： HITACHI LTD
发明人： OKAZAKI TAKAO
IPC分类号： H03L7/18 , H03L7/06 , H03L7/08
摘要： PURPOSE:To quicken a pull-in time by increasing the control current deciding the high frequency gain attended with the rise of a control voltage to compensate the reduction in the high frequency. CONSTITUTION:As the control voltage VC increases, the current value of control currents Id', Iu' formed by MOSFETs Q2, Q3 is increased. As a result, since the control currents Id', Iu' formed by the MOSFETs Q2, Q3 are increased proportionally to the decrease in the high frequency gain by MOSFETs Q5, Q6 attended with the increase in the control voltage VC shown in dotted lines in the characteristic diagram, the high frequency gain is increased as shown in broken lines. Thus, even in the speed worst state SW' where the current hardly flows in the MOSFET due to, e.g., the variation of process, a sufficient high frequency gain is obtained as shown in arrows.

9. 发明专利

JP2010279138A Step-up dc-dc switching converter and semiconductor integrated circuit device 审中-公开
标题翻译：升压DC-DC开关转换器和半导体集成电路器件
公开(公告)号：JP2010279138A
公开(公告)日：2010-12-09
申请号：JP2009128419
申请日：2009-05-28
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： YAMAMOTO MASAHIKO , OKAZAKI TAKAO
IPC分类号： H02M3/155 , H01L21/822 , H01L27/04
CPC分类号： H02M3/156
摘要： PROBLEM TO BE SOLVED: To provide a step-up dc-dc switching converter with a booster circuit that enables stable control not depending upon the logical threshold voltage of a semiconductor switch element, and to provide a semiconductor integrated circuit.
SOLUTION: The step-up dc-dc switching converter includes a control logic 10 which generates a drive voltage to be supplied to a semiconductor switch element 20, a power circuit 60 which boosts the voltage of a battery and shifts the level of the drive voltage that the control logic outputs, and an amplifying element 50 which operates using a voltage generated by the semiconductor switch element 20 as its power. A semiconductor switch element control signal VGATE with its level shifted is higher than the logical threshold voltage of the semiconductor switch element 20, thereby controlling the ON/OFF of the semiconductor switch element 20.
COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：提供一种具有升压电路的升压型DC-DC开关转换器，其能够不依赖于半导体开关元件的逻辑阈值电压的稳定控制，并提供半导体集成电路。解决方案：升压型DC-DC开关转换器包括产生要提供给半导体开关元件20的驱动电压的控制逻辑10，电源电路60，其提高电池的电压并使电平控制逻辑输出的驱动电压，以及使用由半导体开关元件20产生的电压作为其功率而工作的放大元件50。其电平偏移的半导体开关元件控制信号VGATE高于半导体开关元件20的逻辑门限电压，从而控制半导体开关元件20的导通/截止。（C）2011年，JPO＆INPIT

10. 发明专利

JPH10242857A SIGNAL PROCESSING CIRCUIT 失效
公开(公告)号：JPH10242857A
公开(公告)日：1998-09-11
申请号：JP4520497
申请日：1997-02-28
申请人： HITACHI LTD
发明人： ABE YOSHITAKA , OKAZAKI TAKAO
IPC分类号： H03M1/00 , H03H17/00 , H03M1/12
摘要： PROBLEM TO BE SOLVED: To provide a technology to reduce multiplication noise in digital signal processing. SOLUTION: The signal processing circuit having an A/D converter means 1 that converts a received analog signal into a digital signal, a digital signal processing means DSP that applies digital signal processing to an output signal of the A/D converter means, and a D/A converter means 2 that converts the signal processing result of the digital signal processing means into an analog signal and providing an output of the analog signal, is provided with a negative feedback circuit Mix that applies negative feedback of the output signal of the D/A converter means to an input of the A/D converter means to reduce multiplication noise.

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