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1. 发明授权

US07292594B2 Weighted fair share scheduler for large input-buffered high-speed cross-point packet/cell switches 有权
标题翻译：用于大输入缓冲高速交叉点分组/小区交换机的加权公平共享调度器
公开(公告)号：US07292594B2
公开(公告)日：2007-11-06
申请号：US10339796
申请日：2003-01-09
申请人： Gopalakrishnan Meempat , Gopalakrishnan Ramamurthy , William J. Dally
发明人： Gopalakrishnan Meempat , Gopalakrishnan Ramamurthy , William J. Dally
IPC分类号： H04L12/56
CPC分类号： H04L49/254 , H04L49/101 , H04L49/3027 , H04L49/3045
摘要： A switching fabric connects input ports to output ports. Each input has an input pointer referencing an output port, and each output has an output pointer referencing an input port. An arbiter includes input and output credit allocators, and an arbitration module (matcher). The input credit allocator resets input credits associated with input/output pairs and updates the input pointers. Similarly, the output credit allocator resets output credits associated with input/output pairs and updates the output pointers. The matcher matches inputs to outputs based on pending requests and available input and output credits. A scheduler schedules transmissions through the cross-bar switch according to the arbiter's matches.
摘要翻译：交换结构将输入端口连接到输出端口。每个输入都有一个引用输出端口的输入指针，每个输出都有一个引用输入端口的输出指针。仲裁器包括输入和输出信用分配器，以及仲裁模块（匹配器）。输入信用分配器重置与输入/输出对相关联的输入信用，并更新输入指针。类似地，输出信用分配器重置与输入/输出对相关联的输出信用并更新输出指针。匹配器根据挂起的请求和可用的输入和输出信用量将输入匹配到输出。调度器根据仲裁器的匹配程序调度通过交叉开关的传输。

2. 发明授权

US07292580B2 Method and system for guaranteeing quality of service in a multi-plane cell switch 有权
标题翻译：保证多平面单元开关中服务质量的方法和系统
公开(公告)号：US07292580B2
公开(公告)日：2007-11-06
申请号：US10325700
申请日：2002-12-18
申请人： Gopalakrishnan Ramamurthy , Gopalakrishnan Meempat , William J. Dally
发明人： Gopalakrishnan Ramamurthy , Gopalakrishnan Meempat , William J. Dally
IPC分类号： H04L12/56
CPC分类号： H04L12/5601 , H04L2012/5629 , H04L2012/5638 , H04L2012/5651 , H04L2012/5679 , H04L2012/5681
摘要： Data cells of plural classes are transferred from input ports to output ports through a switch by storing the cells at each input port in class-specific virtual output queues (VOQ) within sets of VOQs associated with output ports, and providing credits to VOQs according to class-associated guaranteed bandwidths. When a cell is received at a VOQ having credits, a high-priority request for transfer is generated. If a cell is received at a VOQ that does not have any available credits, a low-priority request for transfer is generated. In response to requests, grants are issued to VOQ sets without regard to class, high-priority requests being favored over low-priority requests. When a grant is received for a particular VOQ set, an arbitrator selects a VOQ from the set, giving priority to VOQs having credits over VOQs without credits, and a cell from the selected VOQ is transferred. Requests generated from all input ports are forwarded to a central scheduler associated with a switch fabric slice, the central scheduler issuing the grants. The switch fabric may comprise multiple slices and a central scheduler, across which requests may be distributed in parallel, for example, the switch fabric slices being selected in a fixed order. While all high-priority requests are granted, low priority requests may be granted by the central scheduler according to a weighted fair share policy.
摘要翻译：将多个类的数据单元通过交换机从输入端口传送到输出端口，通过将输出端口中的单元存储在与输出端口相关联的VOQ集合内的类特定虚拟输出队列（VOQ）中，并根据类相关保证带宽。当在具有信用的VOQ接收到信元时，产生高优先级的转移请求。如果在没有任何可用信用的VOQ接收到信元，则生成低优先级的转移请求。响应请求，向VOQ集发出授权，而不考虑低优先级请求的类别，优先级高的请求。当针对特定VOQ集合接收到授权时，仲裁者从该集合中选择一个VOQ，优先考虑具有不带信用的VOQ的信用的VOQ，并且从所选择的VOQ中传送一个信元。从所有输入端口产生的请求被转发到与交换机结构切片相关联的中央调度器，中央调度器发出授权。交换结构可以包括多个片段和中央调度器，跨平台地分发请求，例如，以固定顺序选择交换结构片段。当所有高优先级请求被授予时，中央调度器可以根据加权公平共享策略授予低优先级请求。

3. 发明授权

US07408959B2 Method and apparatus for ensuring cell ordering in large capacity switching systems and for synchronizing the arrival time of cells to a switch fabric 有权
标题翻译：用于确保大容量交换系统中的小区排序并使小区到交换结构的到达时间同步的方法和装置
公开(公告)号：US07408959B2
公开(公告)日：2008-08-05
申请号：US10325701
申请日：2002-12-18
申请人： Martin Braff , Gopalakrishnan Ramamurthy , William J. Dally
发明人： Martin Braff , Gopalakrishnan Ramamurthy , William J. Dally
IPC分类号： H04J3/06
CPC分类号： H04L12/5601 , H04L49/608 , H04L2012/5674 , H04L2012/5681
摘要： Where links between a port module and plural switch fabric slices are of various lengths, a cell is transmitted from the port module to a switch fabric slice in response to a grant. The transmission is delayed by an amount based on a link round trip delay (RTD) value for the corresponding link between the port module and the switch fabric slice, and a predetermined global delay value. As a result of this delay, the cell arrives at the switch fabric slice at a fixed number of cell times (equal to the global delay value) after issuance of the grant, independent of any link lengths.
摘要翻译：在端口模块和多个交换矩阵切片之间的链路具有不同长度的情况下，响应于授权，小区从端口模块传输到交换矩阵切片。基于端口模块和交换矩阵切片之间的对应链路的链路往返延迟（RTD）值和预定的全局延迟值，传输延迟一定量。作为这种延迟的结果，独立于任何链路长度，小区在发放授权之后以固定数量的小区时间（等于全局延迟值）到达交换矩阵切片。

4. 发明授权

US5530695A UPC-based traffic control framework for ATM networks 失效
标题翻译：基于UPC的ATM网络流量控制框架
公开(公告)号：US5530695A
公开(公告)日：1996-06-25
申请号：US167337
申请日：1993-12-15
申请人： Rajiv Dighe , Gopalakrishnan Ramamurthy , Dipankar Raychaudhuri
发明人： Rajiv Dighe , Gopalakrishnan Ramamurthy , Dipankar Raychaudhuri
IPC分类号： H04Q3/00 , H04L12/56 , H04Q11/04 , H04L12/26
CPC分类号： H04L12/5602 , H04L49/255 , H04Q11/0478 , H04L2012/5614 , H04L2012/5629 , H04L2012/5632 , H04L2012/5635 , H04L2012/5637 , H04L2012/564 , H04L2012/5645 , H04L2012/5651 , H04L2012/568
摘要： An asynchronous transfer mode (ATM) traffic control framework is based on an integrated usage parameter control (UPC) approach, which approach provides a unified and scalable solution to the issue of quality-of-services (QOS) levels over a range of anticipated services in ATM based networks. The approach is consistent with emerging ATM Forum and CCITT standards. Additionally, a UPC-based call and burst admission control providing the desired QOS over periods of network overload by call/burst admission control and traffic shaping of source stream preferably uses a dual leaky bucket.
摘要翻译：异步传输模式（ATM）流量控制框架基于集成使用参数控制（UPC）方法，该方法为一系列预期服务提供统一和可扩展的解决方案以解决服务质量（QOS）问题在基于ATM的网络中。该方法与新兴的ATM论坛和CCITT标准相一致。此外，通过呼叫/突发准入控制和源流的流量整形，通过网络过载周期提供期望的QOS的基于UPC的呼叫和突发准入控制优选地使用双漏斗。

5. 发明授权

US5737313A Design of a closed loop feed back control for ABR service 失效
标题翻译： ABR服务闭环反馈控制的设计
公开(公告)号：US5737313A
公开(公告)日：1998-04-07
申请号：US616389
申请日：1996-03-15
申请人： Aleksandar Kolarov , Gopalakrishnan Ramamurthy
发明人： Aleksandar Kolarov , Gopalakrishnan Ramamurthy
IPC分类号： H04Q3/00 , H04L12/56 , H04Q11/04 , H04L12/26
CPC分类号： H04L49/3081 , H04Q11/0478 , H04L2012/5635 , H04L2012/5681
摘要： A rate based feedback congestion control at an ATM switch for ABR vservice is based upon the state of the switch queue fill. Individual ABR virtual channels are informed of an explicit rate at which the virtual channels are allowed to transmit cells.
摘要翻译：用于ABR vservice的ATM交换机上的基于速率的反馈拥塞控制基于交换机队列填充的状态。通知单个ABR虚拟通道显示虚拟通道允许传输单元的速率。

6. 发明授权

US06408005B1 Dynamic rate control scheduler for ATM networks 失效
标题翻译： ATM网络的动态速率控制调度器
公开(公告)号：US06408005B1
公开(公告)日：2002-06-18
申请号：US08924820
申请日：1997-09-05
申请人： Ruixue Fan , Brian L. Mark , Gopalakrishnan Ramamurthy
发明人： Ruixue Fan , Brian L. Mark , Gopalakrishnan Ramamurthy
IPC分类号： H04L1228
CPC分类号： H04L47/29 , H04L12/5602 , H04L47/22 , H04L47/50 , H04L49/3081 , H04L2012/5636 , H04L2012/5651 , H04L2012/5679 , H04L2012/5681 , H04L2012/5682 , H04Q11/0478
摘要： A Dynamic Rate Control (DRC) scheduler for scheduling cells for service in a generic Asynchronous Transfer Mode (ATM) switch is disclosed. According to the inventive DRC, each traffic stream associated with an internal switch queue is rate-shaped according to a rate which consists of a minimum guaranteed rate and a dynamic component computed based on congestion information within the switch. While achieving high utilization, DRC guarantees a minimum throughput for each stream and fairly distributes unused bandwidth. The distribution of unused bandwidth in DRC can be assigned flexibly, i.e., the unused bandwidth need not be shared in proportion to the minimum throughput guarantees, as in weighted fair share schedulers. Moreover, an effective closed-loop QoS control can be built into DRC by dynamically updating a set of weights based on observed QoS. Another salient feature of DRC is its ability to control congestion internal congestion at bottleneck points within a multistage switch. DRC can also be extended beyond the local switch in a hop-by-hop fashion.
摘要翻译：公开了一种用于在通用异步传输模式（ATM）交换机中调度用于服务的小区的动态速率控制（DRC）调度器。根据本发明的DRC，与内部交换机队列相关联的每个业务流根据由最小保证速率和基于交换机内的拥塞信息计算的动态组件的速率的速率形状。在实现高利用率的同时，DRC保证每个流的最小吞吐量，并且公平地分配未使用的带宽。可以灵活地分配未使用的带宽在DRC中的分配，即，与加权公平共享调度器中的最小吞吐量保证成比例，不需要共享未使用的带宽。此外，通过基于观察到的QoS动态地更新一组权重，可以在DRC中内置有效的闭环QoS控制。 DRC的另一个突出特点是能够控制多级交换机内瓶颈点的拥塞内部拥塞。 DRC也可以以逐跳方式扩展到本地交换机之外。

7. 发明授权

US5675384A VBR MPEG video encoding for ATM networks with dynamic bandwidth renegotiation 失效
标题翻译： VBR MPEG视频编码用于具有动态带宽重新协商的ATM网络
公开(公告)号：US5675384A
公开(公告)日：1997-10-07
申请号：US538672
申请日：1995-10-03
申请人： Gopalakrishnan Ramamurthy , Dipankar Raychaudhuri , Daniel Jorge Reininger
发明人： Gopalakrishnan Ramamurthy , Dipankar Raychaudhuri , Daniel Jorge Reininger
IPC分类号： H04N5/92 , G06T9/00 , H03M7/30 , H04L12/801 , H04L12/911 , H04L12/951 , H04N7/10 , H04N7/60 , H04N19/00 , H04N19/60 , H04N21/2343 , H04N21/236 , H04N21/2385 , H04N21/434 , H04Q3/00 , H04N7/26
CPC分类号： H04N21/236 , H04L12/5602 , H04N19/115 , H04N19/126 , H04N19/147 , H04N19/152 , H04N19/184 , H04N19/192 , H04N19/61 , H04N21/434 , H04L2012/5616 , H04L2012/5632 , H04L2012/5636 , H04N19/146
摘要： A system for variable bit-rate video coding in which encoding bandwidth as characterized by a usage parameter control (UPC) parameters is renegotiated between a video encoder and an asynchronous transfer mode network in order to maintain quality-of-service and save bandwidth. The coding system includes adjusting the video source quantization in a manner for controlling the occupancy level of a buffer while new UPC parameters are requested from an ATM network.
摘要翻译：一种用于可变比特率视频编码的系统，其中在视频编码器和异步传输模式网络之间重新协商使用参数控制（UPC）参数表征的编码带宽，以便保持服务质量和节省带宽。编码系统包括以从ATM网络请求新的UPC参数的方式调整视频源量化，以便控制缓冲器的占用等级。

8. 发明授权

US5448567A Control architecture for ATM networks 失效
标题翻译： ATM网络的控制架构
公开(公告)号：US5448567A
公开(公告)日：1995-09-05
申请号：US97683
申请日：1993-07-27
申请人： Rajiv Dighe , Alexander T. Ishii , Gopalakrishnan Ramamurthy
发明人： Rajiv Dighe , Alexander T. Ishii , Gopalakrishnan Ramamurthy
IPC分类号： H04Q3/00 , H04L12/56 , H04Q11/04 , H04J3/24
CPC分类号： H04L12/5602 , H04Q11/0478 , H04L2012/5637 , H04L2012/564 , H04L2012/5645
摘要： A control method and architecture is described for an ATM network carrying connectionless data traffic. The method is capable of integrating connection-oriented as well as connectionless traffic. The method takes advantage of the quasi-deterministic nature of the traffic emanating from a source that is being shaped by the leaky bucket shaping algorithm. Alternative methods are provided if such a shaping algorithm is not provided by the CPE which methods still guarantee performance that equals or exceeds shared media networks such as FDDI. Hardware and software embodiments of the methods are disclosed. The invention is particularly applicable to LANs and hubs.
摘要翻译：描述了一种用于承载无连接数据流量的ATM网络的控制方法和架构。该方法能够集成面向连接和无连接的流量。该方法利用由泄漏桶整形算法形成的源发出的流量的准确定性。如果CPE不提供这种整形算法，那么提供替代方法，哪些方法仍然保证等于或超过诸如FDDI的共享媒体网络的性能。公开了该方法的硬件和软件实施例。本发明特别适用于LAN和集线器。

9. 发明授权

US06424622B1 Optimal buffer management scheme with dynamic queue length thresholds for ATM switches 失效
标题翻译： ATM交换机动态队列长度阈值的最优缓冲管理方案
公开(公告)号：US06424622B1
公开(公告)日：2002-07-23
申请号：US09249324
申请日：1999-02-12
申请人： Ruixue Fan , Alexander Ishii , Brian Mark , Gopalakrishnan Ramamurthy , Qiang Ren
发明人： Ruixue Fan , Alexander Ishii , Brian Mark , Gopalakrishnan Ramamurthy , Qiang Ren
IPC分类号： H04L1226
CPC分类号： H04L49/3081 , H04L2012/5679 , H04L2012/5681 , H04L2012/5682 , H04Q11/0478
摘要： A buffer management scheme for an ATM switch where the static and dynamic thresholds are applied appropriately at different levels to ensure efficient and fair usage of buffer memory. A novel dynamic threshold mechanism which, while ensuring fair sharing of memory, maximizes the overall memory utilization. An ATM switch using a dynamic queue threshold scheme, said ATM switch comprising K output port queues and a buffer of B cells sharing said K output port queues, wherein a common threshold is dynamically set for the K output port queues, the common threshold being changed to a new value from an old value when a new cell arrives at any of said K output queues, said new value being a maximum of a length of said any of said K output queues plus one and said old value when total queue length is less than a preset value times B and, said new value being a maximum of a said old value minus one and a statically set minimum buffer threshold when total queue length is greater than or equal to a preset value times B, wherein said preset value is greater than or equal to 0.
摘要翻译：一种用于ATM交换机的缓冲器管理方案，其中静态和动态阈值在不同级别适当地应用以确保缓冲存储器的有效和合理使用。一种新颖的动态阈值机制，在确保公平共享内存的同时，最大限度地提高了内存利用率。一种使用动态队列阈值方案的ATM交换机，所述ATM交换机包括K个输出端口队列和共享所述K个输出端口队列的B个小区的缓冲器，其中为所述K个输出端口队列动态地设置公共阈值，所述公共阈值被改变当新单元到达所述K个输出队列中的任一个时，从旧值到新值，所述新值是所述K个输出队列中的任何一个的长度的最大值加上当总队列长度较少时的所述旧输出队列的长度比预设值乘以B，并且当总队列长度大于或等于预设值乘以B时，所述新值是所述旧值减1的最大值和静态设置的最小缓冲器阈值，其中所述预设值更大大于等于0。

10. 发明授权

US06125116A Message sets for a flexible programmable ATM access multiplexer using functional separation of line and protocol related functions 有权
标题翻译：使用功能分离线路和协议相关功能的灵活可编程ATM接入复用器的消息集
公开(公告)号：US06125116A
公开(公告)日：2000-09-26
申请号：US185592
申请日：1998-11-04
申请人： Rajiv Dighe , Subir K. Biswas , Vasanthi Thirumalai , Kojiro Watanabe , Gopalakrishnan Ramamurthy
发明人： Rajiv Dighe , Subir K. Biswas , Vasanthi Thirumalai , Kojiro Watanabe , Gopalakrishnan Ramamurthy
IPC分类号： H04L12/56 , H04Q11/04 , H04L12/28
CPC分类号： H04Q11/0478 , H04L2012/561 , H04L2012/5626
摘要： The present invention pertains to message sets for use in a flexible programmable multiplexer for accessing an Asynchronous Transfer Mode (ATM) network. The access multiplexer uses a functional separation of line related functions and protocol related functions. Line interface cards perform line related functions. A message set for use in such a multiplexing system that uses a functional separation of line and protocol related functions is provided. The message set includes a general message, a hello message, a configuration message, a line stabilized message, an identify remote message, an identify remote acknowledgement message, a reset remote message, a report statistics message, a report statistics acknowledgement message, a loopback test message and a dynamic rate adaptation message. A flexible programmable multiplexer that uses the message set is also provided.
摘要翻译：本发明涉及用于访问异步传输模式（ATM）网络的灵活可编程多路复用器中的消息集。接入复用器使用线路相关功能和协议相关功能的功能分离。线路接口卡执行线路相关功能。提供了一种用于这种使用线路和协议相关功能的功能分离的复用系统的消息集。消息集包括通用消息，呼叫消息，配置消息，线路稳定消息，标识远程消息，标识远程确认消息，重置远程消息，报告统计消息，报告统计确认消息，环回测试消息和动态速率适配消息。还提供了使用该消息集的柔性可编程多路复用器。

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