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1. 发明申请

US20050094990A1 Heat treatment for edges of multilayer semiconductor wafers 有权
标题翻译：多层半导体晶片边缘的热处理
公开(公告)号：US20050094990A1
公开(公告)日：2005-05-05
申请号：US11008928
申请日：2004-12-13
申请人： Eric Neyret , Christophe Maleville
发明人： Eric Neyret , Christophe Maleville
IPC分类号： H01L21/00 , H01L21/324 , H01L21/762 , H01L21/3205 , A21B2/00 , F26B19/00 , H01L21/26 , H01L21/42 , H01L21/4763 , H01L21/477
CPC分类号： H01L21/3247 , H01L21/67103 , H01L21/76251 , H01L21/76254
摘要： A method for heat treating a multilayer semiconductor wafer having a central region and a peripheral edge each having a surface. The method includes selecting thickness values for the layers of the wafer to provide substantially equivalent heat absorption coefficients both in the central region and the edge of the wafer. This results in a substantially equivalent temperature being attained over the surface of the central region and the peripheral edge during thermal treatment. In turn, that prevents the appearance of slip lines on those surfaces while also preventing deformation of the wafer due to the thermal treatment. To achieve the desired thickness, layers or portions of layers can be selectively added or otherwise provided upon the central region or peripheral edge of the wafer, or on both, to modify the heat absorption coefficient of the wafer.
摘要翻译：一种用于热处理具有各自具有表面的中心区域和周缘的多层半导体晶片的方法。该方法包括选择晶片层的厚度值，以在晶片的中心区域和边缘提供基本相等的吸热系数。这导致在热处理期间在中心区域和外围边缘的表面上获得基本相当的温度。反过来，这也防止了在这些表面上的滑动线的出现，同时也防止了由于热处理导致的晶片的变形。为了实现所需的厚度，层或层的一部分可以选择性地添加或以其他方式设置在晶片的中心区域或周边边缘上，或者在两者上，以改变晶片的吸热系数。

2. 发明授权

US07138344B2 Method for minimizing slip line faults on a semiconductor wafer surface 失效
标题翻译：用于最小化半导体晶片表面上的滑动线故障的方法
公开(公告)号：US07138344B2
公开(公告)日：2006-11-21
申请号：US10671813
申请日：2003-09-25
申请人： Eric Neyret , Christophe Maleville , Ludovic Ecarnot
发明人： Eric Neyret , Christophe Maleville , Ludovic Ecarnot
IPC分类号： H01L21/26 , H01L21/42 , H01L21/324 , H01L21/477
CPC分类号： H01L21/3247 , H01L21/324 , H01L21/76264 , H01L21/76275 , H01L21/76283
摘要： A method for minimizing slip line faults on a surface of a semiconductor wafer that has been obtained using a transfer technique. The method includes heating the semiconductor wafer from an ambient temperature to a first higher temperature and pausing the heating at the first higher temperature for a time sufficient to stabilize the wafer. Then the wafer is heated further from the first higher temperature to a target higher temperature during a predetermined time interval. The further heating during an initial portion of the time interval is conducted at a relatively low heating rate and the heating during a final portion of the time interval is conducted at a relatively higher heating rate to thus minimize slip line faults in the surface of the wafer.
摘要翻译：一种用于使用转印技术获得的半导体晶片的表面上的滑动线故障最小化的方法。该方法包括将半导体晶片从环境温度加热到第一较高温度并暂停在第一较高温度下的加热足以使晶片稳定的时间。然后在预定时间间隔内将晶片从第一较高温度进一步加热到目标较高温度。在时间间隔的初始部分期间的进一步加热以相对低的加热速率进行，并且在时间间隔的最后部分期间的加热以相对较高的加热速率进行，从而使晶片表面中的滑移线故障最小化。

3. 发明授权

US07049250B2 Heat treatment for edges of multilayer semiconductor wafers 有权
标题翻译：多层半导体晶片边缘的热处理
公开(公告)号：US07049250B2
公开(公告)日：2006-05-23
申请号：US11008928
申请日：2004-12-13
申请人： Eric Neyret , Christophe Maleville
发明人： Eric Neyret , Christophe Maleville
IPC分类号： H01L21/324 , H01L21/477 , H01L21/42
CPC分类号： H01L21/3247 , H01L21/67103 , H01L21/76251 , H01L21/76254
摘要： A method for heat treating a multilayer semiconductor wafer having a central region and a peripheral edge each having a surface. The method includes selecting thickness values for the layers of the wafer to provide substantially equivalent heat absorption coefficients both in the central region and the edge of the wafer. This results in a substantially equivalent temperature being attained over the surface of the central region and the peripheral edge during thermal treatment. In turn, that prevents the appearance of slip lines on those surfaces while also preventing deformation of the wafer due to the thermal treatment. To achieve the desired thickness, layers or portions of layers can be selectively added or otherwise provided upon the central region or peripheral edge of the wafer, or on both, to modify the heat absorption coefficient of the wafer.
摘要翻译：一种用于热处理具有各自具有表面的中心区域和周缘的多层半导体晶片的方法。该方法包括选择晶片层的厚度值，以在晶片的中心区域和边缘提供基本相等的吸热系数。这导致在热处理期间在中心区域和外围边缘的表面上获得基本相当的温度。反过来，这也防止了在这些表面上的滑动线的出现，同时也防止了由于热处理导致的晶片的变形。为了实现所需的厚度，层或层的一部分可以选择性地添加或以其他方式设置在晶片的中心区域或周边边缘上，或者在两者上，以改变晶片的吸热系数。

4. 发明授权

US06939783B2 Preventive treatment method for a multilayer semiconductor wafer 有权
标题翻译：多层半导体晶片的预防处理方法
公开(公告)号：US06939783B2
公开(公告)日：2005-09-06
申请号：US10784040
申请日：2004-02-20
申请人： Eric Neyret , Christophe Maleville
发明人： Eric Neyret , Christophe Maleville
IPC分类号： H01L21/762 , H01L21/30 , H01L27/01
CPC分类号： H01L21/76259 , H01L21/76251 , H01L21/76254
摘要： A preventive treatment method for a multilayer semiconductor wafer is described. The semiconductor wafer includes a supporting substrate, at least one intermediate layer and a surface layer in which an intermediate layer has an exposed lateral edge and the wafer is to be subjected to a subsequent treatment. The method includes encapsulating the exposed lateral edge of the intermediate layer with a portion of the surface layer to prevent attack on the peripheral edge during the subsequent treatment.
摘要翻译：对多层半导体晶片的预防处理方法进行说明。半导体晶片包括支撑衬底，至少一个中间层和表面层，其中中间层具有暴露的横向边缘，并且晶片将被进行后续处理。该方法包括将中间层的暴露的侧边缘与表面层的一部分封装，以防止在随后的处理期间对外围边缘的侵蚀。

5. 发明授权

US06903032B2 Method for preparing a semiconductor wafer surface 有权
标题翻译：半导体晶片表面的制备方法
公开(公告)号：US06903032B2
公开(公告)日：2005-06-07
申请号：US10754930
申请日：2004-01-08
申请人： Christophe Maleville , Eric Neyret
发明人： Christophe Maleville , Eric Neyret
IPC分类号： H01L21/26 , H01L21/324 , H01L21/762 , H01L21/44
CPC分类号： H01L21/3247 , H01L21/76254
摘要： A method for preparing a semiconductor wafer wherein rapid thermal annealing is conducted to smooth a free surface of a superficial zone that is supported by the wafer. The improvement includes treating the superficial zone before conducting the rapid thermal annealing to prevent pitting in the superficial zone during the rapid thermal annealing.
摘要翻译：一种制备半导体晶片的方法，其中进行快速热退火以平滑由晶片支撑的表面区域的自由表面。改进包括在进行快速热退火之前处理表面区域，以防止在快速热退火期间在浅表区域中的点蚀。

6. 发明授权

US07081399B2 Method for producing a high quality useful layer on a substrate utilizing helium and hydrogen implantations 有权
标题翻译：使用氦和氢注入在衬底上生产高质量有用层的方法
公开(公告)号：US07081399B2
公开(公告)日：2006-07-25
申请号：US10691403
申请日：2003-10-21
申请人： Christophe Maleville , Eric Neyret , Nadia Ben Mohamed
发明人： Christophe Maleville , Eric Neyret , Nadia Ben Mohamed
IPC分类号： H01L21/301
CPC分类号： H01L21/76254
摘要： A method for producing a high quality useful layer of semiconductor material on a substrate. The method includes implanting at least two different atomic species into a face of a donor substrate to a controlled mean implantation depth to form a weakened zone therein and to define a useful layer. The implanting step is conducted to minimize low-frequency roughness at the weakened zone. Next, the method includes bonding a support substrate to the face of the donor substrate, and detaching the useful layer from the donor substrate along the weakened zone. A structure is thus formed that includes the useful layer on the support substrate with the useful layer presenting a surface for further processing. The technique also includes thermally treating the structure to minimize high-frequency roughness of the surface of the useful layer. The result is a surface having sufficient smoothness so that chemical mechanical polishing (CMP) is not needed.
摘要翻译：一种用于在基板上制造高质量半导体材料有用层的方法。该方法包括将至少两种不同的原子物质植入施主衬底的表面至受控的平均注入深度以在其中形成弱化区域并限定有用层。进行植入步骤以使弱化区域的低频粗糙度最小化。接下来，该方法包括将支撑衬底接合到施主衬底的表面，以及沿着弱化区从施主衬底分离有用层。因此形成了在支撑基板上包括有用层的结构，其中有用层具有用于进一步处理的表面。该技术还包括热处理该结构以最小化有用层的表面的高频粗糙度。结果是具有足够平滑度的表面，使得不需要化学机械抛光（CMP）。

7. 发明申请

US20050026426A1 Method for producing a high quality useful layer on a substrate 有权
标题翻译：在基板上制造高品质有用层的方法
公开(公告)号：US20050026426A1
公开(公告)日：2005-02-03
申请号：US10691403
申请日：2003-10-21
申请人： Christophe Maleville , Eric Neyret , Nadia Ben Mohamed
发明人： Christophe Maleville , Eric Neyret , Nadia Ben Mohamed
IPC分类号： H01L21/762 , H01L21/44
CPC分类号： H01L21/76254
摘要： A method for producing a high quality useful layer of semiconductor material on a substrate. The method includes implanting at least two different atomic species into a face of a donor substrate to a controlled mean implantation depth to form a weakened zone therein and to define a useful layer. The implanting step is conducted to minimize low-frequency roughness at the weakened zone. Next, the method includes bonding a support substrate to the face of the donor substrate, and detaching the useful layer from the donor substrate along the weakened zone. A structure is thus formed that includes the useful layer on the support substrate with the useful layer presenting a surface for further processing. The technique also includes thermally treating the structure to minimize high-frequency roughness of the surface of the useful layer. The result is a surface having sufficient smoothness so that chemical mechanical polishing (CMP) is not needed.
摘要翻译：一种用于在基板上制造高质量半导体材料有用层的方法。该方法包括将至少两种不同的原子物质植入施主衬底的表面至受控的平均注入深度以在其中形成弱化区域并限定有用层。进行植入步骤以使弱化区域的低频粗糙度最小化。接下来，该方法包括将支撑衬底接合到施主衬底的表面，以及沿着弱化区从施主衬底分离有用层。因此形成了在支撑基板上包括有用层的结构，其中有用层具有用于进一步处理的表面。该技术还包括热处理该结构以最小化有用层的表面的高频粗糙度。结果是具有足够平滑度的表面，使得不需要化学机械抛光（CMP）。

8. 发明申请

US20060223283A1 Method for producing a high quality useful layer on a substrate 审中-公开
标题翻译：在基板上制造高品质有用层的方法
公开(公告)号：US20060223283A1
公开(公告)日：2006-10-05
申请号：US11446357
申请日：2006-06-05
申请人： Christophe Maleville , Eric Neyret , Nadia Ben Mohamed
发明人： Christophe Maleville , Eric Neyret , Nadia Ben Mohamed
IPC分类号： H01L21/30
CPC分类号： H01L21/76254 , H01L21/324
摘要： A method for producing a high quality useful layer of semiconductor material on a substrate. The method includes implanting at least two different atomic species into a face of a donor substrate to a controlled mean implantation depth to form a weakened zone therein and to define a useful layer. The implanting step is conducted to minimize low-frequency roughness at the weakened zone. Next, the method includes bonding a support substrate to the face of the donor substrate, and detaching the useful layer from the donor substrate along the weakened zone. A structure is thus formed that includes the useful layer on the support substrate with the useful layer presenting a surface for further processing. The technique also includes thermally treating the structure to minimize high-frequency roughness of the surface of the useful layer. The result is a surface having sufficient smoothness so that chemical mechanical polishing (CMP) is not needed.
摘要翻译：一种用于在基板上制造高质量半导体材料有用层的方法。该方法包括将至少两种不同的原子物质植入施主衬底的表面至受控的平均注入深度以在其中形成弱化区域并限定有用层。进行植入步骤以使弱化区域的低频粗糙度最小化。接下来，该方法包括将支撑衬底接合到施主衬底的表面，以及沿着弱化区从施主衬底分离有用层。因此形成了在支撑基板上包括有用层的结构，其中有用层具有用于进一步处理的表面。该技术还包括热处理该结构以最小化有用层的表面的高频粗糙度。结果是具有足够平滑度的表面，使得不需要化学机械抛光（CMP）。

9. 发明申请

US20060172508A1 Process for transfer of a thin layer formed in a substrate with vacancy clusters 有权
标题翻译：在具有空位簇的衬底中形成的薄层的转移的方法
公开(公告)号：US20060172508A1
公开(公告)日：2006-08-03
申请号：US11128560
申请日：2005-05-13
申请人： Christophe Maleville , Eric Neyret
发明人： Christophe Maleville , Eric Neyret
IPC分类号： H01L21/30 , H01L21/46
CPC分类号： H01L21/76254 , C30B15/00 , C30B29/06 , C30B33/00 , H01L21/02032 , H01L21/3226
摘要： Processes for forming semiconductor structure comprising a transfer layer transferred from a donor substrate are provided in which the resulting structure has improved quality with respect to defects and resulting structures therefrom. For example, a semiconductor on insulator (“SeOI”) structure can be formed using a donor substrate, a support substrate and an insulating layer. The donor substrate may be formed using CZ pulling of semiconductor material at a rate that results in the existence of vacancy clusters. An insulating layer for the SeOI structure can be formed by depositing an oxide layer on the donor or support substrate. An insulating layer can also be formed by thermal oxidizing the support substrate. An SeOI structure can be formed by combining the donor substrate, the support substrate, and the insulating layer there between, and detaching the combination including a thin layer of the donor substrate using a zone of weakness that was formed in the donor substrate. In some embodiments, the donor substrate is initially formed using a technique that results in lower COPs quality or density that if the donor substrate was formed from a Very Slow Pull, and after curing of the thin layer formed therefrom, results in a structure having COPs quality or density that is better than a near perfect crystalline structure.
摘要翻译：提供了用于形成包括从供体基底转移的转印层的半导体结构的方法，其中所得到的结构相对于缺陷和由此产生的结构具有改进的质量。例如，可以使用施主衬底，支撑衬底和绝缘层来形成绝缘体上半导体（“SeO”）结构。施主衬底可以以导致存在空位簇的速率使用CZ拉制半导体材料形成。可以通过在供体或支撑衬底上沉积氧化物层来形成SeOI结构的绝缘层。绝缘层也可以通过热氧化载体基底而形成。可以通过将施主衬底，支撑衬底和其间的绝缘层组合在一起，并且使用在供体衬底中形成的弱化区域来分离包括施主衬底的薄层的组合来形成SeOI结构。在一些实施例中，使用导致更低的COP质量或密度的技术来初始形成施主衬底，如果施主衬底由非常缓慢的拉伸形成，并且在由其形成的薄层固化之后，导致具有COP 质量或密度优于近乎完美的晶体结构。

10. 发明授权

US07749910B2 Method of reducing the surface roughness of a semiconductor wafer 有权
标题翻译：降低半导体晶片的表面粗糙度的方法
公开(公告)号：US07749910B2
公开(公告)日：2010-07-06
申请号：US11189849
申请日：2005-07-27
申请人： Eric Neyret , Ludovic Ecarnot , Christophe Maleville
发明人： Eric Neyret , Ludovic Ecarnot , Christophe Maleville
IPC分类号： H01L21/302
CPC分类号： H01L21/3247 , H01L21/3226 , H01L21/324 , H01L21/76254
摘要： The invention provides a method for reducing the roughness of a free surface of a semiconductor wafer that includes removing material from the free surface of the wafer to provide a treated wafer, and performing a first rapid thermal annealing on the treated wafer in a pure argon atmosphere to substantially reduce the roughness of the free surface of the treated wafer. The material removal is selected and conducted to improve the effectiveness of the subsequent rapid thermal annealing in reducing the roughness of the free surface of the treated wafer.
摘要翻译：本发明提供了一种降低半导体晶片的自由表面的粗糙度的方法，其包括从晶片的自由表面去除材料以提供经处理的晶片，以及在纯氩气氛中对经处理的晶片进行第一次快速热退火以显着降低经处理的晶片的自由表面的粗糙度。选择和进行材料去除以提高随后的快速热退火的效果，以降低经处理的晶片的自由表面的粗糙度。

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