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1. 发明授权

US07138344B2 Method for minimizing slip line faults on a semiconductor wafer surface 失效
标题翻译：用于最小化半导体晶片表面上的滑动线故障的方法
公开(公告)号：US07138344B2
公开(公告)日：2006-11-21
申请号：US10671813
申请日：2003-09-25
申请人： Eric Neyret , Christophe Maleville , Ludovic Ecarnot
发明人： Eric Neyret , Christophe Maleville , Ludovic Ecarnot
IPC分类号： H01L21/26 , H01L21/42 , H01L21/324 , H01L21/477
CPC分类号： H01L21/3247 , H01L21/324 , H01L21/76264 , H01L21/76275 , H01L21/76283
摘要： A method for minimizing slip line faults on a surface of a semiconductor wafer that has been obtained using a transfer technique. The method includes heating the semiconductor wafer from an ambient temperature to a first higher temperature and pausing the heating at the first higher temperature for a time sufficient to stabilize the wafer. Then the wafer is heated further from the first higher temperature to a target higher temperature during a predetermined time interval. The further heating during an initial portion of the time interval is conducted at a relatively low heating rate and the heating during a final portion of the time interval is conducted at a relatively higher heating rate to thus minimize slip line faults in the surface of the wafer.
摘要翻译：一种用于使用转印技术获得的半导体晶片的表面上的滑动线故障最小化的方法。该方法包括将半导体晶片从环境温度加热到第一较高温度并暂停在第一较高温度下的加热足以使晶片稳定的时间。然后在预定时间间隔内将晶片从第一较高温度进一步加热到目标较高温度。在时间间隔的初始部分期间的进一步加热以相对低的加热速率进行，并且在时间间隔的最后部分期间的加热以相对较高的加热速率进行，从而使晶片表面中的滑移线故障最小化。

2. 发明授权

US07749910B2 Method of reducing the surface roughness of a semiconductor wafer 有权
标题翻译：降低半导体晶片的表面粗糙度的方法
公开(公告)号：US07749910B2
公开(公告)日：2010-07-06
申请号：US11189849
申请日：2005-07-27
申请人： Eric Neyret , Ludovic Ecarnot , Christophe Maleville
发明人： Eric Neyret , Ludovic Ecarnot , Christophe Maleville
IPC分类号： H01L21/302
CPC分类号： H01L21/3247 , H01L21/3226 , H01L21/324 , H01L21/76254
摘要： The invention provides a method for reducing the roughness of a free surface of a semiconductor wafer that includes removing material from the free surface of the wafer to provide a treated wafer, and performing a first rapid thermal annealing on the treated wafer in a pure argon atmosphere to substantially reduce the roughness of the free surface of the treated wafer. The material removal is selected and conducted to improve the effectiveness of the subsequent rapid thermal annealing in reducing the roughness of the free surface of the treated wafer.
摘要翻译：本发明提供了一种降低半导体晶片的自由表面的粗糙度的方法，其包括从晶片的自由表面去除材料以提供经处理的晶片，以及在纯氩气氛中对经处理的晶片进行第一次快速热退火以显着降低经处理的晶片的自由表面的粗糙度。选择和进行材料去除以提高随后的快速热退火的效果，以降低经处理的晶片的自由表面的粗糙度。

3. 发明申请

US20060035445A1 Method of reducing the surface roughness of a semiconductor wafer 有权
标题翻译：降低半导体晶片的表面粗糙度的方法
公开(公告)号：US20060035445A1
公开(公告)日：2006-02-16
申请号：US11189849
申请日：2005-07-27
申请人： Eric Neyret , Ludovic Ecarnot , Christophe Maleville
发明人： Eric Neyret , Ludovic Ecarnot , Christophe Maleville
IPC分类号： H01L21/322
CPC分类号： H01L21/3247 , H01L21/3226 , H01L21/324 , H01L21/76254
摘要： The invention provides a method for reducing the roughness of a free surface of a semiconductor wafer that includes removing material from the free surface of the wafer to provide a treated wafer, and performing a first rapid thermal annealing on the treated wafer in a pure argon atmosphere to substantially reduce the roughness of the free surface of the treated wafer. The material removal is selected and conducted to improve the effectiveness of the subsequent rapid thermal annealing in reducing the roughness of the free surface of the treated wafer.
摘要翻译：本发明提供了一种降低半导体晶片的自由表面的粗糙度的方法，其包括从晶片的自由表面去除材料以提供经处理的晶片，以及在纯氩气氛中对经处理的晶片进行第一次快速热退火以显着降低经处理的晶片的自由表面的粗糙度。选择和进行材料去除以提高随后的快速热退火的效果，以降低经处理的晶片的自由表面的粗糙度。

4. 发明申请

US20060024908A1 Method of reducing the surface roughness of a semiconductor wafer 有权
标题翻译：降低半导体晶片的表面粗糙度的方法
公开(公告)号：US20060024908A1
公开(公告)日：2006-02-02
申请号：US11189899
申请日：2005-07-27
申请人： Eric Neyret , Ludovic Ecarnot , Emmanuel Arene
发明人： Eric Neyret , Ludovic Ecarnot , Emmanuel Arene
IPC分类号： H01L21/20
CPC分类号： H01L21/3247 , H01L21/302 , H01L21/324 , H01L21/76254
摘要： A method for reducing the roughness of a free surface of a semiconductor wafer that includes establishing a first atmosphere in an annealing chamber, replacing the first atmosphere with a second atmosphere that includes a gas selected to and in an amount to substantially eliminate or reduce pollutants on a wafer, and exposing the free surface of the wafer to the second atmosphere to substantially eliminate or reduce pollutants thereon. The second atmosphere is then replaced with a third atmosphere that includes pure, and rapid thermal annealing is performed on the wafer exposed to the third atmosphere in the annealing chamber to substantially reduce the roughness of the free surface of the wafer.
摘要翻译：一种用于降低半导体晶片的自由表面的粗糙度的方法，其包括在退火室中建立第一气氛，用第二气氛代替第一气氛，所述第二气氛包括选择的量和基本上消除或减少污染物的量晶片，并且将晶片的自由表面暴露于第二气氛以基本上消除或减少其上的污染物。然后将第二气氛替换为包括纯的第三气氛，并且在退火室中暴露于第三气氛的晶片上进行快速热退火，以显着降低晶片的自由表面的粗糙度。

5. 发明申请

US20120021613A1 FINISHING METHOD FOR A SILICON ON INSULATOR SUBSTRATE 有权
标题翻译：绝缘子基体上硅的整理方法
公开(公告)号：US20120021613A1
公开(公告)日：2012-01-26
申请号：US13257164
申请日：2010-03-17
申请人： Walter Schwarzenbach , Sébastien Kerdiles , Patrick Reynaud , Ludovic Ecarnot , Eric Neyret
发明人： Walter Schwarzenbach , Sébastien Kerdiles , Patrick Reynaud , Ludovic Ecarnot , Eric Neyret
IPC分类号： H01L21/316
CPC分类号： H01L21/76254 , H01L21/02238 , H01L21/02255 , H01L21/02312 , H01L21/30604 , H01L21/31662
摘要： The invention relates to a finishing method for a silicon-on-insulator (SOI) substrate that includes an oxide layer buried between an active silicon layer and a support layer of silicon. The method includes applying the following steps in succession: a first rapid thermal annealing (RTA) of the SOI substrate; a sacrificial oxidation of the active silicon layer of the substrate conducted to remove a first oxide thickness; a second RTA of the substrate; and a second sacrificial oxidation of the active silicon layer conducted to remove a second oxide thickness that is thinner than the first oxide thickness.
摘要翻译：本发明涉及一种绝缘体上硅（SOI）衬底的精加工方法，其包括埋在有源硅层和硅支承层之间的氧化物层。该方法包括以下步骤：SOI衬底的第一快速热退火（RTA）; 用于去除第一氧化物厚度的衬底的有源硅层的牺牲氧化; 底物的第二RTA; 并且对所述有源硅层进行第二牺牲氧化，以去除比所述第一氧化物厚度更薄的第二氧化物厚度。

6. 发明授权

US06962858B2 Method for reducing free surface roughness of a semiconductor wafer 有权
标题翻译：降低半导体晶片的自由表面粗糙度的方法
公开(公告)号：US06962858B2
公开(公告)日：2005-11-08
申请号：US10750443
申请日：2003-12-30
申请人： Eric Neyret , Ludovic Ecarnot
发明人： Eric Neyret , Ludovic Ecarnot
IPC分类号： H01L21/02 , H01L21/26 , H01L21/302 , H01L21/324 , H01L21/762 , H01L27/12 , H01L21/322
CPC分类号： H01L21/3247 , H01L21/302 , H01L21/324 , H01L21/76254
摘要： The invention provides a method of reducing the roughness of the free surface of a wafer of semiconductor material by applying a rapid thermal annealing process under a pure argon atmosphere for a time sufficient to uniformly heat and smooth the free surface of the wafer.
摘要翻译：本发明提供了一种通过在纯氩气氛下施加快速热退火工艺足以使晶片的自由表面均匀加热和平滑的时间来减少半导体材料晶片的自由表面的粗糙度的方法。

7. 发明授权

US08389412B2 Finishing method for a silicon on insulator substrate 有权
标题翻译：硅绝缘体衬底的整理方法
公开(公告)号：US08389412B2
公开(公告)日：2013-03-05
申请号：US13257164
申请日：2010-03-17
申请人： Walter Schwarzenbach , Sébastien Kerdiles , Patrick Reynaud , Ludovic Ecarnot , Eric Neyret
发明人： Walter Schwarzenbach , Sébastien Kerdiles , Patrick Reynaud , Ludovic Ecarnot , Eric Neyret
IPC分类号： H01L21/311
CPC分类号： H01L21/76254 , H01L21/02238 , H01L21/02255 , H01L21/02312 , H01L21/30604 , H01L21/31662
摘要： The invention relates to a finishing method for a silicon-on-insulator (SOI) substrate that includes an oxide layer buried between an active silicon layer and a support layer of silicon. The method includes applying the following steps in succession: a first rapid thermal annealing (RTA) of the SOI substrate; a sacrificial oxidation of the active silicon layer of the substrate conducted to remove a first oxide thickness; a second RTA of the substrate; and a second sacrificial oxidation of the active silicon layer conducted to remove a second oxide thickness that is thinner than the first oxide thickness.
摘要翻译：本发明涉及一种绝缘体上硅（SOI）衬底的精加工方法，其包括埋在有源硅层和硅支承层之间的氧化物层。该方法包括以下步骤：SOI衬底的第一快速热退火（RTA）; 用于去除第一氧化物厚度的衬底的有源硅层的牺牲氧化; 底物的第二RTA; 并且对所述有源硅层进行第二牺牲氧化，以去除比所述第一氧化物厚度更薄的第二氧化物厚度。

8. 发明授权

US07883628B2 Method of reducing the surface roughness of a semiconductor wafer 有权
标题翻译：降低半导体晶片的表面粗糙度的方法
公开(公告)号：US07883628B2
公开(公告)日：2011-02-08
申请号：US11189899
申请日：2005-07-27
申请人： Eric Neyret , Ludovic Ecarnot , Emmanuel Arene
发明人： Eric Neyret , Ludovic Ecarnot , Emmanuel Arene
IPC分类号： B44C1/22 , H01L21/302
CPC分类号： H01L21/3247 , H01L21/302 , H01L21/324 , H01L21/76254
摘要： A method for reducing the roughness of a free surface of a semiconductor wafer that includes establishing a first atmosphere in an annealing chamber, replacing the first atmosphere with a second atmosphere that includes a gas selected to and in an amount to substantially eliminate or reduce pollutants on a wafer, and exposing the free surface of the wafer to the second atmosphere to substantially eliminate or reduce pollutants thereon. The second atmosphere is then replaced with a third atmosphere that includes pure, and rapid thermal annealing is performed on the wafer exposed to the third atmosphere in the annealing chamber to substantially reduce the roughness of the free surface of the wafer.
摘要翻译：一种用于降低半导体晶片的自由表面的粗糙度的方法，其包括在退火室中建立第一气氛，用第二气氛代替第一气氛，所述第二气氛包括选择的量和基本上消除或减少污染物的量晶片，并且将晶片的自由表面暴露于第二气氛以基本上消除或减少其上的污染物。然后将第二气氛替换为包括纯的第三气氛，并且在退火室中暴露于第三气氛的晶片上进行快速热退火，以显着降低晶片的自由表面的粗糙度。

9. 发明授权

US07892861B2 Method for fabricating a compound-material wafer 有权
标题翻译：复合材料晶圆的制造方法
公开(公告)号：US07892861B2
公开(公告)日：2011-02-22
申请号：US11472745
申请日：2006-06-21
申请人： Ludovic Ecarnot , Willy Michel , Patrick Reynaud , Walter Schwarzenbach
发明人： Ludovic Ecarnot , Willy Michel , Patrick Reynaud , Walter Schwarzenbach
IPC分类号： H01L21/66
CPC分类号： H01L21/76254
摘要： The present invention provides improved methods for fabricating compound-material wafers, in particular a silicon on insulator type wafer. The improved methods lead to reduced numbers of deflects arising on or near the periphery of the wafers. In a first method, wafers are selected in dependence on edge roll off values determined at about 0.5-2.5 mm away from the edge of the wafer, where edge roll off values are determined in dependence on the second derivative of the wafer height profiles. In a second method, wafers selected according to the first method are further processed by bonding, forming a splitting layer, and detaching the two wafers at the splitting layer.
摘要翻译：本发明提供了用于制造复合材料晶片，特别是绝缘体上硅晶片的改进方法。改进的方法导致在晶片周边或附近出现的偏转数量减少。在第一种方法中，根据在离晶片边缘约0.5-2.5mm处确定的边缘滚降值来选择晶片，其中根据晶片高度分布的二阶导数来确定边缘滚降值。在第二种方法中，根据第一种方法选择的晶片通过结合进一步处理，形成分裂层，并在分离层处分离两个晶片。

10. 发明申请

US20120009797A1 METHOD TO THIN A SILICON-ON-INSULATOR SUBSTRATE 有权
标题翻译：稀土绝缘子基板的方法
公开(公告)号：US20120009797A1
公开(公告)日：2012-01-12
申请号：US13257901
申请日：2010-04-20
申请人： Patrick Reynaud , Ludovic Ecarnot , Khalid Radouane
发明人： Patrick Reynaud , Ludovic Ecarnot , Khalid Radouane
IPC分类号： H01L21/306
CPC分类号： H01L21/30604 , H01L21/76254
摘要： The invention concerns a method to thin an initial silicon-on-insulator substrate that has a layer of silicon oxide buried between a silicon carrier substrate and a silicon surface layer. This method is noteworthy in that it includes conducting a thermal oxidation treatment of the initial substrate to cause oxidation of part of the silicon surface layer and form a thermal oxide thereon; conducting a first cycle of etching followed by cleaning of the silicon surface layer after the thermal oxidation treatment, wherein the etching of the first cycle is conducted so as fully to remove the thermal oxide from the silicon surface layer to thin it and lift off all unstable parts of the initial substrate at edges thereof to form a thinned substrate; conducting, after the first cycle, a second cycle of etching followed by cleaning of the silicon surface layer, wherein the etching of the second cycle is conducted to remove from the surface of the thinned substrate, polluting particles formed during the first etching cycle and which have deposited thereupon, in order to obtain a final SOI substrate having a thinned surface layer which forms an active layer for the substrate.
摘要翻译：本发明涉及一种薄的初始绝缘硅绝缘体衬底的方法，该衬底具有掩埋在硅载体衬底和硅表面层之间的氧化硅层。该方法值得注意的是，它包括进行初始衬底的热氧化处理以引起部分硅表面层的氧化并在其上形成热氧化物; 进行第一次蚀刻循环，然后在热氧化处理之后清洁硅表面层，其中进行第一次循环的蚀刻，以完全从硅表面层去除热氧化物以使其变薄并提升所有不稳定初始基板的边缘部分以形成薄的基板; 在所述第一循环之后进行第二次蚀刻循环，然后清洁所述硅表面层，其中进行所述第二循环的蚀刻以从所述薄化基板的表面去除污染在第一蚀刻循环期间形成的颗粒，并且其中已经沉积在其上，以获得最终的SOI衬底，其具有形成用于衬底的有源层的薄化表面层。

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