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1. 发明授权

US08461018B2 Treatment for bonding interface stabilization 有权
标题翻译：接合界面稳定性的处理
公开(公告)号：US08461018B2
公开(公告)日：2013-06-11
申请号：US13153709
申请日：2011-06-06
申请人： Eric Neyret , Sebastien Kerdiles
发明人： Eric Neyret , Sebastien Kerdiles
IPC分类号： H01L21/30
CPC分类号： H01L21/76254
摘要： A method and/or system are provided for producing a structure comprising a thin layer of semiconductor material on a substrate. The method includes creating an area of embrittlement in the thickness of a donor substrate, bonding the donor substrate with a support substrate and detaching the donor substrate at the level of the area of embrittlement to transfer a thin layer of the donor substrate onto the support substrate. The method also includes thermal treatment of this resulting structure to stabilize the bonding interface between the thin layer and the substrate support. The invention also relates to the structures obtained by such a process.
摘要翻译：提供了一种方法和/或系统，用于产生包括在衬底上的薄层半导体材料的结构。该方法包括在施主衬底的厚度上形成脆化区域，用支撑衬底粘合施主衬底，并将施主衬底分离在脆化区域的水平，以将施主衬底的薄层转移到支撑衬底上。该方法还包括对所得结构的热处理，以稳定薄层和基底支撑体之间的结合界面。本发明还涉及通过这种方法获得的结构。

2. 发明授权

US07939427B2 Process for fabricating a substrate of the silicon-on-insulator type with reduced roughness and uniform thickness 有权
标题翻译：用于制造绝缘体上硅型衬底的方法，其具有减小的粗糙度和均匀的厚度
公开(公告)号：US07939427B2
公开(公告)日：2011-05-10
申请号：US11849912
申请日：2007-09-04
申请人： Eric Neyret , François Boedt
发明人： Eric Neyret , François Boedt
IPC分类号： H01L21/30 , H01L21/46 , H01L21/322
CPC分类号： H01L21/76254
摘要： A process for fabricating a silicon on insulator (SOI) substrate by co-implanting atomic or ionic species into a semiconductor donor substrate to form a weakened zone therein, the weakened zone forming a boundary between a thin silicon active layer and the remainder of the donor substrate. The donor substrate is then bonded to a semiconductor receiver substrate by molecular adhesion, resulting in a layer of buried silicon interposed between the donor substrate and the receiver substrate. The remainder of the donor substrate is detached along the weakened zone to obtain a SOI substrate with the receiver substrate covered with the buried oxide layer and the thin silicon active layer. The silicon active layer is then thermally annealed for at least 10 minutes in a gaseous atmosphere containing hydrogen, argon or both at a temperature of at least 950° C. but not exceeding 1100° C. The annealing step minimizes roughness of the surface of the silicon active layer, prevents reduction in thickness of the buried oxide layer, and achieves uniform thickness of the thin silicon active layer and the buried oxide layer.
摘要翻译：通过将原子或离子物质共注入到半导体施主衬底中以在其中形成弱化区域来制造绝缘体上硅（SOI）衬底的工艺，该弱化区在薄硅活性层和供体的其余部分之间形成边界基质。然后通过分子粘附将施主衬底结合到半导体接收器衬底，从而在施主衬底和接收器衬底之间形成一层埋置的硅。供体衬底的其余部分沿着弱化区域分离以获得SOI衬底，其中覆盖有掩埋氧化物层和薄硅活性层的接收器衬底。然后将硅活性层在含有氢，氩或两者的气体气氛中在至少950℃但不超过1100℃的温度下热退火至少10分钟。退火步骤使得表面的粗糙度最小化硅有源层，防止掩埋氧化物层的厚度减小，并且实现薄硅有源层和掩埋氧化物层的均匀厚度。

3. 发明申请

US20080014713A1 Treatment for bonding interface stabilization 有权
公开(公告)号：US20080014713A1
公开(公告)日：2008-01-17
申请号：US11788292
申请日：2007-04-19
申请人： Eric Neyret , Sebastien Kerdiles
发明人： Eric Neyret , Sebastien Kerdiles
IPC分类号： H01L21/30
CPC分类号： H01L21/76254
摘要： A method and/or system are provided for producing a structure comprising a thin layer of semiconductor material on a substrate. The method includes creating an area of embrittlement in the thickness of a donor substrate, bonding the donor substrate with a support substrate and detaching the donor substrate at the level of the area of embrittlement to transfer a thin layer of the donor substrate onto the support substrate. The method also includes thermal treatment of this resulting structure to stabilize the bonding interface between the thin layer and the substrate support. The invention also relates to the structures obtained by such a process.

4. 发明授权

US07138344B2 Method for minimizing slip line faults on a semiconductor wafer surface 失效
标题翻译：用于最小化半导体晶片表面上的滑动线故障的方法
公开(公告)号：US07138344B2
公开(公告)日：2006-11-21
申请号：US10671813
申请日：2003-09-25
申请人： Eric Neyret , Christophe Maleville , Ludovic Ecarnot
发明人： Eric Neyret , Christophe Maleville , Ludovic Ecarnot
IPC分类号： H01L21/26 , H01L21/42 , H01L21/324 , H01L21/477
CPC分类号： H01L21/3247 , H01L21/324 , H01L21/76264 , H01L21/76275 , H01L21/76283
摘要： A method for minimizing slip line faults on a surface of a semiconductor wafer that has been obtained using a transfer technique. The method includes heating the semiconductor wafer from an ambient temperature to a first higher temperature and pausing the heating at the first higher temperature for a time sufficient to stabilize the wafer. Then the wafer is heated further from the first higher temperature to a target higher temperature during a predetermined time interval. The further heating during an initial portion of the time interval is conducted at a relatively low heating rate and the heating during a final portion of the time interval is conducted at a relatively higher heating rate to thus minimize slip line faults in the surface of the wafer.
摘要翻译：一种用于使用转印技术获得的半导体晶片的表面上的滑动线故障最小化的方法。该方法包括将半导体晶片从环境温度加热到第一较高温度并暂停在第一较高温度下的加热足以使晶片稳定的时间。然后在预定时间间隔内将晶片从第一较高温度进一步加热到目标较高温度。在时间间隔的初始部分期间的进一步加热以相对低的加热速率进行，并且在时间间隔的最后部分期间的加热以相对较高的加热速率进行，从而使晶片表面中的滑移线故障最小化。

5. 发明授权

US07049250B2 Heat treatment for edges of multilayer semiconductor wafers 有权
标题翻译：多层半导体晶片边缘的热处理
公开(公告)号：US07049250B2
公开(公告)日：2006-05-23
申请号：US11008928
申请日：2004-12-13
申请人： Eric Neyret , Christophe Maleville
发明人： Eric Neyret , Christophe Maleville
IPC分类号： H01L21/324 , H01L21/477 , H01L21/42
CPC分类号： H01L21/3247 , H01L21/67103 , H01L21/76251 , H01L21/76254
摘要： A method for heat treating a multilayer semiconductor wafer having a central region and a peripheral edge each having a surface. The method includes selecting thickness values for the layers of the wafer to provide substantially equivalent heat absorption coefficients both in the central region and the edge of the wafer. This results in a substantially equivalent temperature being attained over the surface of the central region and the peripheral edge during thermal treatment. In turn, that prevents the appearance of slip lines on those surfaces while also preventing deformation of the wafer due to the thermal treatment. To achieve the desired thickness, layers or portions of layers can be selectively added or otherwise provided upon the central region or peripheral edge of the wafer, or on both, to modify the heat absorption coefficient of the wafer.
摘要翻译：一种用于热处理具有各自具有表面的中心区域和周缘的多层半导体晶片的方法。该方法包括选择晶片层的厚度值，以在晶片的中心区域和边缘提供基本相等的吸热系数。这导致在热处理期间在中心区域和外围边缘的表面上获得基本相当的温度。反过来，这也防止了在这些表面上的滑动线的出现，同时也防止了由于热处理导致的晶片的变形。为了实现所需的厚度，层或层的一部分可以选择性地添加或以其他方式设置在晶片的中心区域或周边边缘上，或者在两者上，以改变晶片的吸热系数。

6. 发明授权

US06939783B2 Preventive treatment method for a multilayer semiconductor wafer 有权
标题翻译：多层半导体晶片的预防处理方法
公开(公告)号：US06939783B2
公开(公告)日：2005-09-06
申请号：US10784040
申请日：2004-02-20
申请人： Eric Neyret , Christophe Maleville
发明人： Eric Neyret , Christophe Maleville
IPC分类号： H01L21/762 , H01L21/30 , H01L27/01
CPC分类号： H01L21/76259 , H01L21/76251 , H01L21/76254
摘要： A preventive treatment method for a multilayer semiconductor wafer is described. The semiconductor wafer includes a supporting substrate, at least one intermediate layer and a surface layer in which an intermediate layer has an exposed lateral edge and the wafer is to be subjected to a subsequent treatment. The method includes encapsulating the exposed lateral edge of the intermediate layer with a portion of the surface layer to prevent attack on the peripheral edge during the subsequent treatment.
摘要翻译：对多层半导体晶片的预防处理方法进行说明。半导体晶片包括支撑衬底，至少一个中间层和表面层，其中中间层具有暴露的横向边缘，并且晶片将被进行后续处理。该方法包括将中间层的暴露的侧边缘与表面层的一部分封装，以防止在随后的处理期间对外围边缘的侵蚀。

7. 发明授权

US06903032B2 Method for preparing a semiconductor wafer surface 有权
标题翻译：半导体晶片表面的制备方法
公开(公告)号：US06903032B2
公开(公告)日：2005-06-07
申请号：US10754930
申请日：2004-01-08
申请人： Christophe Maleville , Eric Neyret
发明人： Christophe Maleville , Eric Neyret
IPC分类号： H01L21/26 , H01L21/324 , H01L21/762 , H01L21/44
CPC分类号： H01L21/3247 , H01L21/76254
摘要： A method for preparing a semiconductor wafer wherein rapid thermal annealing is conducted to smooth a free surface of a superficial zone that is supported by the wafer. The improvement includes treating the superficial zone before conducting the rapid thermal annealing to prevent pitting in the superficial zone during the rapid thermal annealing.
摘要翻译：一种制备半导体晶片的方法，其中进行快速热退火以平滑由晶片支撑的表面区域的自由表面。改进包括在进行快速热退火之前处理表面区域，以防止在快速热退火期间在浅表区域中的点蚀。

8. 发明授权

US08679944B2 Progressive trimming method 有权
标题翻译：渐进修剪方法
公开(公告)号：US08679944B2
公开(公告)日：2014-03-25
申请号：US12934026
申请日：2009-07-31
申请人： Marcel Broekaart , Marion Migette , Sébastien Molinari , Eric Neyret
发明人： Marcel Broekaart , Marion Migette , Sébastien Molinari , Eric Neyret
IPC分类号： H01L21/46 , H01L21/30
CPC分类号： H01L21/304 , H01L21/76256 , H01L25/50 , H01L2225/06513 , H01L2924/0002 , H01L2924/00
摘要： The invention provides a method of trimming a structure that includes a first wafer bonded to a second wafer, with the first wafer having a chamfered edge. The method includes a first trimming step carried out over a first depth that includes at least the thickness of the first wafer and over a first width determined from the edge of the first wafer. A second trimming step is then carried out over a second depth that includes at least the thickness of the first wafer and over a second width that is less than the first width.
摘要翻译：本发明提供了一种修整结构的方法，该结构包括与第二晶片结合的第一晶片，其中第一晶片具有倒角边缘。该方法包括在第一深度上执行的第一修整步骤，该第一深度至少包括第一晶片的厚度以及从第一晶片的边缘确定的第一宽度。然后在包括至少第一晶片的厚度和小于第一宽度的第二宽度的第二深度上进行第二修整步骤。

9. 发明授权

US07947571B2 Method for fabricating a semiconductor on insulator substrate with reduced Secco defect density 有权
标题翻译：降低Secco缺陷密度制造绝缘体上半导体衬底的方法
公开(公告)号：US07947571B2
公开(公告)日：2011-05-24
申请号：US12478063
申请日：2009-06-04
申请人： Luciana Capello , Oleg Kononchuk , Eric Neyret , Alexandra Abbadie , Walter Schwarzenbach
发明人： Luciana Capello , Oleg Kononchuk , Eric Neyret , Alexandra Abbadie , Walter Schwarzenbach
IPC分类号： H01L21/762
CPC分类号： H01L21/76254
摘要： The invention relates to a method for fabricating a semiconductor on insulator substrate, in particular a silicon on insulator substrate by providing a source substrate, providing a predetermined splitting area inside the source substrate by implanting atomic species, bonding the source substrate to a handle substrate, detaching a remainder of the source substrate from the source-handle component at the predetermined splitting area to thereby transfer a device layer of the source substrate onto the handle substrate, and thinning of the device layer. To obtain semiconductor on insulator substrates with a reduced Secco defect density of less than 100 per cm2 the implanting is carried out with a dose of less than 2.3×106 atoms per cm2 and the thinning is an oxidation step conducted at a temperature of less than 925° C.
摘要翻译：本发明涉及一种通过提供源极衬底来制造绝缘体上半导体衬底，特别是绝缘体上硅衬底的方法，通过注入原子种类将源极衬底粘合到源极衬底内，将源极衬底接合到处理衬底上，在预定的分割区域处将源极衬底的剩余部分从源极 - 手柄部件分离，从而将源极衬底的器件层转移到处理衬底上，并使器件层变薄。为了获得具有小于每平方厘米100的Secco缺陷密度降低的半导体绝缘体衬底，以小于2.3×10 6原子/ cm 2的剂量进行注入，并且稀化是在小于925℃的温度下进行的氧化步骤 C。

10. 发明申请

US20110097871A1 Process for the transfer of a thin layer formed in a substrate with vacancy clusters 有权
标题翻译：用于将具有空位簇的衬底中形成的薄层转移的方法
公开(公告)号：US20110097871A1
公开(公告)日：2011-04-28
申请号：US12312017
申请日：2006-10-27
申请人： Eric Neyret , Oleg Kononchuk
发明人： Eric Neyret , Oleg Kononchuk
IPC分类号： H01L21/322 , H01L21/762
CPC分类号： H01L21/76254
摘要： Methods for forming semiconductor structures comprising a layer transferred from a donor substrate are provided in which the resulting structure has improved quality with respect of defects, and resulting structures therefrom. For example, a semiconductor on insulator (SeOI) structure can be formed by a method comprising: —providing a donor substrate (1) having a first density of vacancy clusters; —providing an insulating layer (3); —transferring a thin layer (10) from the donor substrate (1) to a support substrate (2) with the insulating layer (3) thereon; —curing the transferred thin layer (10) to reduce the first density of vacancy clusters to a second density; and being characterized in that the step of providing an insulating layer (30) comprises providing an oxygen barrier layer (4) to be in contact with the transferred thin layer (10), said oxygen barrier layer limiting diffusion of oxygen towards the thin layer during the curing.
摘要翻译：提供了形成包括从供体基底转移的层的半导体结构的方法，其中所得到的结构相对于缺陷而提高了质量，并且由此产生了结构。例如，可以通过以下方法形成绝缘体上半导体（SeOI）结构： - 提供具有第一密度空位簇的施主衬底（1） - 提供绝缘层（3）; - 将薄层（10）从施主衬底（1）转移到其上具有绝缘层（3）的支撑衬底（2）上; 固化转移的薄层（10）以将空位簇的第一密度降低至第二密度; 并且其特征在于，提供绝缘层（30）的步骤包括提供与转移的薄层（10）接触的氧阻挡层（4），所述氧阻隔层限制氧向薄层扩散固化。

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