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1. 发明授权

US07955946B2 Methods of determining x-y spatial orientation of a semiconductor substrate comprising an integrated circuit, methods of positioning a semiconductor substrate comprising an integrated circuit, methods of processing a semiconductor substrate, and semiconductor devices 有权
标题翻译：确定包括集成电路的半导体衬底的x-y空间取向的方法，包括集成电路的半导体衬底的定位方法，半导体衬底的处理方法以及半导体器件
公开(公告)号：US07955946B2
公开(公告)日：2011-06-07
申请号：US11439078
申请日：2006-05-22
申请人： Dave Pratt , Kyle Kirby , Steve Oliver , Mark Hiatt
发明人： Dave Pratt , Kyle Kirby , Steve Oliver , Mark Hiatt
IPC分类号： H01L21/76
CPC分类号： H01L21/682 , H01L21/67259 , H01L21/76898 , H01L23/544 , H01L2223/5442 , H01L2924/0002 , Y10S438/975 , H01L2924/00
摘要： The invention includes methods of determining x-y spatial orientation of a semiconductor substrate comprising an integrated circuit, methods of positioning a semiconductor substrate comprising an integrated circuit, methods of processing a semiconductor substrate, and semiconductor devices. In one implementation, a method of determining x-y spatial orientation of a semiconductor substrate comprising an integrated circuit includes providing a semiconductor substrate comprising at least one integrated circuit die. The semiconductor substrate comprises a circuit side, a backside, and a plurality of conductive vias extending from the circuit side to the backside. The plurality of conductive vias on the semiconductor substrate backside is examined to determine location of portions of at least two of the plurality of conductive vias on the semiconductor substrate backside. From the determined location, x-y spatial orientation of the semiconductor substrate is determined. Other aspects and implementations are contemplated.
摘要翻译：本发明包括确定包括集成电路的半导体衬底的x-y空间取向的方法，包括集成电路的半导体衬底的定位方法，半导体衬底的处理方法和半导体器件。在一个实现中，确定包括集成电路的半导体衬底的x-y空间取向的方法包括提供包括至少一个集成电路管芯的半导体衬底。半导体衬底包括电路侧，背面以及从电路侧延伸到背面的多个导电通路。检查半导体衬底背面上的多个导电通孔以确定半导体衬底背面上的多个导电通孔中的至少两个的部分的位置。从确定的位置确定半导体衬底的x-y空间取向。考虑了其他方面和实现。

2. 发明申请

US20070269994A1 Methods of determining x-y spatial orientation of a semiconductor substrate comprising an integrated circuit, methods of positioning a semiconductor substrate comprising an integrated circuit, methods of processing a semiconductor substrate, and semiconductor devices 有权
标题翻译：确定包括集成电路的半导体衬底的x-y空间取向的方法，包括集成电路的半导体衬底的定位方法，半导体衬底的处理方法以及半导体器件
公开(公告)号：US20070269994A1
公开(公告)日：2007-11-22
申请号：US11439078
申请日：2006-05-22
申请人： Dave Pratt , Kyle Kirby , Steve Oliver , Mark Hiatt
发明人： Dave Pratt , Kyle Kirby , Steve Oliver , Mark Hiatt
IPC分类号： H01L21/00
CPC分类号： H01L21/682 , H01L21/67259 , H01L21/76898 , H01L23/544 , H01L2223/5442 , H01L2924/0002 , Y10S438/975 , H01L2924/00
摘要： The invention includes methods of determining x-y spatial orientation of a semiconductor substrate comprising an integrated circuit, methods of positioning a semiconductor substrate comprising an integrated circuit, methods of processing a semiconductor substrate, and semiconductor devices. In one implementation, a method of determining x-y spatial orientation of a semiconductor substrate comprising an integrated circuit includes providing a semiconductor substrate comprising at least one integrated circuit die. The semiconductor substrate comprises a circuit side, a backside, and a plurality of conductive vias extending from the circuit side to the backside. The plurality of conductive vias on the semiconductor substrate backside is examined to determine location of portions of at least two of the plurality of conductive vias on the semiconductor substrate backside. From the determined location, x-y spatial orientation of the semiconductor substrate is determined. Other aspects and implementations are contemplated.
摘要翻译：本发明包括确定包括集成电路的半导体衬底的x-y空间取向的方法，包括集成电路的半导体衬底的定位方法，半导体衬底的处理方法以及半导体器件。在一个实现中，确定包括集成电路的半导体衬底的x-y空间取向的方法包括提供包括至少一个集成电路管芯的半导体衬底。半导体衬底包括电路侧，背面以及从电路侧延伸到背面的多个导电通路。检查半导体衬底背面上的多个导电通孔以确定半导体衬底背面上的多个导电通孔中的至少两个的部分的位置。从确定的位置确定半导体衬底的x-y空间取向。考虑了其他方面和实现。

3. 发明申请

US20110204526A1 Methods of Determining X-Y Spatial Orientation of a Semiconductor Substrate Comprising an Integrated Circuit, Methods of Positioning a Semiconductor Substrate Comprising an Integrated Circuit, Methods of Processing a Semiconductor Substrate, and Semiconductor Devices 有权
标题翻译：确定包含集成电路的半导体衬底的X-Y空间取向的方法，包括集成电路的半导体衬底的定位方法，半导体衬底的处理方法和半导体器件
公开(公告)号：US20110204526A1
公开(公告)日：2011-08-25
申请号：US13099672
申请日：2011-05-03
申请人： Dave Pratt , Kyle Kirby , Steve Oliver , Mark Hiatt
发明人： Dave Pratt , Kyle Kirby , Steve Oliver , Mark Hiatt
IPC分类号： H01L23/48
CPC分类号： H01L21/682 , H01L21/67259 , H01L21/76898 , H01L23/544 , H01L2223/5442 , H01L2924/0002 , Y10S438/975 , H01L2924/00
摘要： The invention includes methods of determining x-y spatial orientation of a semiconductor substrate comprising an integrated circuit, methods of positioning a semiconductor substrate comprising an integrated circuit, methods of processing a semiconductor substrate, and semiconductor devices. In one implementation, a method of determining x-y spatial orientation of a semiconductor substrate comprising an integrated circuit includes providing a semiconductor substrate comprising at least one integrated circuit die. The semiconductor substrate comprises a circuit side, a backside, and a plurality of conductive vias extending from the circuit side to the backside. The plurality of conductive vias on the semiconductor substrate backside is examined to determine location of portions of at least two of the plurality of conductive vias on the semiconductor substrate backside. From the determined location, x-y spatial orientation of the semiconductor substrate is determined. Other aspects and implementations are contemplated.
摘要翻译：本发明包括确定包括集成电路的半导体衬底的x-y空间取向的方法，包括集成电路的半导体衬底的定位方法，半导体衬底的处理方法以及半导体器件。在一个实现中，确定包括集成电路的半导体衬底的x-y空间取向的方法包括提供包括至少一个集成电路管芯的半导体衬底。半导体衬底包括电路侧，背面以及从电路侧延伸到背面的多个导电通路。检查半导体衬底背面上的多个导电通孔以确定半导体衬底背面上的多个导电通孔中的至少两个的部分的位置。从确定的位置确定半导体衬底的x-y空间取向。考虑了其他方面和实现。

4. 发明授权

US08531046B2 Semiconductor substrates comprising through substrate interconnects that are visible on the substrate backside 有权
标题翻译：包括在衬底背面可见的通过衬底互连的半导体衬底
公开(公告)号：US08531046B2
公开(公告)日：2013-09-10
申请号：US13099672
申请日：2011-05-03
申请人： Dave Pratt , Kyle K. Kirby , Steve Oliver , Mark Hiatt
发明人： Dave Pratt , Kyle K. Kirby , Steve Oliver , Mark Hiatt
IPC分类号： H01L23/544
CPC分类号： H01L21/682 , H01L21/67259 , H01L21/76898 , H01L23/544 , H01L2223/5442 , H01L2924/0002 , Y10S438/975 , H01L2924/00
摘要： The invention includes methods of determining x-y spatial orientation of a semiconductor substrate comprising an integrated circuit, methods of positioning a semiconductor substrate comprising an integrated circuit, methods of processing a semiconductor substrate, and semiconductor devices. In one implementation, a method of determining x-y spatial orientation of a semiconductor substrate comprising an integrated circuit includes providing a semiconductor substrate comprising at least one integrated circuit die. The semiconductor substrate comprises a circuit side, a backside, and a plurality of conductive vias extending from the circuit side to the backside. The plurality of conductive vias on the semiconductor substrate backside is examined to determine location of portions of at least two of the plurality of conductive vias on the semiconductor substrate backside. From the determined location, x-y spatial orientation of the semiconductor substrate is determined. Other aspects and implementations are contemplated.
摘要翻译：本发明包括确定包括集成电路的半导体衬底的x-y空间取向的方法，包括集成电路的半导体衬底的定位方法，半导体衬底的处理方法以及半导体器件。在一个实现中，确定包括集成电路的半导体衬底的x-y空间取向的方法包括提供包括至少一个集成电路管芯的半导体衬底。半导体衬底包括电路侧，背面以及从电路侧延伸到背面的多个导电通路。检查半导体衬底背面上的多个导电通孔以确定半导体衬底背面上的多个导电通孔中的至少两个的部分的位置。从确定的位置确定半导体衬底的x-y空间取向。考虑了其他方面和实现。

5. 发明申请

US20110233777A1 THROUGH-WAFER INTERCONNECTS FOR PHOTOIMAGER AND MEMORY WAFERS 失效
标题翻译：用于光电子和存储器波形的通过波形互连
公开(公告)号：US20110233777A1
公开(公告)日：2011-09-29
申请号：US13154550
申请日：2011-06-07
申请人： Salman Akram , Charles Watkins , Mark Hiatt , David Hembree , James Wark , Warren Farnworth , Mark Tuttle , Sidney Rigg , Steven Oliver , Kyle Kirby , Alan Wood , Lu Velicky
发明人： Salman Akram , Charles Watkins , Mark Hiatt , David Hembree , James Wark , Warren Farnworth , Mark Tuttle , Sidney Rigg , Steven Oliver , Kyle Kirby , Alan Wood , Lu Velicky
IPC分类号： H01L23/498 , H01L23/48
CPC分类号： H01L21/76877 , H01L21/6835 , H01L21/76898 , H01L23/481 , H01L24/45 , H01L27/14634 , H01L27/14636 , H01L2221/6834 , H01L2224/02166 , H01L2224/0554 , H01L2224/05567 , H01L2224/05573 , H01L2224/16 , H01L2224/45144 , H01L2224/48463 , H01L2924/00014 , H01L2924/01013 , H01L2924/01014 , H01L2924/01028 , H01L2924/01029 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/04941 , H01L2924/10253 , H01L2924/12042 , H01L2924/14 , H01L2924/00 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： A through-wafer interconnect for imager, memory and other integrated circuit applications is disclosed, thereby eliminating the need for wire bonding, making devices incorporating such interconnects stackable and enabling wafer level packaging for imager devices. Further, a smaller and more reliable die package is achieved and circuit parasitics (e.g., L and R) are reduced due to the reduced signal path lengths.
摘要翻译：公开了一种用于成像器，存储器和其他集成电路应用的透晶片互连，从而消除了对引线接合的需要，使得结合这种互连的器件可堆叠并且实现成像器件的晶片级封装。此外，实现了更小且更可靠的管芯封装，并且由于信号路径长度的减小，电路寄生（例如，L和R）被减小。

6. 发明申请

US20100171217A1 THROUGH-WAFER INTERCONNECTS FOR PHOTOIMAGER AND MEMORY WAFERS 有权
标题翻译：用于光电子和存储器波形的通过波形互连
公开(公告)号：US20100171217A1
公开(公告)日：2010-07-08
申请号：US12725724
申请日：2010-03-17
申请人： Salman Akram , Charles Watkins , Mark Hiatt , David Hembree , James Wark , Warren Farnworth , Mark Tuttle , Sidney Rigg , Steven Oliver , Kyle Kirby , Alan Wood , Lu Velicky
发明人： Salman Akram , Charles Watkins , Mark Hiatt , David Hembree , James Wark , Warren Farnworth , Mark Tuttle , Sidney Rigg , Steven Oliver , Kyle Kirby , Alan Wood , Lu Velicky
IPC分类号： H01L23/498
CPC分类号： H01L21/76877 , H01L21/6835 , H01L21/76898 , H01L23/481 , H01L24/45 , H01L27/14634 , H01L27/14636 , H01L2221/6834 , H01L2224/02166 , H01L2224/0554 , H01L2224/05567 , H01L2224/05573 , H01L2224/16 , H01L2224/45144 , H01L2224/48463 , H01L2924/00014 , H01L2924/01013 , H01L2924/01014 , H01L2924/01028 , H01L2924/01029 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/04941 , H01L2924/10253 , H01L2924/12042 , H01L2924/14 , H01L2924/00 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： A through-wafer interconnect for imager, memory and other integrated circuit applications is disclosed, thereby eliminating the need for wire bonding, making devices incorporating such interconnects stackable and enabling wafer level packaging for imager devices. Further, a smaller and more reliable die package is achieved and circuit parasitics (e.g., L and R) are reduced due to the reduced signal path lengths.
摘要翻译：公开了一种用于成像器，存储器和其他集成电路应用的透晶片互连，从而消除了对引线接合的需要，使得结合这种互连的器件可堆叠并且实现成像器件的晶片级封装。此外，实现了更小且更可靠的管芯封装，并且由于信号路径长度的减小，电路寄生（例如，L和R）被减小。

7. 发明申请

US20080111213A1 THROUGH-WAFER INTERCONNECTS FOR PHOTOIMAGER AND MEMORY WAFERS 失效
标题翻译：用于光电子和存储器波形的通过波形互连
公开(公告)号：US20080111213A1
公开(公告)日：2008-05-15
申请号：US11924781
申请日：2007-10-26
申请人： Salman Akram , Charles Watkins , Mark Hiatt , David Hembree , James Wark , Warren Farnworth , Mark Tuttle , Sidney Rigg , Steven Oliver , Kyle Kirby , Alan Wood , Lu Velicky
发明人： Salman Akram , Charles Watkins , Mark Hiatt , David Hembree , James Wark , Warren Farnworth , Mark Tuttle , Sidney Rigg , Steven Oliver , Kyle Kirby , Alan Wood , Lu Velicky
IPC分类号： H01L23/488
CPC分类号： H01L21/76877 , H01L21/6835 , H01L21/76898 , H01L23/481 , H01L24/45 , H01L27/14634 , H01L27/14636 , H01L2221/6834 , H01L2224/02166 , H01L2224/0554 , H01L2224/05567 , H01L2224/05573 , H01L2224/16 , H01L2224/45144 , H01L2224/48463 , H01L2924/00014 , H01L2924/01013 , H01L2924/01014 , H01L2924/01028 , H01L2924/01029 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/04941 , H01L2924/10253 , H01L2924/12042 , H01L2924/14 , H01L2924/00 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： A through-wafer interconnect for imager, memory and other integrated circuit applications is disclosed, thereby eliminating the need for wire bonding, making devices incorporating such interconnects stackable and enabling wafer level packaging for imager devices. Further, a smaller and more reliable die package is achieved and circuit parasitics (e.g., L and R) are reduced due to the reduced signal path lengths.
摘要翻译：公开了一种用于成像器，存储器和其他集成电路应用的透晶片互连，从而消除了对引线接合的需要，使得结合这种互连的器件可堆叠并且实现成像器件的晶片级封装。此外，实现了更小且更可靠的管芯封装，并且由于信号路径长度的减小，电路寄生（例如，L和R）被减小。

8. 发明授权

US07300857B2 Through-wafer interconnects for photoimager and memory wafers 有权
标题翻译：用于光刻机和存储晶圆的透晶片互连
公开(公告)号：US07300857B2
公开(公告)日：2007-11-27
申请号：US10932296
申请日：2004-09-02
申请人： Salman Akram , Charles Watkins , Mark Hiatt , David Hembree , James Wark , Warren Farnworth , Mark Tuttle , Sidney Rigg , Steven Oliver , Kyle Kirby , Alan Wood , Lu Velicky
发明人： Salman Akram , Charles Watkins , Mark Hiatt , David Hembree , James Wark , Warren Farnworth , Mark Tuttle , Sidney Rigg , Steven Oliver , Kyle Kirby , Alan Wood , Lu Velicky
IPC分类号： H01L21/441
CPC分类号： H01L21/76877 , H01L21/6835 , H01L21/76898 , H01L23/481 , H01L24/45 , H01L27/14634 , H01L27/14636 , H01L2221/6834 , H01L2224/02166 , H01L2224/0554 , H01L2224/05567 , H01L2224/05573 , H01L2224/16 , H01L2224/45144 , H01L2224/48463 , H01L2924/00014 , H01L2924/01013 , H01L2924/01014 , H01L2924/01028 , H01L2924/01029 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/04941 , H01L2924/10253 , H01L2924/12042 , H01L2924/14 , H01L2924/00 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： A through-wafer interconnect for imager, memory and other integrated circuit applications is disclosed, thereby eliminating the need for wire bonding, making devices incorporating such interconnects stackable and enabling wafer level packaging for imager devices. Further, a smaller and more reliable die package is achieved and circuit parasitics (e.g., L and R) are reduced due to the reduced signal path lengths.
摘要翻译：公开了一种用于成像器，存储器和其他集成电路应用的透晶片互连，从而消除了对引线接合的需要，使得结合这种互连的器件可堆叠并且实现成像器件的晶片级封装。此外，实现了更小且更可靠的管芯封装，并且由于信号路径长度的减小，电路寄生（例如，L和R）被减小。

9. 发明申请

US20060043599A1 Through-wafer interconnects for photoimager and memory wafers 有权
公开(公告)号：US20060043599A1
公开(公告)日：2006-03-02
申请号：US10932296
申请日：2004-09-02
申请人： Salman Akram , Charles Watkins , Mark Hiatt , David Hembree , James Wark , Warren Farnworth , Mark Tuttle , Sidney Rigg , Steven Oliver , Kyle Kirby , Alan Wood , Lu Velicky
发明人： Salman Akram , Charles Watkins , Mark Hiatt , David Hembree , James Wark , Warren Farnworth , Mark Tuttle , Sidney Rigg , Steven Oliver , Kyle Kirby , Alan Wood , Lu Velicky
IPC分类号： H01L21/44 , H01L23/48
CPC分类号： H01L21/76877 , H01L21/6835 , H01L21/76898 , H01L23/481 , H01L24/45 , H01L27/14634 , H01L27/14636 , H01L2221/6834 , H01L2224/02166 , H01L2224/0554 , H01L2224/05567 , H01L2224/05573 , H01L2224/16 , H01L2224/45144 , H01L2224/48463 , H01L2924/00014 , H01L2924/01013 , H01L2924/01014 , H01L2924/01028 , H01L2924/01029 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/04941 , H01L2924/10253 , H01L2924/12042 , H01L2924/14 , H01L2924/00 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： A through-wafer interconnect for imager, memory and other integrated circuit applications is disclosed, thereby eliminating the need for wire bonding, making devices incorporating such interconnects stackable and enabling wafer level packaging for imager devices. Further, a smaller and more reliable die package is achieved and circuit parasitics (e.g., L and R) are reduced due to the reduced signal path lengths.

10. 发明授权

US06426698B1 Lot signalling device 有权
标题翻译：批信号装置
公开(公告)号：US06426698B1
公开(公告)日：2002-07-30
申请号：US09573949
申请日：2000-05-19
申请人： Larry Edward Frisa , Clinton Haris , Mark Hiatt
发明人： Larry Edward Frisa , Clinton Haris , Mark Hiatt
IPC分类号： G08B108
CPC分类号： G08B21/0216 , G08B13/1427 , G08B21/0227
摘要： An apparatus related to a lot signalling device used to find misplaced lots. A remote control signalling device comprises a receiver section (5) for receiving an RF-command including a unique address of at least one of said plurality of remote control signalling devices (3) from a central control unit (1), an address memory (6) for storing the address of said remote control signalling device, an output section (7) for signalling an alarm upon receiving the RF-command, if said address included in the RF-command matches the stored address in said address memory (6). A method for processing items at different process stages comprises the steps of: transmitting RF-commands including a unique address of at least one of said plurality of remote control signalling devices by a central control unit (1), signalling an alarm by said remote control signalling device (3) upon reception of an RF-command from said central control unit (1).
摘要翻译：与用于发现错位的批次信号装置相关的装置。遥控信令装置包括接收机部分（5），用于从中央控制单元（1）接收包括所述多个远程控制信令装置（3）中的至少一个的唯一地址的RF命令，地址存储器 6），用于存储所述遥控信令装置的地址;如果包括在所述RF指令中的所述地址与所述地址存储器（6）中存储的地址匹配，则用于在接收到所述RF命令时用于发出警报的输出部分（7）。一种用于在不同处理阶段处理物品的方法包括以下步骤：通过中央控制单元（1）发送包括至少一个所述多个远程控制信令装置的唯一地址的RF指令，通过所述遥控器信令装置（3）在从所述中央控制单元（1）接收到RF命令时。

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