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1. 发明申请

US20120094470A1 METHOD FOR FORMING INTEGRATED CIRCUITS ON A STRAINED SEMICONDUCTOR SUBSTRATE 有权
标题翻译：在应变半导体衬底上形成集成电路的方法
公开(公告)号：US20120094470A1
公开(公告)日：2012-04-19
申请号：US13240769
申请日：2011-09-22
申请人： Daniel Bensahel , Aomar Halimaoui
发明人： Daniel Bensahel , Aomar Halimaoui
IPC分类号： H01L21/762
CPC分类号： H01L29/7849 , H01L21/187 , H01L21/3063 , H01L29/06 , H01L29/32 , H01L29/78
摘要： A method for forming an electronic circuit on a strained semiconductor substrate, including the steps of: forming, on a first surface of a semiconductor substrate, electronic components defining electronic chips to be sawn; and forming at least portions of a layer of a porous semiconductor material on the side of a second surface of the semiconductor substrate, opposite to the first surface, to bend the semiconductor substrate.
摘要翻译：一种在应变半导体衬底上形成电子电路的方法，包括以下步骤：在半导体衬底的第一表面上形成限定要锯切的电子芯片的电子部件; 以及在所述半导体衬底的与所述第一表面相对的一侧的所述一侧上形成多孔半导体材料层的至少一部分以弯曲所述半导体衬底。

2. 发明授权

US07279404B2 Process for fabricating strained layers of silicon or of a silicon/germanium alloy 有权
标题翻译：制造硅或硅/锗合金应变层的工艺
公开(公告)号：US07279404B2
公开(公告)日：2007-10-09
申请号：US10882995
申请日：2004-07-01
申请人： Aomar Halimaoui , Daniel Bensahel
发明人： Aomar Halimaoui , Daniel Bensahel
IPC分类号： H01L21/20
CPC分类号： H01L21/324 , H01L21/02381 , H01L21/0245 , H01L21/02513 , H01L21/02532 , H01L21/02694 , H01L29/7842 , Y10S438/96
摘要： A process for fabricating a strained layer of silicon or of a silicon/germanium alloy, includes:a) the formation of a layer (2) of silicon or of a silicon/germanium alloy on a layer (1) of a material having a modifiable lattice parameter; andb) the modification of the lattice parameter.
摘要翻译：一种制造硅或硅/锗合金应变层的工艺包括：a）在具有可修改的材料的层（1）上形成硅层或硅/锗合金层（2）晶格参数和b）修改晶格参数。

3. 发明授权

US08906776B2 Method for forming integrated circuits on a strained semiconductor substrate 有权
标题翻译：在应变半导体衬底上形成集成电路的方法
公开(公告)号：US08906776B2
公开(公告)日：2014-12-09
申请号：US13240769
申请日：2011-09-22
申请人： Daniel Bensahel , Aomar Halimaoui
发明人： Daniel Bensahel , Aomar Halimaoui
IPC分类号： H01L21/30 , H01L29/78 , H01L21/18 , H01L21/3063
CPC分类号： H01L29/7849 , H01L21/187 , H01L21/3063 , H01L29/06 , H01L29/32 , H01L29/78
摘要： A method for forming an electronic circuit on a strained semiconductor substrate, including the steps of: forming, on a first surface of a semiconductor substrate, electronic components defining electronic chips to be sawn; and forming at least portions of a layer of a porous semiconductor material on the side of a second surface of the semiconductor substrate, opposite to the first surface, to bend the semiconductor substrate.
摘要翻译：一种在应变半导体衬底上形成电子电路的方法，包括以下步骤：在半导体衬底的第一表面上形成限定要锯切的电子芯片的电子部件; 以及在所述半导体衬底的与所述第一表面相对的一侧的所述一侧上形成多孔半导体材料层的至少一部分以弯曲所述半导体衬底。

4. 发明授权

US08536027B2 Method for making a semi-conducting substrate located on an insulation layer 有权
标题翻译：制造位于绝缘层上的半导体衬底的方法
公开(公告)号：US08536027B2
公开(公告)日：2013-09-17
申请号：US12679271
申请日：2008-09-26
申请人： Aomar Halimaoui , Daniel Bensahel
发明人： Aomar Halimaoui , Daniel Bensahel
IPC分类号： H01L21/20 , H01L29/02
CPC分类号： H01L29/0649 , H01L21/02381 , H01L21/02532 , H01L21/02658 , H01L21/76262 , H01L21/764
摘要： A method for making a silicon layer extending on an insulation layer, including the steps of forming a silicon-germanium layer on at least a portion of a silicon wafer; transforming portions of the silicon-germanium layer into porous silicon pads; growing a monocrystalline silicon layer on the silicon-germanium layer and on the porous silicon pads; removing the silicon-germanium layer; oxidizing the porous silicon pads; and depositing an insulation material on the silicon layer.
摘要翻译：一种用于制造在绝缘层上延伸的硅层的方法，包括以下步骤：在硅晶片的至少一部分上形成硅 - 锗层; 将硅 - 锗层的部分转变成多孔硅垫; 在硅 - 锗层和多孔硅垫上生长单晶硅层; 去除硅 - 锗层; 氧化多孔硅垫; 以及在所述硅层上沉积绝缘材料。

5. 发明授权

US06969661B2 Method for forming a localized region of a material difficult to etch 有权
公开(公告)号：US06969661B2
公开(公告)日：2005-11-29
申请号：US10744680
申请日：2003-12-23
申请人： Aomar Halimaoui , Daniel Bensahel
发明人： Aomar Halimaoui , Daniel Bensahel
IPC分类号： H01L21/28 , H01L21/316 , H01L21/336 , H01L29/51 , H01L21/3205
CPC分类号： H01L21/28194 , H01L21/31604 , H01L21/31691 , H01L29/517 , H01L29/66583
摘要： A method for forming, in an integrated circuit, a localized region of a material difficult to etch, including the steps of forming a first silicon oxide layer having a thickness smaller than 1 nm on a silicon substrate; depositing, on the first layer, a second layer selectively etchable with respect to the first layer; forming in the second layer an opening according to the pattern of said localized region; selectively growing on the second layer, around the opening, a germanium layer, the material of the second layer being chosen to enable this selective growth, whereby there exists in the germanium an opening conformable with the above opening; depositing the material difficult to etch so that it does not deposit on the germanium; depositing a conductive layer to fill the opening in the germanium; performing a leveling to expose the germanium; and removing the germanium and the first and second layers.

6. 发明申请

US20050037599A1 Process for fabricating strained layers of silicon or of a silicon/germanium alloy 有权
标题翻译：制造硅或硅/锗合金应变层的工艺
公开(公告)号：US20050037599A1
公开(公告)日：2005-02-17
申请号：US10882995
申请日：2004-07-01
申请人： Aomar Halimaoui , Daniel Bensahel
发明人： Aomar Halimaoui , Daniel Bensahel
IPC分类号： H01L21/20 , H01L21/324 , C30B1/00 , H01L21/425
CPC分类号： H01L21/324 , H01L21/02381 , H01L21/0245 , H01L21/02513 , H01L21/02532 , H01L21/02694 , H01L29/7842 , Y10S438/96
摘要： A process for fabricating a strained layer of silicon or of a silicon/germanium alloy, includes: a) the formation of a layer (2) of silicon or of a silicon/germanium alloy on a layer (1) of a material having a modifiable lattice parameter; and b) the modification of the lattice parameter.
摘要翻译：一种制造硅或硅/锗合金应变层的工艺包括：a）在具有可修改的材料的层（1）上形成硅层或硅/锗合金层（2）晶格参数和b）修改晶格参数。

7. 发明申请

US20050026457A1 Method for forming a localized region of a material difficult to etch 有权
标题翻译：用于形成难以蚀刻的材料的局部区域的方法
公开(公告)号：US20050026457A1
公开(公告)日：2005-02-03
申请号：US10744680
申请日：2003-12-23
申请人： Aomar Halimaoui , Daniel Bensahel
发明人： Aomar Halimaoui , Daniel Bensahel
IPC分类号： H01L21/28 , H01L21/316 , H01L21/336 , H01L29/51 , H01L21/338 , H01L21/461
CPC分类号： H01L21/28194 , H01L21/31604 , H01L21/31691 , H01L29/517 , H01L29/66583
摘要： A method for forming, in an integrated circuit, a localized region of a material difficult to etch, including the steps of forming a first silicon oxide layer having a thickness smaller than 1 nm on a silicon substrate; depositing, on the first layer, a second layer selectively etchable with respect to the first layer; forming in the second layer an opening according to the pattern of said localized region; selectively growing on the second layer, around the opening, a germanium layer, the material of the second layer being chosen to enable this selective growth, whereby there exists in the germanium an opening conformable with the above opening; depositing the material difficult to etch so that it does not deposit on the germanium; depositing a conductive layer to fill the opening in the germanium; performing a leveling to expose the germanium; and removing the germanium and the first and second layers.
摘要翻译：一种在集成电路中形成难以蚀刻的材料的局部区域的方法，包括在硅衬底上形成厚度小于1nm的第一氧化硅层的步骤; 在所述第一层上沉积相对于所述第一层可选择性地蚀刻的第二层; 在所述第二层中形成根据所述局部区域的图案的开口; 选择性地生长在第二层上，围绕开口，锗层，选择第二层的材料以使其能够进行选择性生长，由此在锗中存在与上述开口相适应的开口; 沉积材料难以蚀刻，使得其不沉积在锗上; 沉积导电层以填充锗中的开口; 进行平整暴露锗; 并且去除锗以及第一和第二层。

8. 发明授权

US07803694B2 Process for transferring a layer of strained semiconductor material 有权
标题翻译：用于转移应变半导体材料层的工艺
公开(公告)号：US07803694B2
公开(公告)日：2010-09-28
申请号：US12170583
申请日：2008-07-10
申请人： Bruno Ghyselen , Daniel Bensahel , Thomas Skotnicki
发明人： Bruno Ghyselen , Daniel Bensahel , Thomas Skotnicki
IPC分类号： H01L21/30 , H01L21/46
CPC分类号： H01L29/1054 , H01L21/76254 , H01L21/76259 , Y10S438/938
摘要： Semiconductor wafers having a thin layer of strained semiconductor material. These structures include a substrate; an oxide layer upon the substrate; a silicon carbide (SiC) layer upon the oxide layer, and a strained layer of a semiconductor material in a strained state upon the silicon carbide layer, or a matching layer upon the donor substrate that is made from a material that induces strain in subsequent epitaxially grown layers thereon; a strained layer of a semiconductor material of defined thickness in a strained state; and an insulating or semi-insulating layer upon the strained layer in a thickness that retains the strained state of the strained layer. The insulating or semi-insulating layers are made of silicon carbide or oxides and act to retain strain in the strained layer.
摘要翻译：半导体晶片具有应变半导体材料的薄层。这些结构包括底物; 基底上的氧化物层; 氧化物层上的碳化硅（SiC）层，以及在碳化硅层上处于应变状态的半导体材料的应变层，或者由施主衬底上的由随后的外延生长引起应变的材料制成的匹配层生长层; 在应变状态下具有规定厚度的半导体材料的应变层; 以及在应变层上的绝缘或半绝缘层，其厚度保持应变层的应变状态。绝缘层或半绝缘层由碳化硅或氧化物制成并用于将应变保留在应变层中。

9. 发明申请

US20070248818A1 Single-Crystal Semiconductor Layer with Heteroatomic Macronetwork 有权
标题翻译：单晶半导体层与杂原子大网络
公开(公告)号：US20070248818A1
公开(公告)日：2007-10-25
申请号：US10583235
申请日：2004-12-16
申请人： Daniel Bensahel , Yves Campidelli , Olivier Kermarrec
发明人： Daniel Bensahel , Yves Campidelli , Olivier Kermarrec
IPC分类号： B32B19/00
CPC分类号： H01L29/04 , B82Y10/00 , G02B1/02 , G02B5/18 , H01L21/02381 , H01L21/0245 , H01L21/02505 , H01L21/02513 , H01L21/02532 , H01L31/0352 , Y10T428/29
摘要： The invention relates to a single-crystal layer of a first semiconductor material including single-crystal nanostructures of a second semiconductor material, the nanostructures being distributed in a regular crystallographic network with a centered tetragonal prism
摘要翻译：本发明涉及包括第二半导体材料的单晶纳米结构的第一半导体材料的单晶层，该纳米结构分布在具有中心的四边形棱镜的规则晶体网络中

10. 发明授权

US06399502B1 Process for fabricating a planar heterostructure 失效
标题翻译：制造平面异质结构的方法
公开(公告)号：US06399502B1
公开(公告)日：2002-06-04
申请号：US09540188
申请日：2000-03-31
申请人： Caroline Hernandez , Yves Campidelli , Maurice Rivoire , Daniel Bensahel
发明人： Caroline Hernandez , Yves Campidelli , Maurice Rivoire , Daniel Bensahel
IPC分类号： H01L2100
CPC分类号： H01L31/1812 , B82Y10/00 , B82Y20/00 , H01L21/02381 , H01L21/0243 , H01L21/0245 , H01L21/02532 , H01L21/02664 , H01L21/32115 , H01L29/125 , H01L29/165 , H01L31/035254 , H01L33/24 , H01L33/34 , H01S5/0207 , H01S5/021 , H01S5/2234 , H01S5/3224 , Y02E10/50
摘要： The process comprises: etching, in a semiconductor substrate (2), at least one trench (3) with predetermined width and depth; depositing, on the substrate and in the trench, a stack of successive and alternate layers of Si1−xGex (0
摘要翻译：该方法包括：在半导体衬底（2）中蚀刻具有预定宽度和深度的至少一个沟槽（3）; 在衬底和沟槽中沉积Si1-xGex（0

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