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1. 发明授权

US07474579B2 Use of periodic refresh in medium retention memory arrays 有权
标题翻译：在介质保留存储器阵列中使用定期更新
公开(公告)号：US07474579B2
公开(公告)日：2009-01-06
申请号：US11613832
申请日：2006-12-20
申请人： Colin S. Bill , Swaroop Kaza , Wei Daisy Cai , Tzu-Ning Fang , David Gaun , Eugen Gershon , Michael A. Van Buskirk , Jean Wu
发明人： Colin S. Bill , Swaroop Kaza , Wei Daisy Cai , Tzu-Ning Fang , David Gaun , Eugen Gershon , Michael A. Van Buskirk , Jean Wu
IPC分类号： G11C7/00
CPC分类号： G11C11/406 , G11C11/40615 , G11C13/0033 , G11C13/0069 , G11C16/3431
摘要： Systems and methods are disclosed that facilitate extending data retention time in a data retention device, such as a nanoscale resistive memory cell array, via assessing a resistance level in a tracking element associated with the memory array and refreshing the memory array upon a determination that the resistance of the tracking element has reached or exceeded a predetermined reference threshold resistance value. The tracking element can be a memory cell within the array itself and can have an initial resistance value that is substantially higher than an initial resistance value for a programmed memory cell in the array, such that resistance increase in the tracking cell will cause the tracking cell to reach the threshold value and trigger refresh of the array before data corruption/loss occurs in the core memory cells.
摘要翻译：公开了通过评估与存储器阵列相关联的跟踪元件中的电阻水平并在确定存储器阵列的情况下刷新存储器阵列时有助于在诸如纳米级电阻存储器单元阵列之类的数据保持装置中扩展数据保留时间的系统和方法跟踪元件的电阻已达到或超过预定参考阈值电阻值。跟踪元件可以是阵列本身内的存储器单元，并且可以具有基本上高于阵列中的编程存储器单元的初始电阻值的初始电阻值，使得跟踪单元中的电阻增加将导致跟踪单元在核心存储器单元中发生数据损坏/丢失之前达到阈值并触发阵列刷新。

2. 发明申请

US20080151669A1 USE OF PERIODIC REFRESH IN MEDIUM RETENTION MEMORY ARRAYS 有权
标题翻译：在中继记忆阵列中使用周期性刷新
公开(公告)号：US20080151669A1
公开(公告)日：2008-06-26
申请号：US11613832
申请日：2006-12-20
申请人： Colin S. Bill , Swaroop Kaza , Wei Daisy Cai , Tzu-Ning Fang , David Gaun , Eugen Gershon , Michael A. Van Buskirk , Jean Wu
发明人： Colin S. Bill , Swaroop Kaza , Wei Daisy Cai , Tzu-Ning Fang , David Gaun , Eugen Gershon , Michael A. Van Buskirk , Jean Wu
IPC分类号： G11C7/00
CPC分类号： G11C11/406 , G11C11/40615 , G11C13/0033 , G11C13/0069 , G11C16/3431
摘要： Systems and methods are disclosed that facilitate extending data retention time in a data retention device, such as a nanoscale resistive memory cell array, via assessing a resistance level in a tracking element associated with the memory array and refreshing the memory array upon a determination that the resistance of the tracking element has reached or exceeded a predetermined reference threshold resistance value. The tracking element can be a memory cell within the array itself and can have an initial resistance value that is substantially higher than an initial resistance value for a programmed memory cell in the array, such that resistance increase in the tracking cell will cause the tracking cell to reach the threshold value and trigger refresh of the array before data corruption/loss occurs in the core memory cells.
摘要翻译：公开了通过评估与存储器阵列相关联的跟踪元件中的电阻水平并在确定存储器阵列的情况下刷新存储器阵列时有助于在诸如纳米级电阻存储器单元阵列之类的数据保持装置中扩展数据保留时间的系统和方法跟踪元件的电阻已达到或超过预定参考阈值电阻值。跟踪元件可以是阵列本身内的存储器单元，并且可以具有基本上高于阵列中的编程存储器单元的初始电阻值的初始电阻值，使得跟踪单元中的电阻增加将导致跟踪单元在核心存储器单元中发生数据损坏/丢失之前达到阈值并触发阵列刷新。

3. 发明授权

US07450416B1 Utilization of memory-diode which may have each of a plurality of different memory states 有权
标题翻译：利用可能具有多个不同存储器状态中的每一个的存储器二极管
公开(公告)号：US07450416B1
公开(公告)日：2008-11-11
申请号：US11021944
申请日：2004-12-23
申请人： Swaroop Kaza , Juri Krieger , David Gaun , Stuart Spitzer , Richard Kingsborough , Zhida Lan , Colin S. Bill , Wei Daisy Cai , Igor Sokolik
发明人： Swaroop Kaza , Juri Krieger , David Gaun , Stuart Spitzer , Richard Kingsborough , Zhida Lan , Colin S. Bill , Wei Daisy Cai , Igor Sokolik
IPC分类号： G11C11/34
CPC分类号： G11C11/36 , G11C11/56 , G11C13/02 , G11C2213/56 , G11C2213/72
摘要： The present invention is a method of undertaking a procedure on a memory-diode, wherein a memory-diode is provided which is programmable so as to have each of a plurality of different threshold voltages. A reading of the state of the memory-diode indicates the so determined threshold voltage of the memory-diode.
摘要翻译：本发明是一种在存储器二极管上进行程序的方法，其中提供可编程以便具有多个不同阈值电压中的每一个的存储器二极管。存储二极管的状态的读取指示存储二极管的阈值电压是如此确定的。

4. 发明授权

US07072781B1 Architecture for generating adaptive arbitrary waveforms 失效
标题翻译：用于生成自适应任意波形的体系结构
公开(公告)号：US07072781B1
公开(公告)日：2006-07-04
申请号：US10885284
申请日：2004-07-06
申请人： Eugen Gershon , David Gaun , Colin S. Bill , Tzu-Ning Fang
发明人： Eugen Gershon , David Gaun , Colin S. Bill , Tzu-Ning Fang
IPC分类号： G01R31/36
CPC分类号： G01R31/31924 , G01R31/3167 , G01R31/31908 , G11C29/56 , G11C29/56004
摘要： A test system having a feedback loop that facilitates adjusting an output test waveform to a DUT/CUT (Device Under Test/Circuit Under Test) on-the-fly according to changing DUT/CUT parameters. The system includes a tester having an arbitrary waveform generator (AWG) and a data acquisition system (DAS) that monitors the status of the DUT/CUT. The AWG and DAS connect to the DUT/CUT through a feedback loop where the AWG outputs the test waveform to the DUT/CUT, the DAS monitors the DUT/CUT parameters, and the DAS analyzes and communicates changes to the AWG to effect changes in the output waveform, when desired. The AWG builds the output waveform in small slices (or segments) that are assembled together through a process of selection and calibration. The feedback architecture facilitates a number of changes in the output waveform, including a change in the original order of the preassembled slices, and changes in the magnitude/shape of the output waveform.
摘要翻译：具有反馈回路的测试系统，其根据改变的DUT / CUT参数，有助于将DUT / CUT（被测设备/待测电路）的输出测试波形实时调整。该系统包括具有任意波形发生器（AWG）的测试器和监视DUT / CUT的状态的数据采集系统（DAS）。 AWG和DAS通过反馈回路连接到DUT / CUT，AWG将测试波形输出到DUT / CUT，DAS监视DUT / CUT参数，DAS分析并传送AWG的变化，以实现更改输出波形。 AWG通过选择和校准过程组装在一起的小片（或片段）中构建输出波形。反馈架构有助于输出波形的一些变化，包括预先组装的切片的原始顺序的改变以及输出波形的幅度/形状的变化。

5. 发明授权

US07902086B2 Prevention of oxidation of carrier ions to improve memory retention properties of polymer memory cell 有权
标题翻译：防止载体离子氧化，提高聚合物记忆体的记忆保留性能
公开(公告)号：US07902086B2
公开(公告)日：2011-03-08
申请号：US11608388
申请日：2006-12-08
申请人： Swaroop Kaza , David Gaun , Michael A. Van Buskirk
发明人： Swaroop Kaza , David Gaun , Michael A. Van Buskirk
IPC分类号： H01L21/31 , H01L21/469
CPC分类号： H01L51/0575 , G11C13/0014 , G11C13/0016 , G11C2213/51 , G11C2213/77 , H01L27/285
摘要： Improving memory retention properties of a polymer memory cell are disclosed. The methods include providing a semiconducting polymer layer containing at least one organic semiconductor and at least one of a carrier ion oxidation preventer and an electrode oxidation preventer. The oxidation preventers may contain at least one of 1) an oxygen scavenger, 2) a polymer with oxidizable side-chain groups which can be preferentially oxidized over the carrier ions/electrodes, and 3) an oxidizable molecule that can be preferentially oxidized over the carrier ions/electrodes.
摘要翻译：公开了提高聚合物存储器单元的记忆保持性能。所述方法包括提供含有至少一种有机半导体和载流子离子氧化防止剂和电极氧化防止剂中的至少一种的半导体聚合物层。氧化防止剂可以含有1）除氧剂中的至少一种，2）具有可氧化的侧链基团的聚合物，其可以优先在载体离子/电极上氧化，和3）可以优先氧化的可氧化分子载体离子/电极。

6. 发明申请

US20080135834A1 PREVENTION OF OXIDATION OF CARRIER IONS TO IMPROVE MEMORY RETENTION PROPERTIES OF POLYMER MEMORY CELL 有权
标题翻译：防止携带离子的氧化提高聚合物存储单元的记忆保持性能
公开(公告)号：US20080135834A1
公开(公告)日：2008-06-12
申请号：US11608388
申请日：2006-12-08
申请人： Swaroop Kaza , David Gaun , Michael A. Van Buskirk
发明人： Swaroop Kaza , David Gaun , Michael A. Van Buskirk
IPC分类号： H01L51/05 , H01L51/40
CPC分类号： H01L51/0575 , G11C13/0014 , G11C13/0016 , G11C2213/51 , G11C2213/77 , H01L27/285
摘要： Improving memory retention properties of a polymer memory cell are disclosed. The methods include providing a semiconducting polymer layer containing at least one organic semiconductor and at least one of a carrier ion oxidation preventer and an electrode oxidation preventer. The oxidation preventers may contain at least one of 1) an oxygen scavenger, 2) a polymer with oxidizable side-chain groups which can be preferentially oxidized over the carrier ions/electrodes, and 3) an oxidizable molecule that can be preferentially oxidized over the carrier ions/electrodes.
摘要翻译：公开了提高聚合物存储器单元的记忆保持性能。所述方法包括提供含有至少一种有机半导体和载流子离子氧化防止剂和电极氧化防止剂中的至少一种的半导体聚合物层。氧化防止剂可以含有1）除氧剂中的至少一种，2）具有可氧化的侧链基团的聚合物，其可以优先在载体离子/电极上氧化，和3）可以优先氧化的可氧化分子载体离子/电极。

7. 发明申请

US20070025166A1 Program/erase waveshaping control to increase data retention of a memory cell 审中-公开
标题翻译：编程/擦除波形整形控制以增加存储单元的数据保留
公开(公告)号：US20070025166A1
公开(公告)日：2007-02-01
申请号：US11191126
申请日：2005-07-27
申请人： Tzu-Ning Fang , Colin Bill , Wei Cai , David Gaun , Eugen Gershon
发明人： Tzu-Ning Fang , Colin Bill , Wei Cai , David Gaun , Eugen Gershon
IPC分类号： G11C29/00
CPC分类号： G11C13/0014 , B82Y10/00 , G11C13/0007 , G11C13/0016 , G11C13/004 , G11C13/0064 , G11C13/0069 , G11C2013/0078 , G11C2013/0092 , G11C2213/32 , G11C2213/71 , G11C2213/77
摘要： System(s) and method(s) of improving and controlling memory cell data retention are disclosed. A particular pulse width and magnitude is generated and applied to a memory cell made of at least two electrodes with a controllably conductive media between the at least two electrodes. The current across the memory cell is detected and a lower input pulse is sent to the memory cell. Application of the lower pulse controls the data retention of the memory cell without disturbing the final programming state of the memory cell.
摘要翻译：公开了改进和控制存储单元数据保持的系统和方法。产生特定的脉冲宽度和幅度并将其施加到由至少两个电极制成的存储器单元，该至少两个电极在至少两个电极之间具有可控导电的介质。检测存储器单元中的电流，并将较低的输入脉冲发送到存储单元。下部脉冲的应用控制存储器单元的数据保持，而不会干扰存储单元的最终编程状态。

8. 发明授权

US07579631B2 Variable breakdown characteristic diode 有权
标题翻译：可变击穿特性二极管
公开(公告)号：US07579631B2
公开(公告)日：2009-08-25
申请号：US11087000
申请日：2005-03-22
申请人： David Gaun , Colin S. Bill , Swaroop Kaza
发明人： David Gaun , Colin S. Bill , Swaroop Kaza
IPC分类号： H01L29/00
CPC分类号： H01L51/0575 , B82Y10/00 , G11C11/5664 , G11C11/5692 , G11C13/0009 , G11C13/0014 , G11C13/0016 , G11C2213/11 , G11C2213/12 , G11C2213/15 , G11C2213/56 , G11C2213/71 , G11C2213/77 , H01L27/285
摘要： A memory cell made of at least two electrodes with a controllably conductive media between the at least two electrodes is disclosed. The controllably conductive media includes a passive layer made of super ionic material and an active layer. When an external stimuli, such as an applied electric field, is imposed upon the first and second electrode, ions move and dope and/or de-dope the polymer. The applied external stimuli used to dope the polymer is larger than an applied external stimuli to operate the memory cell. The polymer functions as a variable breakdown characteristic diode with electrical characteristics which are a consequence of the doping degree. The memory element may have a current limited read signal. Methods of making the memory devices/cells, methods of using the memory devices/cells, and devices such as computers, hand-held electronic devices and memory devices containing the memory cell(s) are also disclosed.
摘要翻译：公开了一种由在至少两个电极之间具有可控导电介质的至少两个电极制成的存储单元。可控导电介质包括由超离子材料和有源层制成的钝化层。当诸如施加的电场的外部刺激施加在第一和第二电极上时，离子移动并掺杂和/或去透明聚合物。用于掺杂聚合物的应用外部刺激物大于施加的外部刺激以操作记忆单元。该聚合物用作具有电特性的可变击穿特性二极管，这是掺杂度的结果。存储元件可以具有电流受限读取信号。还公开了制造存储器件/单元的方法，使用存储器件/单元的方法，以及诸如计算机，手持式电子设备和包含存储单元的存储器件的设备。

9. 发明申请

US20060274567A1 Method of programming a memory device 有权
标题翻译：编程存储器件的方法
公开(公告)号：US20060274567A1
公开(公告)日：2006-12-07
申请号：US11146690
申请日：2005-06-07
申请人： Swaroop Kaza , David Gaun , Stuart Spitzer , Juri Krieger
发明人： Swaroop Kaza , David Gaun , Stuart Spitzer , Juri Krieger
IPC分类号： G11C11/00
CPC分类号： G11C11/56 , B82Y10/00 , G11C13/0009 , G11C13/0069 , G11C2013/0078 , G11C2213/15 , G11C2213/56 , G11C2213/72 , G11C2213/79
摘要： The present invention is a method of programming a memory device, wherein different levels or magnitudes of current may be applied to and imposed on the memory device so that any one of a plurality of memory states may be realized. A read step indicates the so determined state of the memory device.
摘要翻译：本发明是一种对存储器件进行编程的方法，其中不同的电流等级或大小可被施加到存储器件上并施加到存储器件上，使得可以实现多个存储器状态中的任何一个。读取步骤指示如此确定的存储器件的状态。

10. 发明授权

US07378682B2 Memory element using active layer of blended materials 有权
标题翻译：记忆元素使用有源层的混合材料
公开(公告)号：US07378682B2
公开(公告)日：2008-05-27
申请号：US11052688
申请日：2005-02-07
申请人： David Gaun , Swaroop Kaza , Stuart Spitzer , Juri Krieger , Richard Kingsborough
发明人： David Gaun , Swaroop Kaza , Stuart Spitzer , Juri Krieger , Richard Kingsborough
IPC分类号： H01L51/00
CPC分类号： H01L27/285 , B82Y10/00 , G11C13/0014 , G11C13/0016
摘要： The present memory device has first and second electrodes, a passive layer between the first and second electrodes and on and in contact with the first electrode, and an active layer between the first and second electrodes and on and in contact with the passive layer and second electrode, for receiving a charged specie from the passive layer. The active layer is a mixture of (i) a first polymer, and (ii) a second polymer for enhancing ion transport, improving the interface and promoting a rapid and substantially uniform distribution of the charged specie in the active layer, i.e., preventing a localized injection of the charged species. These features result in a memory element with improved stability, a more controllable ON-state resistance, improved switching speed and a lower programming voltage.
摘要翻译：本存储器件具有第一和第二电极，在第一和第二电极之间并且与第一电极接触并且与第一电极接触的无源层以及在第一和第二电极之间并且与被动层和第二电极接触的有源层电极，用于从被动层接收带电物质。活性层是（i）第一聚合物和（ii）用于增强离子迁移的第二聚合物的混合物，改善界面并促进活性层中带电物质的快速且基本上均匀的分布，即防止局部注射带电物种。这些特征导致存储元件具有改进的稳定性，更可控的导通电阻，改进的开关速度和较低的编程电压。

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