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    • 1. 发明授权
    • Voltage programming switch for one-time-programmable (OTP) memories
    • 用于一次可编程(OTP)存储器的电压编程开关
    • US07626845B2
    • 2009-12-01
    • US11610284
    • 2006-12-13
    • Clinton H. Holder, Jr.Kang W. LeeJoseph E. SimkoYehuda SmoohaYing Zhu
    • Clinton H. Holder, Jr.Kang W. LeeJoseph E. SimkoYehuda SmoohaYing Zhu
    • G11C17/00
    • G11C17/16G11C17/18
    • In one embodiment, the invention is an integrated circuit (IC) including an OTP memory and conditioning circuitry. The IC receives an externally-generated DC programming voltage signal that the conditioning circuitry transforms into a programming pulse signal for programming the OTP memory. The conditioning circuitry includes: (i) reset protection circuitry for holding the programming pulse signal low if the IC is powering up, (ii) an overvoltage protection circuit for substantially preventing the programming pulse voltage from exceeding predefined boundaries, and (iii) a conversion switch for controlling the programming pulse voltage. The programming pulse voltage is (i) substantially equivalent to the externally-generated DC voltage if an enable signal is on, and (ii) substantially equivalent to a reference voltage if the enable signal is off.
    • 在一个实施例中,本发明是包括OTP存储器和调节电路的集成电路(IC)。 IC接收外部产生的直流编程电压信号,调理电路变换为用于编程OTP存储器的编程脉冲信号。 调节电路包括:(i)复位保护电路,用于在IC上电时保持编程脉冲信号为低电平,(ii)过压保护电路,用于基本上防止编程脉冲电压超出预定义的边界,以及(iii)转换 用于控制编程脉冲电压的开关。 如果使能信号为开,编程脉冲电压为(i)基本上等于外部产生的直流电压,以及(ii)如果使能信号关闭,则基本上等于参考电压。
    • 2. 发明申请
    • VOLTAGE PROGRAMMING SWITCH FOR ONE-TIME-PROGRAMMABLE (OTP) MEMORIES
    • 用于一次可编程(OTP)存储器的电压编程开关
    • US20080144350A1
    • 2008-06-19
    • US11610284
    • 2006-12-13
    • Clinton H. HolderKang W. LeeJoseph E. SimkoYehuda SmoohaYing Zhu
    • Clinton H. HolderKang W. LeeJoseph E. SimkoYehuda SmoohaYing Zhu
    • G11C17/08
    • G11C17/16G11C17/18
    • In one embodiment, the invention is an integrated circuit (IC) including an OTP memory and conditioning circuitry. The IC receives an externally-generated DC programming voltage signal that the conditioning circuitry transforms into a programming pulse signal for programming the OTP memory. The conditioning circuitry includes: (i) reset protection circuitry for holding the programming pulse signal low if the IC is powering up, (ii) an overvoltage protection circuit for substantially preventing the programming pulse voltage from exceeding predefined boundaries, and (iii) a conversion switch for controlling the programming pulse voltage. The programming pulse voltage is (i) substantially equivalent to the externally-generated DC voltage if an enable signal is on, and (ii) substantially equivalent to a reference voltage if the enable signal is off.
    • 在一个实施例中,本发明是包括OTP存储器和调节电路的集成电路(IC)。 IC接收外部产生的直流编程电压信号,调理电路变换为用于编程OTP存储器的编程脉冲信号。 调节电路包括:(i)复位保护电路,用于在IC上电时保持编程脉冲信号为低电平,(ii)过压保护电路,用于基本上防止编程脉冲电压超出预定义的边界,以及(iii)转换 用于控制编程脉冲电压的开关。 如果使能信号为开,编程脉冲电压为(i)基本上等于外部产生的直流电压,以及(ii)如果使能信号关闭,则基本上等于参考电压。
    • 4. 发明申请
    • Electrostatic Discharge Protection Circuit
    • 静电放电保护电路
    • US20100232078A1
    • 2010-09-16
    • US12438460
    • 2007-10-30
    • Dipankar BhattacharyaMakeshwar KothandaramanJohn C. KrizBernard L. MorrisYehuda Smooha
    • Dipankar BhattacharyaMakeshwar KothandaramanJohn C. KrizBernard L. MorrisYehuda Smooha
    • H02H9/04
    • H01L27/0266
    • An ESD protection circuit includes a first voltage clamp, connected between a first voltage supply node and a second voltage supply node of the circuit, and a second voltage clamp, connected between the second voltage supply node and a voltage return of the circuit. The first voltage supply node is adapted to receive a first voltage which is greater than a prescribed gate oxide reliability potential of the circuit. The second voltage supply node is operative to receive a second voltage which is less than the first voltage. The first voltage clamp is operative to clamp the first voltage on the first voltage supply node to a first value during an ESD event between the first and second voltage supply nodes, and the second voltage clamp is operative to clamp the second voltage on the second voltage supply node to a second value during an ESD event between the second voltage supply node and the voltage return.
    • ESD保护电路包括连接在电路的第一电压供应节点和第二电压供应节点之间的第一电压钳位器,以及连接在第二电压供应节点和电路的电压回路之间的第二电压钳位。 第一电压供应节点适于接收大于电路的预定栅极氧化物可靠性电位的第一电压。 第二电压供应节点可操作以接收小于第一电压的第二电压。 第一电压钳位器用于在第一和第二电压供应节点之间的ESD事件期间将第一电压供应节点上的第一电压钳位到第一值,并且第二电压钳位器用于将第二电压钳位在第二电压 在第二电压供应节点和电压返回之间的ESD事件期间将供应节点提供给第二值。
    • 5. 发明授权
    • Electrostatic discharge protection in a semiconductor device
    • 半导体器件中的静电放电保护
    • US07495873B2
    • 2009-02-24
    • US10977881
    • 2004-10-29
    • Dipankar BhattacharyaJohn C. KrizBernard L. MorrisYehuda Smooha
    • Dipankar BhattacharyaJohn C. KrizBernard L. MorrisYehuda Smooha
    • H02H9/00
    • H01L27/0266
    • An ESD protection circuit for protecting a circuit from an ESD event occurring between a first voltage supply node and a second voltage supply node associated with the circuit to be protected includes an MOS device having a gate terminal, a first source/drain terminal and a second source/drain terminal. The first source/drain terminal is connected to the first voltage supply node and the second source/drain terminal is connected to the second voltage supply node. The ESD protection circuit further includes a trigger circuit coupled to the gate terminal of the MOS device. The trigger circuit is configured to generate a control signal at the gate terminal of the MOS device for activating the MOS device during the ESD event. At least a portion of the trigger circuit is formed in a floating well which becomes biased to a voltage that is substantially equal to a first voltage when the first voltage is supplied to the first voltage supply node or to a second voltage when the second voltage is applied to the second voltage supply node, whichever voltage is greater.
    • 一种ESD保护电路,用于保护电路免受在要被保护的电路的第一电压供应节点和第二电压供应节点之间发生的ESD事件的影响,包括具有栅极端子,第一源极/漏极端子和第二电压源的MOS器件 源极/漏极端子。 第一源极/漏极端子连接到第一电压供应节点,第二源极/漏极端子连接到第二电压供应节点。 ESD保护电路还包括耦合到MOS器件的栅极端子的触发电路。 触发电路被配置为在MOS器件的栅极端产生控制信号,以在ESD事件期间激活MOS器件。 触发电路的至少一部分形成在浮置阱中,当浮置第二电压为第二电压时,浮置阱被偏置到基本上等于第一电压的电压,或者当第一电压被提供给第一电压供应节点时, 施加到第二电压供应节点,无论哪个电压较大。
    • 10. 发明授权
    • Electrostatic discharge protection circuit
    • 静电放电保护电路
    • US08089739B2
    • 2012-01-03
    • US12438460
    • 2007-10-30
    • Dipankar BhattacharyaMakeshwar KothandaramanJohn C. KrizBernard L. MorrisYehuda Smooha
    • Dipankar BhattacharyaMakeshwar KothandaramanJohn C. KrizBernard L. MorrisYehuda Smooha
    • H02H3/22H02H3/20H02H9/04
    • H01L27/0266
    • An ESD protection circuit includes a first voltage clamp, connected between a first voltage supply node and a second voltage supply node of the circuit, and a second voltage clamp, connected between the second voltage supply node and a voltage return of the circuit. The first voltage supply node is adapted to receive a first voltage which is greater than a prescribed gate oxide reliability potential of the circuit. The second voltage supply node is operative to receive a second voltage which is less than the first voltage. The first voltage clamp is operative to clamp the first voltage on the first voltage supply node to a first value during an ESD event between the first and second voltage supply nodes, and the second voltage clamp is operative to clamp the second voltage on the second voltage supply node to a second value during an ESD event between the second voltage supply node and the voltage return.
    • ESD保护电路包括连接在电路的第一电压供应节点和第二电压供应节点之间的第一电压钳位器,以及连接在第二电压供应节点和电路的电压回路之间的第二电压钳位。 第一电压供应节点适于接收大于电路的预定栅极氧化物可靠性电位的第一电压。 第二电压供应节点可操作以接收小于第一电压的第二电压。 第一电压钳位器用于在第一和第二电压供应节点之间的ESD事件期间将第一电压供应节点上的第一电压钳位到第一值,并且第二电压钳位器用于将第二电压钳位在第二电压 在第二电压供应节点和电压返回之间的ESD事件期间将供应节点提供给第二值。