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    • 10. 发明公开
    • Circuit for detecting an overvoltage on an electric load
    • Schaltung zur Erkennung einerÜberspannungan einem elektrischen Verbraucher
    • EP0740073A1
    • 1996-10-30
    • EP95830168.1
    • 1995-04-28
    • CO.RI.M.ME. CONSORZIO PER LA RICERCA SULLA MICROELETTRONICA NEL MEZZOGIORNOSGS-THOMSON MICROELECTRONICS S.r.l.
    • Palara, SergioSueri, StefanoSchiaccianoce, Salvatore
    • F02P17/12G01R29/027G01R31/38
    • H01T13/60F02P17/12G01R29/0273
    • The invention relates to a circuit for detecting an overvoltage in an electrical load (Z1) inserted with a first and a second terminal between a feed line (AL) and a control switch (S), the circuit having an output voltage (Vout) at an output terminal (OUT) and comprising:

      at least one first threshold comparator (C1) having a first input terminal held at a first reference voltage (E1), a second input terminal connected to the feed line (AL) and an output terminal,
      at least one second threshold comparator (C2) having a first input terminal held at a second reference voltage (E2), a second input terminal connected to a second terminal of the electrical load (Z1), and an output terminal,
      at least one output transistor (T1) inserted with a first and a second terminal between the feed line (AL) and an output terminal (OUT) of the circuit (1), the transistor (T1) being controlled by at least one logic block (D) having inputs connected to the outputs of the threshold comparators (C1) and (C2),
      at least one feedback block (R) inserted with an input terminal and an output terminal respectively between the output terminal (OUT) of circuit (1) and a further input terminal to the logic block (D).
    • 本发明涉及一种用于检测在馈电线(AL)和控制开关(S)之间插入第一和第二端子的电负载(Z1)中的过电压的电路,该电路具有输出电压(Vout)在 输出端子(OUT),并且包括:具有保持在第一参考电压(E1)的第一输入端子,连接到馈电线(AL)的第二输入端子和输出端子的至少一个第一阈值比较器(C1) 具有保持在第二参考电压(E2)的第一输入端的至少一个第二阈值比较器(C2),连接到电负载(Z1)的第二端的第二输入端,以及输出端,至少一个输出 晶体管(T1)被插入在馈电线(AL)和电路(1)的输出端(OUT)之间的第一和第二端子处,晶体管(T1)由至少一个逻辑块(D)控制,该逻辑块(D)具有 连接到阈值比较器(C1)和(C2)的输出的输入 分别在电路(1)的输出端(OUT)和逻辑块(D)的另一个输入端之间分别插入有输入端和输出端的至少一个反馈块(R)。