专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明公开

EP0757512A1 Driving circuit, MOS transistor using the same and corresponding applications 失效
标题翻译： Steuerungsschaltung，MOS晶体管mit solch einer Schaltung
公开(公告)号：EP0757512A1
公开(公告)日：1997-02-05
申请号：EP95830341.4
申请日：1995-07-31
申请人： SGS-THOMSON MICROELECTRONICS S.r.l. , CO.RI.M.ME. CONSORZIO PER LA RICERCA SULLA MICROELETTRONICA NEL MEZZOGIORNO
发明人： Palara, Sergio , Graziano, Vito
IPC分类号： H05B41/00 , H03K17/687 , H02M7/5383 , H05B41/29
CPC分类号： H03K17/04123 , H03K17/302 , H05B41/2825
摘要： A first principle on which the driver circuit of this invention operates is to delay the turning on of the MOS transistor (M2) by utilizing the time-wise pattern of the circuit input (G) signal rather than generating a delay within the circuit itself. The basic idea is one of using a threshold type of circuit element and arranging for no current to flow toward or from, depending on the type of the MOS transistor, the control terminal before the voltage at the circuit input exceeds a predetermined value. This is achieved, for example, by coupling a Zener diode (D1) serially to the control terminal. Where the input signal is of a kind which increases with a degree of uniformity, the time required to exceed that threshold will correspond to the desired delay. Thus, the driver circuit can match the dynamic range of the input signal automatically.
摘要翻译：本发明的驱动电路工作的第一原理是通过利用电路输入（G）信号的时间图案来延迟MOS晶体管（M2）的导通，而不是在电路本身内产生延迟。基本思想是使用阈值类型的电路元件，并且根据MOS晶体管的类型，在电路输入端的电压之前的控制端子超过预定值时，不会流向或不流过电流。这通过例如将齐纳二极管（D1）串联耦合到控制端来实现。在输入信号是以均匀度增加的类型的情况下，超过该阈值所需的时间将对应于期望的延迟。因此，驱动电路可以自动匹配输入信号的动态范围。

2. 发明公开

EP0757511A1 Starting circuit, MOS transistor using the same and corresponding applications 失效
标题翻译： StartSialtung，MOS晶体管电解电容器Schaltung
公开(公告)号：EP0757511A1
公开(公告)日：1997-02-05
申请号：EP95830340.6
申请日：1995-07-31
申请人： SGS-THOMSON MICROELECTRONICS S.r.l. , CO.RI.M.ME. CONSORZIO PER LA RICERCA SULLA MICROELETTRONICA NEL MEZZOGIORNO
发明人： Palara, Sergio , Graziano, Vito
IPC分类号： H05B41/00 , H03K17/687 , H02M7/5383 , H05B41/29
CPC分类号： H05B41/2825 , H02M7/5383 , H03K17/166 , H03K17/284
摘要： The principle on which the start up circuit of this invention operates is that of causing the MOS transistor (M2) to be turned on by sensing local electrical quantities thereof, specifically the potential at the drain terminal (D) of the MOS transistor (M2). The basic idea is to inject a small current into the control terminal (G) when the potential at the drain terminal (D) is high. For the purpose, an electric network (SN) is arranged to couple these two terminals together.
摘要翻译：本发明的启动电路的工作原理是通过检测MOS晶体管（M2）的局部电量，特别是MOS晶体管（M2）的漏极端（D）的电位使MOS晶体管（M2）导通，。基本思想是当漏极端子（D）的电位为高电平时，在控制端子（G）中注入小电流。为此，设置电网（SN）以将这两个终端耦合在一起。

3. 发明授权

EP0757511B1 Starting circuit, MOS transistor using the same and corresponding applications 失效
标题翻译：起动电路MOS晶体管具有这样的电路
公开(公告)号：EP0757511B1
公开(公告)日：2003-03-26
申请号：EP95830340.6
申请日：1995-07-31
申请人： STMicroelectronics S.r.l. , CO.RI.M.ME. CONSORZIO PER LA RICERCA SULLA MICROELETTRONICA NEL MEZZOGIORNO
发明人： Palara, Sergio , Graziano, Vito
IPC分类号： H05B41/00 , H03K17/687 , H02M7/5383 , H05B41/295
CPC分类号： H05B41/2825 , H02M7/5383 , H03K17/166 , H03K17/284

4. 发明授权

EP0757512B1 Driving circuit, MOS transistor using the same and corresponding applications 失效
标题翻译：用这样的电路控制电路MOS晶体管
公开(公告)号：EP0757512B1
公开(公告)日：2001-11-14
申请号：EP95830341.4
申请日：1995-07-31
申请人： STMicroelectronics S.r.l. , CO.RI.M.ME. CONSORZIO PER LA RICERCA SULLA MICROELETTRONICA NEL MEZZOGIORNO
发明人： Palara, Sergio , Graziano, Vito
IPC分类号： H05B41/00 , H03K17/687 , H02M7/5383 , H05B41/282
CPC分类号： H03K17/04123 , H03K17/302 , H05B41/2825

5. 发明公开

EP0782197A1 Integrated electronic device with reduced parasitic currents, and corresponding method 失效
标题翻译：集成电子元件具有降低的寄生电流及其方法
公开(公告)号：EP0782197A1
公开(公告)日：1997-07-02
申请号：EP95830558.3
申请日：1995-12-29
申请人： CO.RI.M.ME. CONSORZIO PER LA RICERCA SULLA MICROELETTRONICA NEL MEZZOGIORNO
发明人： Aiello, Natale , Graziano, Vito
IPC分类号： H01L29/00 , H01L27/082
CPC分类号： H01L27/0821 , H01L27/0203
摘要： The present invention relates to an electronic device integrated monolithically on a semiconductor material comprising a substrate (1) having a first conductivity type in which are formed a first (2) and second diffusion regions (3) of a second conductivity type with said substrate (1) and said first (2) and second (3) diffusion regions including respectively a base region, a collector region and an emitter region of a transistor (Tp1) and characterized in that in the second diffusion region (3) is formed a third diffusion region (8) having conductivity of the first type to provide in said second diffusion region (3) a resistive path (R) placed in series with the emitter region of the transistor (Tp1) while backfeeding it negatively and taking it to saturation with a resulting reduction of its current gain and limitation of the maximum current due thereto.
摘要翻译：本发明涉及一种在在包括基板（1），具有第一导电类型，其中形成半导体材料单片集成电子装置中的第一（2）和第二扩散区（3）的第二导电类型与所述基板（ 1）和所述第一（2）和第二（3）的扩散区域分别包括一个基区，集电区和发射极的晶体管的区域（TP1）和其特征在于在所述第二扩散区做了（3）上形成第三扩散区（8）所述第一类型的所述第二扩散区，以提供具有导电性的（3）串联放置与所述晶体管（TP1）的发射极区，而带负backfeeding它并把它与至饱和一阻抗路径（R）所得的减小其电流的电流由于其上的最大的增益和限制。

6. 发明授权

EP0782197B1 Integrated electronic device with reduced parasitic currents, and corresponding method 失效
标题翻译：集成电子元件具有降低的寄生电流及其方法
公开(公告)号：EP0782197B1
公开(公告)日：2001-06-06
申请号：EP95830558.3
申请日：1995-12-29
申请人： CO.RI.M.ME. CONSORZIO PER LA RICERCA SULLA MICROELETTRONICA NEL MEZZOGIORNO
发明人： Aiello, Natale , Graziano, Vito
IPC分类号： H01L29/00 , H01L27/082
CPC分类号： H01L27/0821 , H01L27/0203

7. 发明公开

EP0810662A1 An integrated device in an "emitter switching" configuration and with a cellular structure 失效
标题翻译： Integriertes Bauteil在Emitterschalteranordnung und mit einer zellularen Struktur
公开(公告)号：EP0810662A1
公开(公告)日：1997-12-03
申请号：EP96830306.5
申请日：1996-05-29
申请人： CO.RI.M.ME. CONSORZIO PER LA RICERCA SULLA MICROELETTRONICA NEL MEZZOGIORNO
发明人： Aiello, Natale , Graziano, Vito , La Barbera, Atanasio , Sueri, Stefano
IPC分类号： H01L27/00 , H01L27/082 , H01L29/423 , H01L23/482
CPC分类号： H01L27/0825
摘要： An integrated device comprises a high-voltage transistor and a low-voltage transistor in an emitter-switching configuration integrated in a chip (400) of semiconductor material comprising a buried P-type region (120) and a corresponding P-type contact region (405) which delimit a portion of semiconductor material within which the low-voltage transistor is formed. The contact region (405) has a network structure such as to divide this portion of semiconductor material into a plurality of cells (410) within each of which there is an elemental P-type base region (425) and an elemental N-type emitter region (430) of the low-voltage transistor. The elemental regions (425) and (430) of the various cells (410) are electrically connected to one another by means of surface metal contacts.
摘要翻译：集成器件包括集成在半导体材料的芯片（400）中的发射极切换配置中的高压晶体管和低压晶体管，该芯片（400）包括掩埋P型区域（120）和相应的P型接触区域 405），其限定了形成低压晶体管的半导体材料的一部分。接触区域（405）具有将半导体材料的该部分分成多个单元（410）的网络结构，其中每个单元具有元素P型基极区域（425）和元素N型发射极低压晶体管的区域（430）。各种电池（410）的元件区域（425）和（430）通过表面金属触点彼此电连接。

8. 发明公开

EP0858165A1 IC for implementing the function of a DIAC diode 失效
标题翻译： Integrierte Schaltung zur Herstellung der Funktion einer DIAC-Diode
公开(公告)号：EP0858165A1
公开(公告)日：1998-08-12
申请号：EP97830048.1
申请日：1997-02-11
申请人： SGS-THOMSON MICROELECTRONICS s.r.l.
发明人： Sueri, Stefano , La Barbera, Antonio , Aiello, Natale , Graziano, Vito
IPC分类号： H03K17/30 , H05B41/29
CPC分类号： H03K17/30 , H05B41/2825 , Y10S315/07
摘要： The present invention relates to an integrated circuit adapted to perform the function of a diode of the DIAC type, said circuit (1) having at least one input terminal (IN) and at least one output terminal (OUT).
The circuit (1) comprises at least a first input transistor (T1) having at least a first terminal connected to a fixed voltage reference (GND), at least a second terminal p+ p+45, and at least one control terminal coupled to the input terminal (IN) of the circuit (1).
The circuit (1) further comprises at least second (T2) and third (T3) transistors in a current mirror configuration, each having at least a first terminal for coupling to the input terminal (IN) of the circuit (1), and at least a second terminal, and associated control terminals connected together and coupled to at least the second terminal of the first input transistor (T1), the second terminal of the second transistor (T2) being connected to the control terminal of the first transistor (T1).
Finally, the circuit (1) comprises at least a fourth output transistor (T4) connected, with first and second terminals, between the output terminal (OUT) and the input terminal (IN) of the circuit (1), said fourth output transistor (T4) also having at least one control terminal connected to at least the second terminal of the third transistor (T3).
摘要翻译：本发明涉及一种适于执行DIAC型二极管功能的集成电路，所述电路（1）具有至少一个输入端（IN）和至少一个输出端（OUT）。电路（1）至少包括第一输入晶体管（T1），其具有至少连接到固定参考电压（GND）的第一端子，至少第二端子p + p + 45以及至少一个控制端子电路（1）的输入端（IN）。电路（1）还包括电流镜配置中的至少第二（T2）和第三（T3）晶体管，每个晶体管至少具有用于耦合到电路（1）的输入端（IN）的第一端子，并且在至少一个第二端子以及连接在一起并耦合到第一输入晶体管（T1）的至少第二端子的相关控制端子，第二晶体管（T2）的第二端子连接到第一晶体管（T1）的控制端子）。最后，电路（1）包括至少第四输出晶体管（T4），其与第一和第二端子连接在输出端（OUT）和电路（1）的输入端（IN）之间，所述第四输出晶体管（T4）还具有连接到第三晶体管（T3）的至少第二端子的至少一个控制端子。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式