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1. 发明授权

US08228729B2 Structure and method for shuffling data within non-volatile memory devices 有权
标题翻译：在非易失性存储器件内混洗数据的结构和方法
公开(公告)号：US08228729B2
公开(公告)日：2012-07-24
申请号：US13333494
申请日：2011-12-21
申请人： Bo Liu , Yan Li , Alexander Kwok-Tung Mak , Chi-Ming Wang , Eugene Jinglun Tam , Kwang-Ho Kim
发明人： Bo Liu , Yan Li , Alexander Kwok-Tung Mak , Chi-Ming Wang , Eugene Jinglun Tam , Kwang-Ho Kim
IPC分类号： G11C16/04 , G11C7/10
CPC分类号： G11C16/10 , G11C11/5628 , G11C16/34 , G11C2211/5641 , G11C2211/5642
摘要： Techniques for the reading and writing of data in multi-state non-volatile memories are described. Data is written into the memory in a binary format, read into the data registers on the memory, and “folded” within the registers, and then written back into the memory in a multi-state format. In the folding operation, binary data from a single word line is folded into a multi-state format and, when rewritten in multi-state form, is written into a only a portion of another word line. A corresponding reading technique, where the data is “unfolded” is also described. A register structure allowing such a “folding” operation is also presented. One set of embodiments include a local internal data bus that allows data to between the registers of different read/write stacks, where the internal bus can used in the internal data folding process.
摘要翻译：描述用于在多状态非易失性存储器中读取和写入数据的技术。数据以二进制格式写入存储器，读入存储器中的数据寄存器，并在寄存器内“折叠”，然后以多状态格式写入存储器。在折叠操作中，来自单个字线的二进制数据被折叠为多状态格式，并且当以多状态形式重写时，被写入另一个字线的仅一部分。还描述了数据“展开”的相应的读取技术。还提出了允许这种“折叠”操作的寄存器结构。一组实施例包括本地内部数据总线，其允许在不同读/写堆栈的寄存器之间的数据，其中内部总线可以在内部数据折叠处理中使用。

2. 发明授权

US08711625B2 Bad column management with bit information in non-volatile memory systems 有权
标题翻译：在非易失性存储器系统中使用位信息进行不良列管理
公开(公告)号：US08711625B2
公开(公告)日：2014-04-29
申请号：US13293494
申请日：2011-11-10
申请人： Yan Li , Kwang-Ho Kim , Frank W. Tsai , Aldo Bottelli
发明人： Yan Li , Kwang-Ho Kim , Frank W. Tsai , Aldo Bottelli
IPC分类号： G11C16/06
CPC分类号： G11C29/00 , G11C16/10 , G11C29/808
摘要： Column based defect management techniques are presented. Each column of the memory has an associated isolation latch or register whose value indicates whether the column is defective, but in addition to this information, for columns marked as defective, additional information is used to indicate whether the column as a whole is to be treated as defective, or whether just individual bits of the column are defective. The defective elements can then be re-mapped to a redundant element at either the appropriate bit or column level based on the data. When a column is bad, but only on the bit level, the good bits can still be used for data.
摘要翻译：介绍了基于列的缺陷管理技术。存储器的每一列都有一个相关联的隔离锁存器或寄存器，其值表示该列是否有缺陷，但是除了该信息之外，对于标记为有缺陷的列，还使用附加信息来指示该列是作为一个整体进行处理作为缺陷，或者列的单个位是否有缺陷。然后，可以基于该数据将有缺陷的元素重新映射到适当位或列级的冗余元件。当列是坏的，但是仅在位级别，好的位仍然可以用于数据。

3. 发明授权

US08705293B2 Compact sense amplifier for non-volatile memory suitable for quick pass write 有权
标题翻译：适用于快速写入的非易失性存储器的紧凑型读出放大器
公开(公告)号：US08705293B2
公开(公告)日：2014-04-22
申请号：US13277966
申请日：2011-10-20
申请人： Min She , Yan Li , Kwang-Ho Kim , Siu Lung Chan
发明人： Min She , Yan Li , Kwang-Ho Kim , Siu Lung Chan
IPC分类号： G11C7/10
CPC分类号： G11C16/0483 , G11C16/06 , G11C16/26 , G11C16/28
摘要： A compact and versatile sense amp is presented. Among its other features this sense amp arrangement provides a way to pre-charge bit lines while doing data scanning. Another feature is that the sense amp circuit can provide a way to set three different bit line levels used in the quick pass write (QPW) technique using dynamic latch, where quick pass write is a technique where cells along a given word line selected for programming can be enabled, inhibited, or partially inhibited for programming. Also, it can provide a convenient way to measure the cell current.
摘要翻译：提出了一种紧凑且通用的感应放大器。在其他功能中，这种感测放大器布置提供了一种在进行数据扫描时对位线进行预充电的方法。另一个特征是，感测放大器电路可以提供一种使用动态锁存器来设置快速写入（QPW）技术中使用的三个不同位线电平的方法，其中快速写入是一种技术，其中沿着给定字线的单元格被选择用于编程可以启用，禁止或部分禁止编程。此外，它可以提供一种方便的方式来测量电池电流。

4. 发明授权

US08630120B2 Compact sense amplifier for non-volatile memory 有权
标题翻译：用于非易失性存储器的紧凑型读出放大器
公开(公告)号：US08630120B2
公开(公告)日：2014-01-14
申请号：US13277915
申请日：2011-10-20
申请人： Min She , Yan Li , Kwang-Ho Kim , Siu Lung Chan
发明人： Min She , Yan Li , Kwang-Ho Kim , Siu Lung Chan
IPC分类号： G11C11/34
CPC分类号： G11C16/26 , G11C16/06 , G11C16/3418
摘要： A compact and versatile sense amp is presented. Among its other features this sense amp arrangement provides a way to pre-charge bit lines while doing data scanning. Another feature is that the sense amp circuit can provide a way to set three different bit line levels used in the quick pass write (QPW) technique using dynamic latch, where quick pass write is a technique where cells along a given word line selected for programming can be enabled, inhibited, or partially inhibited for programming. Also, it can provide a convenient way to measure the cell current.
摘要翻译：提出了一种紧凑且通用的感应放大器。在其他功能中，这种感测放大器布置提供了一种在进行数据扫描时对位线进行预充电的方法。另一个特征是，感测放大器电路可以提供一种使用动态锁存器来设置快速写入（QPW）技术中使用的三个不同位线电平的方法，其中快速写入是一种技术，其中沿着给定字线的单元格被选择用于编程可以启用，禁止或部分禁止编程。此外，它可以提供一种方便的方式来测量电池电流。

5. 发明申请

US20130100740A1 Compact Sense Amplifier for Non-Volatile Memory Suitable for Quick Pass Write 有权
标题翻译：用于非易失性存储器的紧凑型检测放大器，适用于快速通过写入
公开(公告)号：US20130100740A1
公开(公告)日：2013-04-25
申请号：US13277966
申请日：2011-10-20
申请人： Min She , Yan Li , Kwang-Ho Kim , Siu Lung Chan
发明人： Min She , Yan Li , Kwang-Ho Kim , Siu Lung Chan
IPC分类号： G11C16/10
CPC分类号： G11C16/0483 , G11C16/06 , G11C16/26 , G11C16/28
摘要： A compact and versatile sense amp is presented. Among its other features this sense amp arrangement provides a way to pre-charge bit lines while doing data scanning. Another feature is that the sense amp circuit can provide a way to set three different bit line levels used in the quick pass write (QPW) technique using dynamic latch, where quick pass write is a technique where cells along a given word line selected for programming can be enabled, inhibited, or partially inhibited for programming. Also, it can provide a convenient way to measure the cell current.
摘要翻译：提出了一种紧凑且通用的感应放大器。在其他功能中，这种感测放大器布置提供了一种在进行数据扫描时对位线进行预充电的方法。另一个特征是，感测放大器电路可以提供一种使用动态锁存器来设置快速写入（QPW）技术中使用的三个不同位线电平的方法，其中快速写入是一种技术，其中沿着给定字线的单元格被选择用于编程可以启用，禁止或部分禁止编程。此外，它可以提供一种方便的方式来测量电池电流。

6. 发明申请

US20130100744A1 Compact Sense Amplifier for Non-Volatile Memory 有权
标题翻译：用于非易失性存储器的紧凑型检测放大器
公开(公告)号：US20130100744A1
公开(公告)日：2013-04-25
申请号：US13277915
申请日：2011-10-20
申请人： Min She , Yan Li , Kwang-Ho Kim , Siu Lung Chan
发明人： Min She , Yan Li , Kwang-Ho Kim , Siu Lung Chan
IPC分类号： G11C16/26
CPC分类号： G11C16/26 , G11C16/06 , G11C16/3418
摘要： A compact and versatile sense amp is presented. Among its other features this sense amp arrangement provides a way to pre-charge bit lines while doing data scanning. Another feature is that the sense amp circuit can provide a way to set three different bit line levels used in the quick pass write (QPW) technique using dynamic latch, where quick pass write is a technique where cells along a given word line selected for programming can be enabled, inhibited, or partially inhibited for programming. Also, it can provide a convenient way to measure the cell current.
摘要翻译：提出了一种紧凑且通用的感应放大器。在其他功能中，这种感测放大器布置提供了一种在进行数据扫描时对位线进行预充电的方法。另一个特征是，感测放大器电路可以提供一种使用动态锁存器来设置快速写入（QPW）技术中使用的三个不同位线电平的方法，其中快速写入是一种技术，其中沿着给定字线的单元格被选择用于编程可以启用，禁止或部分禁止编程。此外，它可以提供一种方便的方式来测量电池电流。

7. 发明授权

US07487051B2 Evaluating method of the fracture toughness using the continuous indentation method 有权
$Evaluating method of the fracture toughness using the continuous indentation method$
标题翻译：使用连续压痕法评估断裂韧性的方法
公开(公告)号：US07487051B2
公开(公告)日：2009-02-03
申请号：US11667229
申请日：2005-09-14
申请人： Kwang-Ho Kim , Jung-Suk Lee , Yang-Won Seo , Yeol Choi
发明人： Kwang-Ho Kim , Jung-Suk Lee , Yang-Won Seo , Yeol Choi
IPC分类号： G01L1/00
CPC分类号： G01N3/42 , G01N2203/0064 , G01N2203/0078
摘要： The present invention relates to a method of evaluating the fracture toughness of a material using the continuous indentation technique. In the method of this invention, the stress coefficient, strain hardening modulus and yield stress of the material are determined using the continuous indentation technique and, thereafter, the reduced elastic modulus (Er) of the material is calculated. The effective elastic modulus and the initial elastic modulus are calculated and, thereafter, the damage parameter is calculated using the void volume fraction. The critical elastic modulus and the characteristic fracture initiation point of the indentation depth are determined using the damage parameter and, thereafter, the fracture toughness of the material is evaluated. The present invention is advantageous in that the fracture toughness of a brittle material can be evaluated precisely using a nondestructive evaluation technique.
摘要翻译：本发明涉及使用连续压痕技术评价材料的断裂韧性的方法。在本发明的方法中，使用连续压痕技术确定材料的应力系数，应变硬化模量和屈服应力，然后计算材料的弹性模量（Er）。计算有效弹性模量和初始弹性模量，此后，使用空隙体积分数计算损伤参数。使用损伤参数确定压痕深度的临界弹性模量和特征性断裂起始点，然后评估材料的断裂韧性。本发明的优点在于，可以使用非破坏性评价技术精确地评价脆性材料的断裂韧性。

8. 发明申请

US20050046339A1 Inorganic thin layer, organic electroluminescence device including the same, and fabrication method thereof 失效
标题翻译：无机薄膜，包括其的有机电致发光器件及其制造方法
公开(公告)号：US20050046339A1
公开(公告)日：2005-03-03
申请号：US10922931
申请日：2004-08-23
申请人： Byeong-Kwon Ju , Jai-Kyeong Kim , Young-Chul Kim , Hoon Kim , Kwang-Ho Kim , Joo-Won Lee
发明人： Byeong-Kwon Ju , Jai-Kyeong Kim , Young-Chul Kim , Hoon Kim , Kwang-Ho Kim , Joo-Won Lee
IPC分类号： H05B33/14 , H01L51/52 , H05B33/00
CPC分类号： H01L24/10 , H01L24/13 , H01L51/5253 , H01L2224/13 , H01L2224/13099 , H01L2924/01006 , H01L2924/01011 , H01L2924/01012 , H01L2924/01013 , H01L2924/0102 , H01L2924/01021 , H01L2924/01022 , H01L2924/01033 , H01L2924/0104 , H01L2924/01061 , H01L2924/01073 , H01L2924/12041 , H01L2924/12044 , H01L2924/00
摘要： The present invention discloses an inorganic thin layer which is composed of an inorganic composite containing at least two kinds of inorganic materials and shows excellent moisture and oxygen proof, an organic electroluminescence device including the inorganic thin layer as a passivation layer, and a fabrication method thereof.
摘要翻译：本发明公开了一种无机薄层，其由含有至少两种无机材料的无机复合材料构成，具有优异的防水性和耐氧性，包括无机薄层作为钝化层的有机电致发光元件及其制造方法。

9. 发明授权

US10741571B2 Vertical memory devices and methods of manufacturing the same 有权
公开(公告)号：US10741571B2
公开(公告)日：2020-08-11
申请号：US15401486
申请日：2017-01-09
申请人： Young-Bae Yoon , Joong-Shik Shin , Kwang-Ho Kim , Hyun-Mog Park
发明人： Young-Bae Yoon , Joong-Shik Shin , Kwang-Ho Kim , Hyun-Mog Park
IPC分类号： H01L27/11565 , H01L27/11568 , H01L27/11578 , H01L27/11582 , H01L27/11575
摘要： A vertical memory device includes a channel, gate lines, and a cutting pattern, respectively, on a substrate. The channel extends in a first direction substantially perpendicular to an upper surface of the substrate. The gate lines are spaced apart from each other in the first direction. Each of the gate lines surrounds the channel and extends in a second direction substantially parallel to the upper surface of the substrate. The cutting pattern includes a first cutting portion extending in the first direction and cutting the gate lines, and a second cutting portion crossing the first cutting portion and merged with the first cutting portion.

10. 发明授权

US08194492B2 Variable resistance memory device and system 有权
标题翻译：可变电阻存储器件和系统
公开(公告)号：US08194492B2
公开(公告)日：2012-06-05
申请号：US12693005
申请日：2010-01-25
申请人： Qi Wang , Kwang-Jin Lee , Woo-Yeong Cho , Taek-Sung Kim , Kwang-Ho Kim , Hyun-Ho Choi , Yong-Jun Lee , Hye-Jin Kim
发明人： Qi Wang , Kwang-Jin Lee , Woo-Yeong Cho , Taek-Sung Kim , Kwang-Ho Kim , Hyun-Ho Choi , Yong-Jun Lee , Hye-Jin Kim
IPC分类号： G11C8/00
CPC分类号： G11C8/12 , G11C11/005 , G11C11/56 , G11C11/5678 , G11C13/0004 , G11C13/0023 , G11C13/0028 , G11C13/0069 , G11C16/0483 , G11C2013/0078 , G11C2213/71
摘要： Disclosed is a semiconductor memory device including a memory cell array having a plurality of variable resistance memory cells divided into first and second areas. An I/O circuit is configured to access the memory cell array under the control of control logic so as to access the first or second area in response to an external command. The I/O circuit accesses the first area using a memory cell unit and the second area using a page unit.
摘要翻译：公开了一种半导体存储器件，包括具有分成第一和第二区域的多个可变电阻存储器单元的存储单元阵列。 I / O电路被配置为在控制逻辑的控制下访问存储单元阵列，以响应于外部命令访问第一或第二区域。 I / O电路使用存储单元单元访问第一区域，并且使用页面单元访问第二区域。

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