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1. 发明授权

US5638524A Digital signal processor and method for executing DSP and RISC class instructions defining identical data processing or data transfer operations 失效
标题翻译：用于执行DSP和RISC类指令的数字信号处理器和方法，用于定义相同的数据处理或数据传输操作
公开(公告)号：US5638524A
公开(公告)日：1997-06-10
申请号：US443199
申请日：1995-05-17
申请人： Atsushi Kiuchi , Toru Baji , Tetsuya Nakagawa , Kenji Kaneko
发明人： Atsushi Kiuchi , Toru Baji , Tetsuya Nakagawa , Kenji Kaneko
IPC分类号： G06F9/30 , G06F9/318 , G06F9/38
CPC分类号： G06F9/3017 , G06F9/30145 , G06F9/3016 , G06F9/30167 , G06F9/3822
摘要： A digital signal processor that includes an instruction memory, a program control unit, and an instruction decoder. The instruction memory stores a sequence of instruction words including DSP instruction words and RISC instruction words. The program control unit outputs an instruction address to the instruction memory so as to select one instruction word in the instruction memory. Every DSP instruction word identifies one data processing operation and one data transfer operation to be performed. The DSP instruction words include a predefined DSP instruction word having separate source and destination fields for specifying register locations for data sources and data destinations. The RISC instruction words include a predefined RISC instruction word corresponding to the predefined DSP instruction word. The predefined RISC instruction word has separate source and destination fields for specifying register locations for data sources and data destinations. One of the source and destination fields in the predefined RISC instruction word has more bits than the corresponding field in the predefined DSP instruction word. The instruction decoder decodes the selected instruction.
摘要翻译：一种包括指令存储器，程序控制单元和指令译码器的数字信号处理器。指令存储器存储包括DSP指令字和RISC指令字的指令字序列。程序控制单元向指令存储器输出指令地址，以便在指令存储器中选择一个指令字。每个DSP指令字标识要执行的一个数据处理操作和一个数据传送操作。 DSP指令字包括具有用于指定数据源和数据目的地的寄存器位置的独立源和目的地字段的预定义DSP指令字。 RISC指令字包括与预定义的DSP指令字对应的预定RISC指令字。预定义的RISC指令字具有用于指定数据源和数据目的地的寄存器位置的单独的源和目标字段。预定义RISC指令字中的源和目标字段之一具有比预定义DSP指令字中相应字段更多的位。指令译码器解码所选择的指令。

2. 发明授权

US4809206A Information processing apparatus 失效
标题翻译：信息处理装置
公开(公告)号：US4809206A
公开(公告)日：1989-02-28
申请号：US87346
申请日：1987-08-20
申请人： Atsushi Kiuchi , Kenji Kaneko , Jun Ishida , Tetsuya Nakagawa , Yoshimune Hagiwara , Hirotada Ueda
发明人： Atsushi Kiuchi , Kenji Kaneko , Jun Ishida , Tetsuya Nakagawa , Yoshimune Hagiwara , Hirotada Ueda
IPC分类号： G06F9/34 , G06F7/544 , G06F12/02 , G06F17/10 , H03H17/02 , G06F7/38
CPC分类号： G06F7/5443
摘要： This invention relates to an information processing apparatus such as a digital signal processor and is applied particularly suitably to a digital filter.A plurality of data from initial value data till final value data relating to filtering coefficients of a digital filter are stored in a data memory, and are sequentially read out by an increment operation of an address arithmetic unit.A data arithmetic unit executes sequentially product and/or sum operations of a plurality of data that are sequentially read out and digital input signals that are sequentially inputted, to perform digital signal processing.The information processing apparatus is equipped particularly with means, which when an access address starts from an initial value, exceeds a final value and reaches a return address due to the increment operation, returns automatically the access address to the initial value. Therefore, a plurality of data stored in the data memory can be utilized repeatedly.Contrivances are made in order to set the number of a plurality of data that are stored in the data memory for repetition of use, to an arbitrary value.
摘要翻译：本发明涉及诸如数字信号处理器的信息处理设备，并且特别适用于数字滤波器。从初始值数据到与数字滤波器的滤波系数相关的最终值数据的多个数据被存储在数据存储器中，并且通过地址运算单元的增量操作被依次读出。数据运算单元依次执行依次读出的多个数据和顺序输入的数字输入信号的乘积和/或和运算，进行数字信号处理。该信息处理装置特别地具有如下装置：当访问地址从初始值开始时，由于增量操作而超过最终值并达到返回地址，自动将访问地址返回到初始值。因此，可以重复使用存储在数据存储器中的多个数据。为了将存储在用于重复使用的数据存储器中的多个数据的数量设置为任意值，进行了操作。

3. 发明授权

US4958276A Single chip processor 失效
标题翻译：单芯片处理器
公开(公告)号：US4958276A
公开(公告)日：1990-09-18
申请号：US128585
申请日：1987-12-04
申请人： Atsushi Kiuchi , Kenji Kaneko , Jun Ishida , Tetsuya Nakagawa , Yoshimune Hagiwara , Takashi Akazawa , Tomoru Sato
发明人： Atsushi Kiuchi , Kenji Kaneko , Jun Ishida , Tetsuya Nakagawa , Yoshimune Hagiwara , Takashi Akazawa , Tomoru Sato
IPC分类号： G06F9/22 , G06F9/30 , G06F9/32 , G06F9/38 , G06F12/06 , G06F15/78
CPC分类号： G06F9/3814 , G06F15/7842 , G06F9/3802
摘要： In a single chip processor which can be provided with an extended program memory, a high-speed access can be executed without being restricted by the access time for the external program memory when an internal program memory is employed, by varying the effective instruction cycle, and thus a high-speed processing performance for a single chip processor of a stored program type can be attained.
摘要翻译：在可以设置有扩展程序存储器的单芯片处理器中，通过改变有效指令周期，可以执行高速访问，而不受外部程序存储器的访问时间的限制，通过使用内部程序存储器，因此能够获得存储节目类型的单芯片处理器的高速处理性能。

4. 发明授权

US4910466A Selecting means for selecting a plurality of information 失效
标题翻译：用于选择多个信息的选择装置
公开(公告)号：US4910466A
公开(公告)日：1990-03-20
申请号：US304878
申请日：1989-01-31
申请人： Atsushi Kiuchi , Jun Ishida , Kenji Kaneko , Tetsuya Nakagawa , Tomoru Sato , Shigeki Masumura , Noriyasu Suzuki , Yoshimune Hagiwara
发明人： Atsushi Kiuchi , Jun Ishida , Kenji Kaneko , Tetsuya Nakagawa , Tomoru Sato , Shigeki Masumura , Noriyasu Suzuki , Yoshimune Hagiwara
IPC分类号： H03K17/00 , H03K17/693
CPC分类号： H03K17/693
摘要： A plurality of external input information are added to a selecting circuit. The output of the selecting circuit is fed back as one of the external input information to the selecting circuit. The input signal groups are decoded, and are produced as control signals to specify the external input information in synchronism with clock signals. When the input select signal groups have the non-selection mode, the output that is fed back is necessarily selected.
摘要翻译：多个外部输入信息被添加到选择电路。选择电路的输出作为外部输入信息之一反馈给选择电路。输入信号组被解码，并作为控制信号产生，以便与时钟信号同步地指定外部输入信息。当输入选择信号组具有非选择模式时，必须选择反馈的输出。

5. 发明授权

US4745581A LSI system of a structure requiring no additional address signals to incorporate additional status registers into the system 失效
标题翻译：不需要附加地址信号的结构的LSI系统将额外的状态寄存器并入系统
公开(公告)号：US4745581A
公开(公告)日：1988-05-17
申请号：US855928
申请日：1986-04-25
申请人： Tomoru Sato , Kenji Kaneko , Hirotada Ueda , Yoshimune Hagiwara , Hitoshi Matsushima , Tetsuya Nakagawa , Atsushi Kiuchi
发明人： Tomoru Sato , Kenji Kaneko , Hirotada Ueda , Yoshimune Hagiwara , Hitoshi Matsushima , Tetsuya Nakagawa , Atsushi Kiuchi
IPC分类号： G06F11/00 , G06F11/07 , G06F11/30 , G06F11/36 , G11C13/00 , G11C11/40
CPC分类号： G06F11/3648 , G06F11/0721 , G06F11/0772
摘要： An LSI system is disclosed in which a plurality of status registers for indicating the internal status of the system are connected to each other so as to form a hierarchical structure and the contents of each of the remaining status registers other than one status register can be transferred to an output register through a bus, to make it possible to provide additional status registers in the system without increasing the number of address signals used and the number of pins connected to external address signal lines.
摘要翻译：公开了一种LSI系统，其中用于指示系统的内部状态的多个状态寄存器彼此连接以形成分层结构，并且可以传送除了一个状态寄存器之外的每个剩余状态寄存器的内容通过总线连接到输出寄存器，以便在不增加使用的地址信号数量和连接到外部地址信号线的引脚数的情况下，在系统中提供附加的状态寄存器。

6. 发明授权

US06993597B2 Terminal apparatus 失效
标题翻译：终端设备
公开(公告)号：US06993597B2
公开(公告)日：2006-01-31
申请号：US10639445
申请日：2003-08-13
申请人： Tetsuya Nakagawa , Yuji Hatano , Yasuhiro Sagesaka , Toru Baji , Koki Noguchi
发明人： Tetsuya Nakagawa , Yuji Hatano , Yasuhiro Sagesaka , Toru Baji , Koki Noguchi
IPC分类号： G06F3/00
CPC分类号： G06F9/3885 , G06F1/3203 , G06F15/7807
摘要： A low cost, a low power consumption and a small size are three very important factors for a mobile communication terminal. A great problem is posed by the conventional technique using a DSP and a CPU independent of each other which requires two external memory systems. Also, two peripheral units are required for data input and output of the DSP and CPU. As a result, an extraneous communication overhead occurs between the DSP and the CPU. The invention realizes a mobile communication terminal system by a DSP/CPU integrated chip comprising a DSP/CPU core (500) integrated as a single bus master, an integrated external bus interface (606) and an integrated peripheral circuit interface. The memory systems and the peripheral circuits of the DSP and the CPU can thus be integrated to realize a mobile communication terminal system low in cost and power consumption and small in size.
摘要翻译：低成本，低功耗和小尺寸是移动通信终端的三个非常重要的因素。使用DSP和独立于彼此的CPU的传统技术提出了一个很大的问题，需要两个外部存储器系统。此外，DSP和CPU的数据输入和输出需要两个外设单元。因此，DSP和CPU之间会发生无关的通信开销。本发明通过DSP / CPU集成芯片实现移动通信终端系统，其包括集成为单总线主机的DSP / CPU核心（500），集成外部总线接口（606）和集成外围电路接口。因此，DSP和CPU的存储器系统和外围电路可以被集成以实现低成本和功耗以及体积小的移动通信终端系统。

7. 发明授权

US5426745A Apparatus including a pair of neural networks having disparate functions cooperating to perform instruction recognition 失效
标题翻译：装置包括具有不同功能的一对神经网络，协同执行指令识别
公开(公告)号：US5426745A
公开(公告)日：1995-06-20
申请号：US206195
申请日：1994-03-03
申请人： Toru Baji , Kouki Noguchi , Tetsuya Nakagawa , Motonobu Tonomura , Hajime Akimoto , Toshiaki Masuhara
发明人： Toru Baji , Kouki Noguchi , Tetsuya Nakagawa , Motonobu Tonomura , Hajime Akimoto , Toshiaki Masuhara
IPC分类号： G06F15/18 , G06F3/00 , G06F3/16 , G06F15/00 , G06F15/02 , G06K9/52 , G06N3/00 , G06N99/00 , G07C9/00 , G10L15/06 , G10L15/16
CPC分类号： G10L15/16 , G06F3/16 , G06K9/522 , G07C9/00071 , G06K2209/01
摘要： There is provided a customized personal terminal device capable of operating in response to input data peculiar to the operator, comprising a speech recognition unit for recognizing inputted speech, an image recognition unit for recognizing inputted image, and an instruction recognition unit for recognizing an inputted instruction. Neural networks respectively provided in at least two of the speech, image and instruction recognition units, a bus operatively connected to the respective recognition units, a processor operatively connected to the bus to perform processing upon the speech, and image and instruction recognized by the recognition units. Also, memory is operatively connected to the bus, and a control unit exercises control over information exchange between respective recognition units and the memory under the control of the processor.
摘要翻译：提供了能够响应于操作者特有的输入数据而操作的定制个人终端装置，包括用于识别输入的语音的语音识别单元，用于识别输入的图像的图像识别单元，以及用于识别输入的指令的指令识别单元。分别设置在语音，图像和指令识别单元中的至少两个中的神经网络，可操作地连接到各个识别单元的总线，可操作地连接到总线以对语音进行处理的处理器，以及通过识别识别的图像和指令单位。此外，存储器可操作地连接到总线，并且控制单元在处理器的控制下对各个识别单元和存储器之间的信息交换进行控制。

8. 发明授权

US5027400A Multimedia bidirectional broadcast system 失效
标题翻译：多媒体双向广播系统
公开(公告)号：US5027400A
公开(公告)日：1991-06-25
申请号：US394786
申请日：1989-08-16
申请人： Toru Baji , Yukio Nakano , Shiro Tanabe , Tetsuya Nakagawa , Hirotsugu Kojima
发明人： Toru Baji , Yukio Nakano , Shiro Tanabe , Tetsuya Nakagawa , Hirotsugu Kojima
IPC分类号： G06F17/30 , G09F27/00 , H04H9/00 , H04H20/28 , H04H20/76 , H04H60/31 , H04L12/00 , H04N7/16 , H04N7/173 , H04Q11/04
CPC分类号： H04H60/31 , G09F27/00 , H04H20/28 , H04H20/76 , H04N21/2543 , H04N21/4722 , H04N21/812 , H04N7/173 , H04N7/17336 , H04Q11/0478 , H04L2012/5638
摘要： A multimedia bidirectional broadcast system including a broadcast station and subscriber terminals. The broadcast station includes a main control unit having therein a data base control table in which program and commerical down load sequences are recorded depending on a setting effected by a subscriber, a motion picture program data base, a commerical data base, a program transmitter for effecting accesses and transmissions of transmission programs onto transmission lines based on the setting of the main control unit, a commercial transmitter for accessing the commerical data base and for transmitting content thereof based on the setting of the main control unit, an image encoder for achieving a bandwidth compression on a video signal, a cell assembler for processing data to be transmitted onto a broadband transmission line so as to generate a cell of the data, and an asynchronous transfer mode exchange for delivering the cell to a subscriber system associated therewith. Each of the subscriber systems includes a network terminal, a terminal control unit, a decoder to decode the compressed video signal, and a television monitor.

9. 发明授权

US06353863B1 Terminal 有权
标题翻译：终奌站
公开(公告)号：US06353863B1
公开(公告)日：2002-03-05
申请号：US09051286
申请日：1998-12-01
申请人： Tetsuya Nakagawa , Yuji Hatano , Yasuhiro Sagesaka , Toru Baji , Koki Noguchi
发明人： Tetsuya Nakagawa , Yuji Hatano , Yasuhiro Sagesaka , Toru Baji , Koki Noguchi
IPC分类号： G06F300
CPC分类号： G06F9/3885 , G06F1/3203 , G06F15/7807
摘要： A low cost, a low power consumption and a small size are three very important factors for a mobile communication terminal. A great problem is posed by the conventional technique using a DSP and a CPU independent of each other which requires two external memory systems. Also, two peripheral units are required for data input and output of the DSP and CPU. As a result, an extraneous communication overhead occurs between the DSP and the CPU. The invention realizes a mobile communication terminal system by a DSP/CPU integrated chip comprising a DSP/CPU core (500) integrated as a single bus master, an integrated external bus interface (606) and an integrated peripheral circuit interface. The memory systems and the peripheral circuits of the DSP and the CPU can thus be integrated to realize a mobile communication terminal system low in cost and power consumption and small in size.
摘要翻译：低成本，低功耗和小尺寸是移动通信终端的三个非常重要的因素。使用DSP和独立于彼此的CPU的传统技术提出了一个很大的问题，需要两个外部存储器系统。此外，DSP和CPU的数据输入和输出需要两个外设单元。因此，DSP和CPU之间会发生无关的通信开销。本发明通过DSP / CPU集成芯片实现移动通信终端系统，其包括集成为单总线主机的DSP / CPU核心（500），集成外部总线接口（606）和集成外围电路接口。因此，DSP和CPU的存储器系统和外围电路可以被集成以实现低成本和功耗以及体积小的移动通信终端系统。

10. 发明授权

US5163111A Customized personal terminal device 失效
标题翻译：定制个人终端设备
公开(公告)号：US5163111A
公开(公告)日：1992-11-10
申请号：US567010
申请日：1990-08-14
申请人： Toru Baji , Kouki Noguchi , Tetsuya Nakagawa , Motonobu Tonomura , Hajime Akimoto , Toshiaki Masuhara
发明人： Toru Baji , Kouki Noguchi , Tetsuya Nakagawa , Motonobu Tonomura , Hajime Akimoto , Toshiaki Masuhara
IPC分类号： G06F15/18 , G06F3/00 , G06F3/16 , G06F15/00 , G06F15/02 , G06K9/52 , G06N3/00 , G06N99/00 , G07C9/00 , G10L15/06 , G10L15/16
CPC分类号： G10L15/16 , G06F3/16 , G06K9/522 , G07C9/00071 , G06K2209/01
摘要： There is provided a customized personal terminal device capable of operating in response to input data peculiar to the operator, comprising a speech recognition unit for recognizing inputted speech, an image recognition unit for recognizing inputted image, and an instruction recognition unit for recognizing an inputted instruction. Neural networks are provided in at least two of the speech, image and instruction recognition units, a bus operatively connected to the respective recognition units, a processor operatively connected to the bus to perform processing upon the speech, and image and instruction recognized by the recognition units. Also, memory is operatively connected to the bus, and a control unit exercises control over information exchange between respective recognition units and the memory under the control of the processor.
摘要翻译：提供了能够响应于操作者特有的输入数据而操作的定制个人终端装置，包括用于识别输入的语音的语音识别单元，用于识别输入的图像的图像识别单元，以及用于识别输入的指令的指令识别单元。神经网络提供在语音，图像和指令识别单元中的至少两个中，可操作地连接到各个识别单元的总线，可操作地连接到总线以对语音执行处理的处理器，以及通过识别识别的图像和指令单位。此外，存储器可操作地连接到总线，并且控制单元在处理器的控制下对各个识别单元和存储器之间的信息交换进行控制。

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