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1. 发明授权

US4910466A Selecting means for selecting a plurality of information 失效
标题翻译：用于选择多个信息的选择装置
公开(公告)号：US4910466A
公开(公告)日：1990-03-20
申请号：US304878
申请日：1989-01-31
申请人： Atsushi Kiuchi , Jun Ishida , Kenji Kaneko , Tetsuya Nakagawa , Tomoru Sato , Shigeki Masumura , Noriyasu Suzuki , Yoshimune Hagiwara
发明人： Atsushi Kiuchi , Jun Ishida , Kenji Kaneko , Tetsuya Nakagawa , Tomoru Sato , Shigeki Masumura , Noriyasu Suzuki , Yoshimune Hagiwara
IPC分类号： H03K17/00 , H03K17/693
CPC分类号： H03K17/693
摘要： A plurality of external input information are added to a selecting circuit. The output of the selecting circuit is fed back as one of the external input information to the selecting circuit. The input signal groups are decoded, and are produced as control signals to specify the external input information in synchronism with clock signals. When the input select signal groups have the non-selection mode, the output that is fed back is necessarily selected.
摘要翻译：多个外部输入信息被添加到选择电路。选择电路的输出作为外部输入信息之一反馈给选择电路。输入信号组被解码，并作为控制信号产生，以便与时钟信号同步地指定外部输入信息。当输入选择信号组具有非选择模式时，必须选择反馈的输出。

2. 发明授权

US4958276A Single chip processor 失效
标题翻译：单芯片处理器
公开(公告)号：US4958276A
公开(公告)日：1990-09-18
申请号：US128585
申请日：1987-12-04
申请人： Atsushi Kiuchi , Kenji Kaneko , Jun Ishida , Tetsuya Nakagawa , Yoshimune Hagiwara , Takashi Akazawa , Tomoru Sato
发明人： Atsushi Kiuchi , Kenji Kaneko , Jun Ishida , Tetsuya Nakagawa , Yoshimune Hagiwara , Takashi Akazawa , Tomoru Sato
IPC分类号： G06F9/22 , G06F9/30 , G06F9/32 , G06F9/38 , G06F12/06 , G06F15/78
CPC分类号： G06F9/3814 , G06F15/7842 , G06F9/3802
摘要： In a single chip processor which can be provided with an extended program memory, a high-speed access can be executed without being restricted by the access time for the external program memory when an internal program memory is employed, by varying the effective instruction cycle, and thus a high-speed processing performance for a single chip processor of a stored program type can be attained.
摘要翻译：在可以设置有扩展程序存储器的单芯片处理器中，通过改变有效指令周期，可以执行高速访问，而不受外部程序存储器的访问时间的限制，通过使用内部程序存储器，因此能够获得存储节目类型的单芯片处理器的高速处理性能。

3. 发明授权

US4809206A Information processing apparatus 失效
标题翻译：信息处理装置
公开(公告)号：US4809206A
公开(公告)日：1989-02-28
申请号：US87346
申请日：1987-08-20
申请人： Atsushi Kiuchi , Kenji Kaneko , Jun Ishida , Tetsuya Nakagawa , Yoshimune Hagiwara , Hirotada Ueda
发明人： Atsushi Kiuchi , Kenji Kaneko , Jun Ishida , Tetsuya Nakagawa , Yoshimune Hagiwara , Hirotada Ueda
IPC分类号： G06F9/34 , G06F7/544 , G06F12/02 , G06F17/10 , H03H17/02 , G06F7/38
CPC分类号： G06F7/5443
摘要： This invention relates to an information processing apparatus such as a digital signal processor and is applied particularly suitably to a digital filter.A plurality of data from initial value data till final value data relating to filtering coefficients of a digital filter are stored in a data memory, and are sequentially read out by an increment operation of an address arithmetic unit.A data arithmetic unit executes sequentially product and/or sum operations of a plurality of data that are sequentially read out and digital input signals that are sequentially inputted, to perform digital signal processing.The information processing apparatus is equipped particularly with means, which when an access address starts from an initial value, exceeds a final value and reaches a return address due to the increment operation, returns automatically the access address to the initial value. Therefore, a plurality of data stored in the data memory can be utilized repeatedly.Contrivances are made in order to set the number of a plurality of data that are stored in the data memory for repetition of use, to an arbitrary value.
摘要翻译：本发明涉及诸如数字信号处理器的信息处理设备，并且特别适用于数字滤波器。从初始值数据到与数字滤波器的滤波系数相关的最终值数据的多个数据被存储在数据存储器中，并且通过地址运算单元的增量操作被依次读出。数据运算单元依次执行依次读出的多个数据和顺序输入的数字输入信号的乘积和/或和运算，进行数字信号处理。该信息处理装置特别地具有如下装置：当访问地址从初始值开始时，由于增量操作而超过最终值并达到返回地址，自动将访问地址返回到初始值。因此，可以重复使用存储在数据存储器中的多个数据。为了将存储在用于重复使用的数据存储器中的多个数据的数量设置为任意值，进行了操作。

4. 发明授权

US4740923A Memory circuit and method of controlling the same 失效
标题翻译：存储电路及其控制方法
公开(公告)号：US4740923A
公开(公告)日：1988-04-26
申请号：US799640
申请日：1985-11-19
申请人： Kenji Kaneko , Jun Ishida , Yoshimune Hagiwara , Hitoshi Matsushima , Hirotada Ueda
发明人： Kenji Kaneko , Jun Ishida , Yoshimune Hagiwara , Hitoshi Matsushima , Hirotada Ueda
IPC分类号： G01R1/067 , G01R1/073 , H05K13/08 , G11C7/00
CPC分类号： G01R1/07328 , G01R1/06722 , G01R1/07378 , H05K13/08
摘要： A memory circuit is divided into a plurality of memory blocks, and an address register and a delay register are disposed in each memory block. Therefore, a read or write operation and a shifting operation of the address for storing data inside a memory matrix can be realized by a pipeline technique, and hence a memory circuit having a high processing speed is obtained.
摘要翻译：存储器电路被分成多个存储块，并且地址寄存器和延迟寄存器被布置在每个存储块中。因此，通过流水线技术可以实现用于将数据存储在存储器矩阵内的地址的读取或写入操作和移位操作，因此获得具有高处理速度的存储器电路。

5. 发明授权

US09197155B2 Terminal plate circuit 有权
标题翻译：端子板电路
公开(公告)号：US09197155B2
公开(公告)日：2015-11-24
申请号：US12529685
申请日：2008-08-25
申请人： Jun Ishida , Kenji Hamano
发明人： Jun Ishida , Kenji Hamano
IPC分类号： H02B1/01 , H02B1/56 , H05K7/20 , H02S40/34
CPC分类号： H02S40/345 , H02B1/01
摘要： In a terminal plate circuit in which the bottom surface of the diode is attached to the surface of the terminal plate with solder so as to dissipate the heat of the diode, heat transfer from the diode to the terminal plate is facilitated by removing the air bubbles in the solder during the soldering. A terminal plate circuit configured in such a manner that a metal part of a bottom surface of a diode of surface mounting type is soldered onto a surface of a terminal plate that is larger than the metal part, characterized in that streaks consisting of a plurality of lines that do not intersect with each other are formed on the surface of the terminal plate onto which the diode is to be soldered, whereby air bubbles generated within the solder during the soldering are let to escape from a lower surface of the diode to outside through the streaks. This terminal plate circuit is suitable for the use in a terminal box for solar cell panel.
摘要翻译：在二极管的底表面用焊料附着到端子板的表面以便散发二极管的热量的端子板电路中，通过去除气泡来促进从二极管到端子板的传热在焊锡时焊接。一种端子板电路，其构造为使得表面安装型二极管的底面的金属部分焊接到比金属部分大的端子板的表面上，其特征在于，由多个在要焊接二极管的端子板的表面上形成彼此不相交的线，由此在焊接期间在焊料内产生的气泡从二极管的下表面逸出到外部条纹。该端子板电路适用于太阳能电池板的接线盒。

6. 发明授权

US08481210B2 Hydrogen-absorbing alloy, fabrication method thereof and alkaline storage battery 有权
标题翻译：吸氢合金，其制造方法和碱性蓄电池
公开(公告)号：US08481210B2
公开(公告)日：2013-07-09
申请号：US12944952
申请日：2010-11-12
申请人： Jun Ishida , Yoshifumi Magari , Shigekazu Yasuoka
发明人： Jun Ishida , Yoshifumi Magari , Shigekazu Yasuoka
IPC分类号： H01M4/58 , C22C28/00
CPC分类号： C22C19/03 , C22C19/058 , C22F1/10 , H01M4/242 , H01M4/383 , H01M10/30 , Y02E60/124
摘要： An alkaline storage battery has a negative electrode using a hydrogen-absorbing alloy represented by a general formula Ln1-xMgxNiyAz wherein Ln is at least one element selected from rare-earth elements including Y, Ca, Zr, and Ti, A is at least one element selected from Co, Fe, Mn, V, Cr, Nb, Al, Ga, Zn, Sn, Cu, Si, P and B, and 0.15≦x≦0.30, 0
摘要翻译：碱性蓄电池具有使用由通式Ln1-xMgxNiyAz表示的吸氢合金的负极，其中Ln是选自Y，Ca，Zr和Ti的稀土元素中的至少一种元素，A是至少一种选自Co，Fe，Mn，V，Cr，Nb，Al，Ga，Zn，Sn，Cu，Si，P和B的元素，以及0.15 @ x @ 0.30,0

7. 发明授权

US08317950B2 Method of making hydrogen-absorbing alloy for alkaline storage battery, and alkaline storage battery 有权
标题翻译：制备碱性蓄电池用吸氢合金和碱性蓄电池的方法
公开(公告)号：US08317950B2
公开(公告)日：2012-11-27
申请号：US12232129
申请日：2008-09-11
申请人： Yoshifumi Magari , Jun Ishida , Shigekazu Yasuoka
发明人： Yoshifumi Magari , Jun Ishida , Shigekazu Yasuoka
IPC分类号： C22F1/10
CPC分类号： H01M4/383 , C22C19/007 , C22C19/03 , H01M10/345 , Y02E60/124 , Y02P70/54
摘要： A hydrogen-absorbing alloy for alkaline storage battery which is produced by a rapid cool using a rapid quenching method and whose component is represented by a general formula Ln1-xMgxNia-b-cAlbZc is used for a negative electrode of an alkaline storage battery.
摘要翻译：碱性蓄电池的负极使用通过快速冷却法快速冷却而制成的碱性蓄电池用吸氢合金，其成分用通式Ln1-xMgxNia-b-cAlbZc表示。

8. 发明授权

US08101121B2 Hydrogen absorbing alloy for alkaline storage battery 有权
标题翻译：碱性蓄电池用吸氢合金
公开(公告)号：US08101121B2
公开(公告)日：2012-01-24
申请号：US10743745
申请日：2003-12-24
申请人： Shigekazu Yasuoka , Jun Ishida , Tetsuyuki Murata , Hiroshi Nakamura
发明人： Shigekazu Yasuoka , Jun Ishida , Tetsuyuki Murata , Hiroshi Nakamura
IPC分类号： C22C19/03 , C22C19/05 , H01M4/13
CPC分类号： H01M10/26 , H01M4/0471 , H01M4/383 , H01M4/52 , H01M10/342 , Y02E60/124
摘要： A hydrogen absorbing alloy represented by the formula Ln1−xMgxNiy−aAla (where Ln is at least one element selected from rare earth elements, 0.05≦x
摘要翻译：由式Ln1-xMgxNiy-aAla表示的吸氢合金（其中Ln为选自稀土元素中的至少一种元素，0.05≤n1E; x <0.20，2.8＆nlE; y＆nlE; 3.9和0.10＆nlE; a＆nlE; 0.25）用于碱性蓄电池。

9. 发明申请

US20100081053A1 Negative electrode for alkaline storage battery, alkaline storage battery, and method of manufacturing alkaline storage battery 审中-公开
标题翻译：碱性蓄电池用负极，碱性蓄电池及碱蓄电池的制造方法
公开(公告)号：US20100081053A1
公开(公告)日：2010-04-01
申请号：US12588015
申请日：2009-09-30
申请人： Jun Ishida
发明人： Jun Ishida
IPC分类号： H01M4/58 , H02J7/00
CPC分类号： H01M4/242 , H01M4/366 , H01M4/383 , H01M4/385 , H01M4/46 , H01M10/345 , Y02E60/124 , Y02P70/54
摘要： A negative electrode for alkaline storage batteries uses a hydrogen-absorbing alloy represented by the general formula Ln1-xMgxNiy-a-bAlaMb, having a crystal structure other than CaCu5 type. First to third layers S1 to S3 are formed on the surface of the bulk phase B of the hydrogen-absorbing alloy. The first layer closest to the bulk phase contains oxygen in a greater amount than the second layer located on the first layer, and contains at least one element soluble in an alkaline solution in an amount of 10 atom % or greater. The second layer located on the first layer has a Ni content higher than that of the bulk phase. The third layer located on the second layer has a NiO content higher than the NiO content in the second layer.
摘要翻译：碱性蓄电池用负极使用具有CaCu5型以外的晶体结构的通式Ln1-xMgxNiy-a-bAlaMb表示的吸氢合金。在吸氢合金的体相B的表面上形成有第一至第三层S1至S3。最靠近体相的第一层含有比位于第一层上的第二层更大量的氧，并且含有至少一种可溶于碱性溶液的元素，其量为10原子％或更大。位于第一层上的第二层的Ni含量高于体相。位于第二层上的第三层的NiO含量高于第二层中的NiO含量。

10. 发明授权

US07309547B2 Hydrogen absorbing alloy, electrode thereof and nickel-metal hydride battery 有权
标题翻译：吸氢合金，其电极和镍氢电池
公开(公告)号：US07309547B2
公开(公告)日：2007-12-18
申请号：US10787593
申请日：2004-02-27
申请人： Tetsuyuki Murata , Shigekazu Yasuoka , Jun Ishida
发明人： Tetsuyuki Murata , Shigekazu Yasuoka , Jun Ishida
IPC分类号： H01M4/58 , H01M4/00
CPC分类号： H01M4/242 , H01M4/0404 , H01M4/043 , H01M4/383 , H01M10/345 , H01M2004/027 , Y02E60/124 , Y10S420/90
摘要： A hydrogen absorbing alloy containing at least a rare-earth element, magnesium (Mg), nickel (Ni) and aluminum (Al), having an intensity ratio (IA/IB) of not smaller than 0.6 (where IA represents an intensity of the highest peak in a range of 2θ=30°˜34° in the X-ray diffraction pattern using CuKα-radiation as the X-ray source and IB represents the intensity of the highest peak in a range of 2θ=40°˜44°), and not substantially including La as the rare-earth element.
摘要翻译：含有至少含有稀土元素的镁（Mg），镍（Ni）和铝（Al））的吸氢合金，其强度比（I A / A / SUB>）不大于0.6（其中I A表示使用CuKα的X射线衍射图中在2θ= 30°〜34°的范围内的最高峰的强度作为X射线源的辐射，I B表示在2θ= 40°〜44°的范围内的最高峰的强度），并且基本上不包括作为稀有的La 地面元素

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