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1. 发明申请

US20060136751A1 Using electrically programmable fuses to hide architecture, prevent reverse engineering, and make a device inoperable 有权
公开(公告)号：US20060136751A1
公开(公告)日：2006-06-22
申请号：US11016219
申请日：2004-12-17
申请人： Anthony Bonaccio , Karl Erickson , John Fifield , Chandrasekharan Kothandaraman , Phil Paone , William Tonti
发明人： Anthony Bonaccio , Karl Erickson , John Fifield , Chandrasekharan Kothandaraman , Phil Paone , William Tonti
IPC分类号： G06F12/14
CPC分类号： G06F12/1433 , G06F21/6245
摘要： Techniques and systems whereby operation of and/or access to particular features of an electronic device may be controlled after the device has left the control of the manufacturer are provided. The operation and/or access may be provided based on values stored in non-volatile storage elements, such as electrically programmable fused (eFUSES).

2. 发明申请

US20070241768A1 CHANGING CHIP FUNCTION BASED ON FUSE STATES 有权
标题翻译：基于保险丝状态改变芯片功能
公开(公告)号：US20070241768A1
公开(公告)日：2007-10-18
申请号：US11760575
申请日：2007-06-08
申请人： KARL ERICKSON , John Fifield , Chandrasekharan Kothandaraman , Phil Paone , William Tonti
发明人： KARL ERICKSON , John Fifield , Chandrasekharan Kothandaraman , Phil Paone , William Tonti
IPC分类号： G11C8/20
CPC分类号： G06F21/71
摘要： Techniques and systems whereby operation of and/or access to particular features of an electronic device may be controlled after the device has left the control of the manufacturer are provided. The operation and/or access may be provided based on values stored in non-volatile storage elements, such as electrically programmable fuses (eFUSES).
摘要翻译：提供了在设备已经离开制造商的控制之后可以控制电子设备的特定特征的操作和/或访问的技术和系统。操作和/或访问可以基于存储在诸如电可编程熔丝（eFUSES）的非易失性存储元件中的值来提供。

3. 发明申请

US20080061817A1 Changing Chip Function Based on Fuse States 审中-公开
标题翻译：基于保险丝状态改变芯片功能
公开(公告)号：US20080061817A1
公开(公告)日：2008-03-13
申请号：US11928539
申请日：2007-10-30
申请人： Karl Erickson , John Fifield , Chandrasekharan Kothandaraman , Phil Paone , William Tonti
发明人： Karl Erickson , John Fifield , Chandrasekharan Kothandaraman , Phil Paone , William Tonti
IPC分类号： H03K19/00
CPC分类号： G06F17/5054 , G06F21/76
摘要： Systems, methods, and design structures whereby operation of and/or access to particular features of an electronic device may be controlled after the device has left the control of the manufacturer are provided. The operation and/or access may be provided based on values stored in non-volatile storage elements, such as electrically programmable fused (eFUSES).
摘要翻译：可以在设备已经离开制造商的控制之后控制电子设备的特定特征的操作和/或访问的系统，方法和设计结构。可以基于存储在诸如电可编程融合（eFUSES）的非易失性存储元件中的值来提供操作和/或访问。

4. 发明申请

US20060136858A1 Utilizing fuses to store control parameters for external system components 审中-公开
标题翻译：利用保险丝存储外部系统组件的控制参数
公开(公告)号：US20060136858A1
公开(公告)日：2006-06-22
申请号：US11016214
申请日：2004-12-17
申请人： Karl Erickson , John Fifield , Chandrasekharan Kothandaraman , Phil Paone , William Tonti
发明人： Karl Erickson , John Fifield , Chandrasekharan Kothandaraman , Phil Paone , William Tonti
IPC分类号： G06F17/50 , H03K19/00
CPC分类号： G11C17/18
摘要： Techniques and systems whereby operation of and/or access to particular features of an electronic device may be controlled after the device has left the control of the manufacturer are provided. The operation and/or access may be provided based on values stored in non-volatile storage elements, such as electrically programmable fused (eFUSES).
摘要翻译：提供了在设备已经离开制造商的控制之后可以控制电子设备的特定特征的操作和/或访问的技术和系统。可以基于存储在诸如电可编程融合（eFUSES）的非易失性存储元件中的值来提供操作和/或访问。

5. 发明申请

US20060131743A1 Changing chip function based on fuse states 有权
标题翻译：基于保险丝状态改变芯片功能
公开(公告)号：US20060131743A1
公开(公告)日：2006-06-22
申请号：US11016220
申请日：2004-12-17
申请人： Karl Erickson , John Fifield , Chandrasekharan Kothandaraman , Phil Paone , William Tonti
发明人： Karl Erickson , John Fifield , Chandrasekharan Kothandaraman , Phil Paone , William Tonti
IPC分类号： H01L23/48
CPC分类号： G06F21/71
摘要： Techniques and systems whereby operation of and/or access to particular features of an electronic device may be controlled after the device has left the control of the manufacturer are provided. The operation and/or access may be provided based on values stored in non-volatile storage elements, such as electrically programmable fused (eFUSES).
摘要翻译：提供了在设备已经离开制造商的控制之后可以控制电子设备的特定特征的操作和/或访问的技术和系统。可以基于存储在诸如电可编程融合（eFUSES）的非易失性存储元件中的值来提供操作和/或访问。

6. 发明申请

US20080106323A1 Electrically Programmable Fuse Sense Circuit 失效
标题翻译：电子可编程保险丝感应电路
公开(公告)号：US20080106323A1
公开(公告)日：2008-05-08
申请号：US11550960
申请日：2006-10-19
申请人： Anthony Gus Aipperspach , David Howard Allen , Phil Paone , David Edward Schmitt , Gregory John Uhlmann
发明人： Anthony Gus Aipperspach , David Howard Allen , Phil Paone , David Edward Schmitt , Gregory John Uhlmann
IPC分类号： H01H37/76
CPC分类号： G11C17/16 , G11C17/18
摘要： A electrically programmable fuse sense circuit having an electrically programmable fuse and a reference resistance. A first current source is coupled, through a first switch, to the electrically programmable fuse. A second current source is coupled, through a second switch, to the reference resistance. A precharge signal enables the first current source, the second current source and closes the first switch and the second switch, creating voltage drops across the electrically programmable fuse and the reference resistance. When the precharge signal goes inactive, the first current source and the second current source are shut off, and, at the same time the first switch and the second switch are opened. A latching circuit uses a difference in the voltage drops when the precharge signal goes inactive to store a state of the electrically programmable fuse, indicative of whether the electrically programmable fuse is blown or unblown.
摘要翻译：一种具有电可编程熔丝和参考电阻的电可编程熔丝检测电路。第一电流源通过第一开关耦合到电可编程保险丝。第二电流源通过第二开关耦合到参考电阻。预充电信号使得第一电流源，第二电流源能够闭合第一开关和第二开关，从而在电可编程保险丝和参考电阻之间产生电压降。当预充电信号不起作用时，第一电流源和第二电流源被切断，同时第一开关和第二开关断开。当预充电信号无效以存储电可编程熔丝的状态时，锁存电路使用电压降的差异，指示电可编程熔丝是否被吹制或未被吹出。

7. 发明授权

US07218543B2 ROM load balancing for bit lines 有权
标题翻译： ROM负载平衡的位线
公开(公告)号：US07218543B2
公开(公告)日：2007-05-15
申请号：US11232767
申请日：2005-09-22
申请人： Todd Alan Christensen , Ryan O'Neal Miller , Phil Paone
发明人： Todd Alan Christensen , Ryan O'Neal Miller , Phil Paone
IPC分类号： G11C17/00
CPC分类号： G11C17/18 , G11C7/12 , G11C7/18
摘要： An apparatus and method to improve a cycle time of a Read Only Memory (ROM). Loading of each bit line is controlled such that no bit line has less than a specified loading fraction of a loading of a maximally loaded bit line. No additional space or additional circuitry is required. Four NFET pair arrangements are personalizable by via placement by a designer or design automation program. One of the NFET pair arrangements is usable to pad load on a bit line without altering a logical personalization of the bit line. Proper selection from the four NFET pair arrangements ensure that no bit line has less than the specified loading fraction of the loading of the maximally loaded bit line, as well as providing proper logical personality of the bit line.
摘要翻译：一种用于改善只读存储器（ROM）的周期时间的装置和方法。控制每个位线的加载使得没有位线小于装载最大负载位线的指定负载分数。不需要额外的空间或额外的电路。四个NFET对安排可以通过设计者或设计自动化程序的放置来个性化。 NFET对布置中的一个可用于在位线上填充负载而不改变位线的逻辑个性化。来自四个NFET对布置的适当选择确保没有位线小于最大负载位线的负载的指定负载分数，以及提供位线的适当逻辑个性。

8. 发明授权

US07528646B2 Electrically programmable fuse sense circuit 失效
标题翻译：电可编程保险丝检测电路
公开(公告)号：US07528646B2
公开(公告)日：2009-05-05
申请号：US11550960
申请日：2006-10-19
申请人： Anthony Gus Aipperspach , David Howard Allen , Phil Paone , David Edward Schmitt , Gregory John Uhlmann
发明人： Anthony Gus Aipperspach , David Howard Allen , Phil Paone , David Edward Schmitt , Gregory John Uhlmann
IPC分类号： H01H37/76 , H01H85/00
CPC分类号： G11C17/16 , G11C17/18
摘要： A electrically programmable fuse sense circuit having an electrically programmable fuse and a reference resistance. A first current source is coupled, through a first switch, to the electrically programmable fuse. A second current source is coupled, through a second switch, to the reference resistance. A precharge signal enables the first current source, the second current source and closes the first switch and the second switch, creating voltage drops across the electrically programmable fuse and the reference resistance. When the precharge signal goes inactive, the first current source and the second current source are shut off, and, at the same time the first switch and the second switch are opened. A latching circuit uses a difference in the voltage drops when the precharge signal goes inactive to store a state of the electrically programmable fuse, indicative of whether the electrically programmable fuse is blown or unblown.
摘要翻译：一种具有电可编程熔丝和参考电阻的电可编程熔丝检测电路。第一电流源通过第一开关耦合到电可编程保险丝。第二电流源通过第二开关耦合到参考电阻。预充电信号使得第一电流源，第二电流源能够闭合第一开关和第二开关，从而在电可编程保险丝和参考电阻之间产生电压降。当预充电信号不起作用时，第一电流源和第二电流源被切断，同时第一开关和第二开关断开。当预充电信号无效以存储电可编程熔丝的状态时，锁存电路使用电压降的差异，指示电可编程熔丝是否被吹制或未被吹出。

9. 发明申请

US20070258309A1 SECURING AN INTEGRATED CIRCUIT 失效
标题翻译：保护集成电路
公开(公告)号：US20070258309A1
公开(公告)日：2007-11-08
申请号：US11381837
申请日：2006-05-05
申请人： Robert Dixon , Kirk Morrow , Phil Paone
发明人： Robert Dixon , Kirk Morrow , Phil Paone
IPC分类号： G11C17/18
CPC分类号： G11C17/18 , G11C7/24 , G11C29/46
摘要： Securing an integrated circuit, including fabricating the integrated circuit so that the integrated circuit includes at least one efuse that is intended to be always blown during operation of the integrated circuit and the integrated circuit includes security circuitry capable of blowing the efuse and of performing other security related functions; blowing, by the security circuitry of the integrated circuit, the efuse when power is applied to the integrated circuit and prior to performing any other security related functions; and setting, by the security circuitry after blowing the efuse, a security state of the integrated circuit in dependence upon a sensed state of the efuse.
摘要翻译：确保集成电路的安全性，包括制造集成电路，使得集成电路包括至少一个在集成电路的操作期间总是被吹扫的efuse，并且该集成电路包括能够吹动熔点并执行其它安全性的安全电路相关功能; 通过集成电路的安全电路，在向集成电路施加电力时，以及在执行任何其他与安全相关的功能之前，进行充电; 并且根据感测到的所述efuse的状态，通过所述安全电路在吹出所述efuse之后设置所述集成电路的安全状态。

10. 发明申请

US20070133333A1 EFUSE SENSE CIRCUIT 失效
标题翻译： EFUSE SENSE电路
公开(公告)号：US20070133333A1
公开(公告)日：2007-06-14
申请号：US11297311
申请日：2005-12-08
申请人： William Hovis , Alan Leslie , Phil Paone , David Siljenberg , Salvatore Storino , Gregory Uhlmann
发明人： William Hovis , Alan Leslie , Phil Paone , David Siljenberg , Salvatore Storino , Gregory Uhlmann
IPC分类号： G11C17/18
CPC分类号： G11C17/18
摘要： An eFuse reference cell on a chip provides a reference voltage that is greater than a maximum voltage produced by an eFuse cell having an unblown eFuse on the chip but less than a minimum voltage produced by an eFuse cell having a blown eFuse on the chip. A reference current flows through a resistor and an unblown eFuse in the eFuse reference cell, producing the reference voltage. The reference voltage is used to create a mirrored copy of the reference current in the eFuse cell. The mirrored copy of the reference current flows through an eFuse in the eFuse cell. A comparator receives the reference voltage and the voltage produced by the eFuse cell. The comparator produces an output logic level responsive to the voltage produced by the eFuse cell compared to the reference voltage.
摘要翻译：芯片上的eFuse参考单元提供的参考电压大于由芯片上具有未引脚eFuse的eFuse单元产生的最小电压，但小于由芯片上具有熔断eFuse的eFuse单元产生的最小电压。参考电流流过eFuse参考电池中的电阻和非吹出eFuse，产生参考电压。参考电压用于在eFuse单元中创建参考电流的镜像副本。参考电流的镜像副本通过eFuse单元中的eFuse流动。比较器接收参考电压和eFuse单元产生的电压。比较器产生一个响应于eFuse电池与参考电压相比产生的电压的输出逻辑电平。

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