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    • 7. 发明授权
    • Method of etching a trench in a silicon-on-insulator (SOI) structure
    • 蚀刻绝缘体上硅(SOI)结构中的沟槽的方法
    • US06759340B2
    • 2004-07-06
    • US10143269
    • 2002-05-09
    • Padmapani C. NallanAjay KumarAnisul H. KhanChan-Syun David Yang
    • Padmapani C. NallanAjay KumarAnisul H. KhanChan-Syun David Yang
    • H01L21302
    • H01L21/30655
    • Disclosed herein is a method of etching a trench in silicon overlying a dielectric material which reduces or substantially eliminates notching at the base of the trench, while reducing scalloping on the sidewalls of the trench. The method comprises etching a first portion of a trench by exposing a silicon substrate, through a patterned masking layer, to a plasma generated from a fluorine-containing gas. This etching is followed by a polymer deposition step comprising exposing the substrate to a plasma generated from a gas which is capable of forming a polymer on etched silicon surfaces. The etching and polymer deposition steps are repeated for a number of cycles, depending on the desired depth of the first portion of the trench. The final portion of the trench is etched by exposing the silicon to a plasma generated from a combination of a fluorine-containing gas and a polymer-forming gas.
    • 本文公开了一种在覆盖电介质材料的硅中蚀刻沟槽的方法,其减小或基本上消除在沟槽的基部处的凹口,同时减少沟槽侧壁上的扇形。 该方法包括通过将硅衬底通过图案化掩模层暴露于由含氟气体产生的等离子体来蚀刻沟槽的第一部分。 该蚀刻之后是聚合物沉积步骤,包括将衬底暴露于由能够在蚀刻的硅表面上形成聚合物的气体产生的等离子体。 根据沟槽第一部分的期望深度,蚀刻和聚合物沉积步骤重复多个循环。 通过将硅暴露于由含氟气体和聚合物形成气体的组合产生的等离子体来蚀刻沟槽的最后部分。