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    • 4. 发明授权
    • Power rectifier device and method of fabricating power rectifier devices
    • 电力整流装置及制造电力整流装置的方法
    • US06331455B1
    • 2001-12-18
    • US09283537
    • 1999-04-01
    • Vladimir RodovWayne Y. W. HsuehPaul ChangMichael Chern
    • Vladimir RodovWayne Y. W. HsuehPaul ChangMichael Chern
    • H01L21332
    • H01L29/7802H01L21/2815H01L27/0814H01L27/095H01L29/0634H01L29/1095H01L29/66712H01L29/781H01L29/861H01L29/872
    • A power rectifier having low on resistance, mass recovery times and low forward voltage drop. In a preferred embodiment, the present invention provides a power rectifier device employing a vertical device structure, i.e., with current flow between the major surfaces of the discrete device. The device employs a large number of parallel connected cells, each comprising a MOSFET structure with a gate to drain short via a common metallization. This provides a low Vf path through the channel regions of the MOSFET cells to the source region on the other side of the integrated circuit. A thin gate structure is formed annularly around the pedestal regions on the upper surface of the device and a precisely controlled body implant defines the channel region and allows controllable device characteristics, including gate threshold voltage and Vf. A parallel Schottky diode is also provided which increases the switching speed of the MOSFET cells. The present invention further provides a method for manufacturing a rectifier device which provides highly repeatable device characteristics and which can provide such devices at reduced cost. The active channel regions of the device are defined using pedestals in a double spacer, double implant self-aligned process. The channel dimensions and doping characteristics may be precisely controlled despite inevitable process variations in spacer sidewall formation. Only two masking steps are required, reducing processing costs.
    • 具有低导通电阻,质量恢复时间和低正向压降的电力整流器。 在优选实施例中,本发明提供一种采用垂直装置结构的电力整流装置,即在分立装置主要表面之间的电流流动。 该器件采用大量并联连接的单元,每个单元包括具有栅极的MOSFET结构,以通过公共金属化来短路。 这提供了通过MOSFET单元的沟道区域到集成电路另一侧的源极区域的低Vf路径。 薄栅结构围绕设备的上表面上的基座区域环形地形成,并且精确控制的体植入物限定沟道区域并且允许可控制的器件特性,包括栅极阈值电压和Vf。 还提供了并联肖特基二极管,其提高了MOSFET电池的开关速度。 本发明还提供一种制造整流器件的方法,其提供高度可重复的器件特性,并且可以以降低的成本提供这样的器件。 器件的有源通道区域使用双间隔器中的基座来限定,双注入自对准过程。 尽管间隔壁侧壁形成中不可避免的工艺变化也可精确地控制通道尺寸和掺杂特性。 只需要两个屏蔽步骤,降低处理成本。
    • 7. 发明授权
    • Method and apparatus for depositing monomolecular layers on a substrate
    • 在基板上沉积单分子层的方法和装置
    • US4722856A
    • 1988-02-02
    • US815512
    • 1986-01-02
    • Otto AlbrechtMeir BarturVladimir Rodov
    • Otto AlbrechtMeir BarturVladimir Rodov
    • B01J19/00B05C3/00B05C3/02B05C3/12B05D1/18B05D1/20B05D1/36B05D7/00C08J5/18H01L21/312B29C39/00
    • B82Y30/00B05C3/02B05D1/202B05D1/206B82Y40/00
    • Disclosed is a method and apparatus for continuously forming and depositing a layer of monomolecular amphiphilic molecules on a substrate. The present invention includes an apparatus and method for transferring and compressing an uncompressed molecular layer from one liquid surface region to another adjacent liquid surface region by using non-moving or static mechanical components which do not come into direct contact with the monomolecular layer. The present invention is based on the fact that by continuously flowing liquid from one region to an adjacent region by using non-moving or static mechanical components that do not touch the monomolecular layer, a monomolecular layer having surprisingly little damage can be transported to the adjacent region and simultaneouly compressed by the flowing liquid surface. The monomolecular layer can then be coated onto a substrate. Due to the present invention, it is now commercially feasible to continuously supply one region with a solution of amphiphilic molecules, and then to deposit continuously onto a substrate or onto several substrates within a region in flow communication with the former region, the monomolecular layer which has been compressed and transported into this latter region.
    • 公开了一种用于在基板上连续形成和沉积单分子两亲分子层的方法和装置。 本发明包括通过使用不与单分子层直接接触的非移动或静态机械组分将未压缩分子层从一个液体表面区域转移和压缩到另一相邻液体表面区域的装置和方法。 本发明基于以下事实:通过使用不接触单分子层的非移动或静态机械组分将液体从一个区域连续流动到相邻区域,具有惊人的极小损伤的单分子层可以被运送到相邻的 并由流动的液体表面同时压缩。 然后将单分子层涂覆在基材上。 由于本发明,现在商业上可行的是连续地向一个区域提供两亲分子的溶液,然后连续地沉积在与前一个区域流动连通的区域中的基底或几个基底上,单分子层 已被压缩并运送到后一个区域。
    • 10. 发明授权
    • Insulated gate type thyristor
    • 绝缘栅型晶闸管
    • US07705368B2
    • 2010-04-27
    • US11706184
    • 2007-02-15
    • Vladimir RodovHidenori Akiyama
    • Vladimir RodovHidenori Akiyama
    • H01L21/332H01L29/74
    • H01L29/0696H01L29/42308H01L29/7455H01L29/749
    • An insulated gate type thyristor includes: a first current terminal semiconductor region of a first conductivity type having a high impurity concentration; a first base semiconductor region of a second conductivity type opposite to the first conductivity type having a low impurity concentration and formed on the first current terminal semiconductor region; a second base semiconductor region of the first conductivity type having a low impurity concentration and formed on the first base semiconductor region; a second current terminal semiconductor region of the second conductivity type having a high impurity concentration and formed on the second base semiconductor region; a trench passing through the second current terminal semiconductor region and entering the second base semiconductor region leaving some depth thereof, along a direction from a surface of the second current terminal semiconductor region toward the first base semiconductor region; and an insulated gate electrode structure formed in the trench.
    • 绝缘栅型晶闸管包括:具有高杂质浓度的第一导电类型的第一电流端子半导体区域; 形成在第一电流端子半导体区域上的具有低杂质浓度的与第一导电类型相反的第二导电类型的第一基极半导体区域; 形成在第一基极半导体区上的具有低杂质浓度的第一导电类型的第二基极半导体区域; 形成在第二基极半导体区域上的具有高杂质浓度的第二导电类型的第二电流端子半导体区域; 穿过所述第二电流端子半导体区域并且沿着从所述第二电流端子半导体区域的表面朝向所述第一基极半导体区域的方向进入所述第二基极半导体区域的沟槽留下其一定深度; 以及形成在沟槽中的绝缘栅电极结构。