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    • 5. 发明授权
    • Method of manufacturing a metal-insulator-metal capacitor using an etchback process
    • 使用回蚀工艺制造金属 - 绝缘体 - 金属电容器的方法
    • US07118958B2
    • 2006-10-10
    • US11071036
    • 2005-03-03
    • Tony T. PhanMartin B. Mollat
    • Tony T. PhanMartin B. Mollat
    • H01L21/8242H01L29/76
    • H01L27/0629H01L28/40
    • The present invention provides a method for manufacturing a metal-insulator-metal (MIM) capacitor, a method for manufacturing an integrated circuit having a metal-insulator-metal (MIM) capacitor, and an integrated circuit having a metal-insulator-metal (MIM) capacitor. The method for manufacturing the metal-insulator-metal (MIM) capacitor, among other steps and without limitation, includes providing a material layer (185) over a substrate (110), and forming a refractory metal layer (210) having a thickness (t1) over the substrate (110), at least a portion of the refractory metal layer (210) extending over the material layer (185). The method further includes reducing the thickness (t2) of the portion of the refractory metal layer (210) extending over the material layer (185), thereby forming a thinned refractory metal layer (310), and reacting the thinned refractory metal layer (310) with at least a portion of the material layer (185) to form an electrode (440) for use in a capacitor.
    • 本发明提供一种金属 - 绝缘体 - 金属(MIM)电容器的制造方法,具有金属 - 绝缘体 - 金属(MIM)电容器的集成电路的制造方法和具有金属 - 绝缘体 - 金属 MIM)电容器。 金属 - 绝缘体 - 金属(MIM)电容器的制造方法以及其它步骤,但不限于此,包括在衬底(110)上方提供材料层(185),并且形成具有厚度的难熔金属层(210) (110)上的至少一部分难熔金属层(210)延伸到材料层(185)上。 该方法还包括减小在材料层(185)上延伸的难熔金属层(210)的部分的厚度(t 2> 2),由此形成变薄的难熔金属层(310),以及 使稀薄的难熔金属层(310)与材料层(185)的至少一部分反应以形成用于电容器的电极(440)。
    • 8. 发明授权
    • System and method for optimizing placement of dopant upon semiconductor
surface
    • 用于优化半导体表面上掺杂剂的放置的系统和方法
    • US5434423A
    • 1995-07-18
    • US253576
    • 1994-06-03
    • Tony T. Phan
    • Tony T. Phan
    • H01J37/02H01J37/317H01L21/265
    • H01J37/3171H01J37/026
    • An improved ion implantation system and method for placing dopant upon and within a semiconductor surface. The ion implantation system is capable of higher beam current by reducing dopant concentration across selected surface areas. Offsetting electrons are also diffused to maintain a lower net ion level at the selected areas. Amount of beam current can be increased according to user requirements to enhance throughput of the implantation process. Diffusion of ions and electrons is achieved by reconfiguring or redesigning an acceleration tube placed subsequent to the ion source. The acceleration tube comprises a plurality of electrodes spaced adjacent each other and extending as a pair of rows. Each row extends from a location proximal to the ion source to a location distal to the ion source. Sourcing a power supply upon a more distally located electrode allows the ions and/or electrons to diffuse outward from their acceleration path at a larger spot size upon the semiconductor surface.
    • 改进的离子注入系统和用于将掺杂剂放置在半导体表面之上和之内的方法。 离子注入系统能够通过减少所选表面积上的掺杂剂浓度来获得更高的束流。 偏移电子也被扩散以在所选区域保持较低的净离子水平。 可以根据用户要求增加射束电流的量,以增加植入过程的吞吐量。 离子和电子的扩散通过重新配置或重新设计放置在离子源之后的加速管实现。 加速管包括彼此相邻间隔并且延伸成一对行的多个电极。 每排从靠近离子源的位置延伸到远离离子源的位置。 在更远端定位的电极上采集电源允许离子和/或电子在半导体表面上以更大的光斑尺寸从其加速路径向外扩散。
    • 9. 发明授权
    • Functional operations for accessing and/or building interlocking trees datastores to enable their use with applications software
    • 用于访问和/或构建互锁树数据存储的功能操作,以使其能够与应用软件一起使用
    • US07593923B1
    • 2009-09-22
    • US10879329
    • 2004-06-29
    • Jane Campbell MazzagattiJane Van Keuren ClaarTony T. Phan
    • Jane Campbell MazzagattiJane Van Keuren ClaarTony T. Phan
    • G06F17/30
    • G06N5/022G06F17/30327Y10S707/99933
    • A set of mechanisms handles communication with a Knowledge Store and its K Engine(s). The Knowledge Store (Kstore) does not need indexes or tables to support it but instead is formed by the construction of interlocking trees of pointers in nodes of the interlocking trees. The K Engine builds and is used to query a KStore by using threads that use software objects together with a K Engine to learn particlized events, thus building the KStore, and these or other software objects can be used to make queries and get answers from the KStore, usually with the help of a K Engine. Under some circumstances, information can be obtained directly from the KStore, but is generally only available through the actions of the K Engine. The mechanisms provide communications pathways for users and applications software to build and/or query the KStore. Both these processes can proceed simultaneously, and in multiple instances. There can be a plurality of engines operating on a KStore essentially simultaneously. Additionally a mechanism for providing triggers allows for automatic reporting of events, conditions and occurrences to users and applications.
    • 一组机制处理与知识库及其K引擎的通信。 知识库(Kstore)不需要索引或表来支持它,而是通过在互锁树的节点中构建指针的互锁树形成。 K引擎构建并用于通过使用与K引擎一起使用软件对象的线程来查询KStore来学习特定事件,从而构建KStore,并且可以使用这些或其他软件对象进行查询并从 KStore,通常在K引擎的帮助下。 在某些情况下,可以直接从KStore获得信息,但通常只能通过K Engine的操作获得。 这些机制为用户和应用软件提供了构建和/或查询KStore的通信路径。 这两个过程可以同时进行,并且在多个情况下。 基本上可以同时在KStore上操作多个引擎。 另外,提供触发器的机制允许自动报告用户和应用程序的事件,状况和事件。
    • 10. 发明授权
    • Device for reducing plasma etch damage and method for manufacturing same
    • 减少等离子体蚀刻损伤的装置及其制造方法
    • US06190518B1
    • 2001-02-20
    • US08095147
    • 1993-07-20
    • Tony T. PhanTom J. GoodwinJohn K. Lowell
    • Tony T. PhanTom J. GoodwinJohn K. Lowell
    • C23C1434
    • H01L21/31116H01J2237/0206
    • An improved sputter etching technique is provided for substantially preventing or reducing plasma etch damages associated with sputter etching. The plasma etch technique can utilize a semiconductor wafer having at least one diode formed within an inactive region of the wafer near the outer periphery of the wafer. The diode is capable of preventing charge transfer or arcing between the grounded anode and the p-channel gate region. By placing a diode within the inactive region of the wafer, problems such as gate oxide breakdown, threshold voltage skew, flat-band voltage skew, etc. can be minimized or substantially reduced. Alternatively, a standard wafer not having an implanted or diffused diode can be utilized to obtain similar beneficial results provided the sputter etch anode is retrofitted to include a diode placed between the anode and the ground terminal. Similar to the diode placed on the wafer, the retrofitted anode is used to provide a depletion region for preventing charge transfer therethrough.
    • 提供了一种改进的溅射蚀刻技术,用于基本上防止或减少与溅射蚀刻相关的等离子体蚀刻损伤。 等离子体蚀刻技术可以利用在晶片的外周附近形成有至少一个二极管的半导体晶片,该二极管形成在晶片的非活动区域内。 二极管能够防止接地阳极和p沟道栅极区域之间的电荷转移或电弧。 通过将二极管放置在晶片的非活性区域内,可以最小化或显着降低诸如栅极氧化物击穿,阈值电压偏移,平带电压偏移等问题。 或者,可以使用不具有注入或扩散二极管的标准晶片来获得类似的有益结果,只要溅射蚀刻阳极被改进以包括置于阳极和接地端子之间的二极管即可。 类似于放置在晶片上的二极管,改进的阳极用于提供用于防止电荷转移通过的耗尽区域。