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    • 1. 发明授权
    • Method of fabricating an integrated semiconductor light modulator and
laser
    • 制造集成半导体光调制器和激光器的方法
    • US5436195A
    • 1995-07-25
    • US292203
    • 1994-08-18
    • Tadashi KimuraYutaka MihashiKatuhiko GotoTakushi Itagaki
    • Tadashi KimuraYutaka MihashiKatuhiko GotoTakushi Itagaki
    • H01L27/15H01S5/00H01S5/026H01S5/10H01S5/20H01L21/20
    • H01S5/0265H01S5/1028H01S5/1032H01S5/2077Y10S117/902
    • In a method of fabricating an integrated semiconductor light modulator and laser device, a semiconductor layer having first and second regions of different crystal compositions is produced on each chip region of a semiconductor wafer by a selective crystal growth using, as a mask, a dielectric film having a prescribed pattern. Thereafter, a semiconductor laser and a light modulator that modulates laser light emitted from the semiconductor layer are produced in a first semiconductor region and a second semiconductor region, respectively, of each chip region. In this method, the shape of the dielectric mask pattern and the shape of the opening of the mask pattern on each chip region is symmetrical with the dielectric mask pattern and opening of an adjacent chip region along the optical waveguide direction of the semiconductor laser. The semiconductor layer is grown on the wafer so that the first and second semiconductor regions of different crystal compositions on each chip region are in contact with semiconductor regions having the same crystal composition of an adjacent chip region. As the result, at opposite edges of the chip region in the optical waveguide direction, the crystal compositions of the first and second semiconductor regions are the same.
    • 在制造集成半导体光调制器和激光器件的方法中,通过选择性晶体生长,在半导体晶片的每个芯片区域上制造具有不同晶体组成的第一和第二区域的半导体层,使用作为掩模的电介质膜 具有规定的图案。 此后,分别在每个芯片区域的第一半导体区域和第二半导体区域中产生调制从半导体层发射的激光的半导体激光器和光调制器。 在该方法中,电介质掩模图案的形状和每个芯片区域上的掩模图案的开口的形状与电介质掩模图案对准,并且沿着半导体激光器的光波导方向打开相邻的芯片区域。 半导体层在晶片上生长,使得在每个芯片区域上具有不同晶体组成的第一和第二半导体区域与具有相邻芯片区域的相同晶体组成的半导体区域接触。 结果,在光波导方向的芯片区域的相对边缘处,第一和第二半导体区域的晶体组成相同。
    • 3. 发明授权
    • Optical semiconductor device with InP
    • 带InP的光学半导体器件
    • US5912475A
    • 1999-06-15
    • US767924
    • 1996-12-17
    • Takushi ItagakiDaisuke SuzukiTatsuya Kimura
    • Takushi ItagakiDaisuke SuzukiTatsuya Kimura
    • G02F1/025H01S5/00H01S5/0625H01L33/00
    • H01S5/06258
    • An optical semiconductor device includes an n-type InP substrate having top and bottom surfaces; a stripe-shaped mesa structure including an n-type cladding layer, a multi quantum well layer, and a p-type first upper cladding layer disposed on the top surface of the substrate; a first layer of a semi-insulating material, an n-type InP hole blocking layer having a carrier concentration equal to or less than 4.times.10.sup.18 cm.sup.-3 and more than 1.times.10.sup.18 cm.sup.-3, and a second layer of the semi-insulating material disposed burying the mesa structure; a second p-type cladding layer and a p-type contact layer disposed on the mesa structure and on the second layer of the semi-insulating material, and p side electrodes spaced from each other in a stripe direction of the mesa structure, disposed on the p-type contact layer; and an n side electrode disposed on the bottom surface of the substrate. Therefore, an optical semiconductor device is available which has superior element isolation characteristics and broad modulation bandwidth, and enables the individual elements to operate with the utmost performance.
    • 光学半导体器件包括具有顶表面和底表面的n型InP衬底; 包括n型包覆层,多量子阱层和设置在衬底的顶表面上的p型第一上包层的条状台面结构; 半绝缘材料的第一层,载流子浓度等于或小于4×10 18 cm -3且大于1×10 18 cm -3的n型InP空穴阻挡层和设置在所述半绝缘材料上的第二层 埋葬台面结构; 设置在半绝缘材料的台面结构和第二层上的第二p型覆层和p型接触层,以及在台面结构的条带方向上彼此隔开的p侧电极,设置在 p型接触层; 以及设置在基板的底面上的n侧电极。 因此,可获得具有优异的元件隔离特性和宽调制带宽的光学半导体器件,并且能够使各个元件以最大的性能进行操作。
    • 10. 发明授权
    • Solar cell with low resistance linear electrode
    • 具有低电阻线性电极的太阳能电池
    • US5328520A
    • 1994-07-12
    • US948441
    • 1992-09-22
    • Takushi Itagaki
    • Takushi Itagaki
    • H01B13/00H01L21/288H01L31/0224H01L31/04H05K3/10H05K3/12H01L31/06
    • H05K3/1241H01L21/288H01L31/022425Y02E10/50
    • A method for producing a linear pattern having a width less than 100 microns and a resistivity of the order of 10.sup.-6 .OMEGA..multidot.cm on a substrate includes maintaining a low melting point metal in its fused state, applying the fused metal to a tip of a drawing head disposed close to or contacting a substrate by capillary action, applying the fused metal to the substrate in a line with a width less than 100 microns while moving the tip of the drawing head relative to the substrate, and cooling and solidifying the linear pattern of fused metal. Therefore, a linear pattern having a width less than 100 microns and a resistivity of the order of 10.sup.-6 .OMEGA..multidot.cm is directly formed on the substrate in a simple process with high efficiency and the production yield is significantly improved.
    • 在基板上制造宽度小于100微米,电阻率为10-6欧米伽×厘米的线性图形的方法包括将熔融金属保持在其熔融状态,将熔融金属施加到 牵引头通过毛细管作用靠近或接触基板,同时使所述熔融金属以宽度小于100微米的直线施加到所述基板上,同时相对于所述基板移动所述拉伸头的尖端,并且冷却和固化所述线性图案 的熔融金属。 因此,以简单的方法,以高效率直接在基板上形成宽度小于100微米,电阻率为10-6欧米亚×厘米的线性图案,并且显着提高了产量。