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1. 发明授权

US08729546B2 Method for manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US08729546B2
公开(公告)日：2014-05-20
申请号：US13557719
申请日：2012-07-25
申请人： Hideomi Suzawa , Shinya Sasagawa , Taiga Muraoka
发明人： Hideomi Suzawa , Shinya Sasagawa , Taiga Muraoka
IPC分类号： H01L29/10 , H01L29/12 , H01L29/04 , H01L31/062 , H01L31/113
CPC分类号： H01L27/1288 , H01L27/1214 , H01L27/1225 , H01L29/7869
摘要： In a method for manufacturing a semiconductor device including a channel-etched inverted-staggered thin film transistor, an oxide semiconductor film and a conductive film are etched using a mask layer formed with the use of a multi-tone mask which is a light-exposure mask through which light is transmitted so as to have a plurality of intensities. The etching step is performed by dry etching in which an etching gas is used.
摘要翻译：在制造包括通道蚀刻反交错薄膜晶体管的半导体器件的方法中，使用使用作为曝光的多色调掩模形成的掩模层来蚀刻氧化物半导体膜和导电膜光透过该掩模以具有多个强度。蚀刻步骤通过使用蚀刻气体的干蚀刻进行。

2. 发明申请

US20120286267A1 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20120286267A1
公开(公告)日：2012-11-15
申请号：US13557719
申请日：2012-07-25
申请人： Hideomi SUZAWA , Shinya SASAGAWA , Taiga MURAOKA
发明人： Hideomi SUZAWA , Shinya SASAGAWA , Taiga MURAOKA
IPC分类号： H01L33/08
CPC分类号： H01L27/1288 , H01L27/1214 , H01L27/1225 , H01L29/7869
摘要： In a method for manufacturing a semiconductor device including a channel-etched inverted-staggered thin film transistor, an oxide semiconductor film and a conductive film are etched using a mask layer formed with the use of a multi-tone mask which is a light-exposure mask through which light is transmitted so as to have a plurality of intensities. The etching step is performed by dry etching in which an etching gas is used.
摘要翻译：在制造包括通道蚀刻反交错薄膜晶体管的半导体器件的方法中，使用使用作为曝光的多色调掩模形成的掩模层来蚀刻氧化物半导体膜和导电膜光透过该掩模以具有多个强度。蚀刻步骤通过使用蚀刻气体的干蚀刻进行。

3. 发明授权

US08242494B2 Method for manufacturing thin film transistor using multi-tone mask 有权
标题翻译：使用多色调掩模制造薄膜晶体管的方法
公开(公告)号：US08242494B2
公开(公告)日：2012-08-14
申请号：US12582082
申请日：2009-10-20
申请人： Hideomi Suzawa , Shinya Sasagawa , Taiga Muraoka , Shunichi Ito , Miyuki Hosoba
发明人： Hideomi Suzawa , Shinya Sasagawa , Taiga Muraoka , Shunichi Ito , Miyuki Hosoba
IPC分类号： H01L29/786
CPC分类号： H01L29/66969 , H01L27/1225 , H01L27/1288 , H01L29/66742 , H01L29/78621 , H01L29/7869
摘要： An object is to manufacture a semiconductor device including an oxide semiconductor at low cost with high productivity in such a manner that a photolithography process is simplified by reducing the number of light-exposure masks. In a method for manufacturing a semiconductor device including a channel-etched inverted-staggered thin film transistor, an oxide semiconductor film and a conductive film are etched using a mask layer formed with the use of a multi-tone mask which is a light-exposure mask through which light is transmitted so as to have a plurality of intensities. In etching steps, a first etching step is performed by wet etching in which an etchant is used, and a second etching step is performed by dry etching in which an etching gas is used.
摘要翻译：目的是以低成本，高生产率制造包括氧化物半导体的半导体器件，使得通过减少曝光掩模的数量来简化光刻工艺。在制造包括通道蚀刻反交错薄膜晶体管的半导体器件的方法中，使用使用作为曝光的多色调掩模形成的掩模层来蚀刻氧化物半导体膜和导电膜光透过该掩模以具有多个强度。在蚀刻步骤中，通过使用蚀刻剂的湿式蚀刻进行第一蚀刻步骤，并且通过使用蚀刻气体的干法蚀刻进行第二蚀刻步骤。

4. 发明申请

US20100105163A1 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20100105163A1
公开(公告)日：2010-04-29
申请号：US12582079
申请日：2009-10-20
申请人： Shunichi ITO , Miyuki HOSOBA , Hideomi SUZAWA , Shinya SASAGAWA , Taiga MURAOKA
发明人： Shunichi ITO , Miyuki HOSOBA , Hideomi SUZAWA , Shinya SASAGAWA , Taiga MURAOKA
IPC分类号： H01L21/336
CPC分类号： H01L29/66969 , H01L27/1214 , H01L27/1225 , H01L27/1288 , H01L29/7869
摘要： An object is to manufacture a semiconductor device including an oxide semiconductor at low cost with high productivity in such a manner that a photolithography process is simplified by reducing the number of light-exposure masks. In a method for manufacturing a semiconductor device including a channel-etched inverted-staggered thin film transistor, an oxide semiconductor film and a conductive film are etched using a mask layer formed with the use of a multi-tone mask which is a light-exposure mask through which light is transmitted so as to have a plurality of intensities. In etching steps, a first etching step is performed by dry etching in which an etching gas is used, and a second etching step is performed by wet etching in which an etchant is used.
摘要翻译：目的是以低成本，高生产率制造包括氧化物半导体的半导体器件，使得通过减少曝光掩模的数量来简化光刻工艺。在制造包括通道蚀刻反交错薄膜晶体管的半导体器件的方法中，使用使用作为曝光的多色调掩模形成的掩模层来蚀刻氧化物半导体膜和导电膜光透过该掩模以具有多个强度。在蚀刻步骤中，通过使用蚀刻气体的干蚀刻进行第一蚀刻步骤，并且通过使用蚀刻剂的湿蚀刻进行第二蚀刻步骤。

5. 发明申请

US20100081253A1 METHOD FOR MANUFACTURING SEMICONDUCTOR SUBSTRATE 有权
标题翻译：制造半导体基板的方法
公开(公告)号：US20100081253A1
公开(公告)日：2010-04-01
申请号：US12564961
申请日：2009-09-23
申请人： Motomu KURATA , Shinya SASAGAWA , Taiga MURAOKA
发明人： Motomu KURATA , Shinya SASAGAWA , Taiga MURAOKA
IPC分类号： H01L21/762
CPC分类号： H01L21/76254
摘要： A step of forming an insulating film over a semiconductor substrate and forming an embrittled region in the semiconductor substrate by irradiating the semiconductor substrate with accelerated ions through the insulating film; a step of disposing a surface of the semiconductor substrate and a surface of a base substrate opposite to each other and bonding the surface of the insulating film to the surface of the base substrate; a step of forming a semiconductor layer over the base substrate with the insulating film interposed therebetween by causing separation along the embrittled region by performing heat treatment after the surface of the insulating film and the surface of the base substrate are bonded to each other; a step of performing etching treatment on the semiconductor layer; a step of irradiating the semiconductor layer subjected to the etching treatment with a laser beam; and a step of irradiating the semiconductor layer irradiated with the laser beam with plasma.
摘要翻译：在半导体衬底上形成绝缘膜并在半导体衬底中形成脆化区域的步骤，通过将半导体衬底通过绝缘膜照射加速离子; 将所述半导体基板的表面和基板的表面相对配置并将所述绝缘膜的表面接合到所述基板的表面的工序; 通过在绝缘膜的表面和基底基板的表面彼此接合之后通过进行热处理沿着脆化区域分离而在绝缘膜上形成半导体层，其中绝缘膜介于其间; 在半导体层上进行蚀刻处理的步骤; 用激光束照射进行了蚀刻处理的半导体层的工序; 以及用等离子体照射用激光束照射的半导体层的步骤。

6. 发明申请

US20120286266A1 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20120286266A1
公开(公告)日：2012-11-15
申请号：US13555579
申请日：2012-07-23
申请人： Hideomi SUZAWA , Shinya SASAGAWA , Taiga MURAOKA , Shunichi ITO , Miyuki HOSOBA
发明人： Hideomi SUZAWA , Shinya SASAGAWA , Taiga MURAOKA , Shunichi ITO , Miyuki HOSOBA
IPC分类号： H01L29/26
CPC分类号： H01L29/66969 , H01L27/1225 , H01L27/1288 , H01L29/66742 , H01L29/78621 , H01L29/7869
摘要： An object is to manufacture a semiconductor device including an oxide semiconductor at low cost with high productivity in such a manner that a photolithography process is simplified by reducing the number of light-exposure masks In a method for manufacturing a semiconductor device including a channel-etched inverted-staggered thin film transistor, an oxide semiconductor film and a conductive film are etched using a mask layer formed with the use of a multi-tone mask which is a light-exposure mask through which light is transmitted so as to have a plurality of intensities. In etching steps, a first etching step is performed by wet etching in which an etchant is used, and a second etching step is performed by dry etching in which an etching gas is used.
摘要翻译：本发明的目的是以低成本，高生产率制造包括氧化物半导体的半导体器件，使得通过减少曝光掩模的数量来简化光刻工艺。在包括通道蚀刻的半导体器件的制造方法中倒置交错薄膜晶体管，氧化物半导体膜和导电膜使用掩模层进行蚀刻，该掩模层使用作为透光的多色调掩模形成，该透光掩模通过该曝光掩模透射，以便具有多个强度在蚀刻步骤中，通过使用蚀刻剂的湿式蚀刻进行第一蚀刻步骤，并且通过使用蚀刻气体的干法蚀刻进行第二蚀刻步骤。

7. 发明授权

US08236635B2 Method for manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US08236635B2
公开(公告)日：2012-08-07
申请号：US12582074
申请日：2009-10-20
申请人： Hideomi Suzawa , Shinya Sasagawa , Taiga Muraoka
发明人： Hideomi Suzawa , Shinya Sasagawa , Taiga Muraoka
IPC分类号： H01L21/00 , H01L21/336 , H01L21/8234 , H01L21/84 , H01L21/20
CPC分类号： H01L27/1288 , H01L27/1214 , H01L27/1225 , H01L29/7869
摘要： In a method for manufacturing a semiconductor device including a channel-etched inverted-staggered thin film transistor, an oxide semiconductor film and a conductive film are etched using a mask layer formed with the use of a multi-tone mask which is a light-exposure mask through which light is transmitted so as to have a plurality of intensities. The etching step is performed by dry etching in which an etching gas is used.
摘要翻译：在制造包括通道蚀刻反交错薄膜晶体管的半导体器件的方法中，使用使用作为曝光的多色调掩模形成的掩模层来蚀刻氧化物半导体膜和导电膜光透过该掩模以具有多个强度。蚀刻步骤通过使用蚀刻气体的干蚀刻进行。

8. 发明授权

US07915075B2 Method for manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US07915075B2
公开(公告)日：2011-03-29
申请号：US12580512
申请日：2009-10-16
申请人： Hideomi Suzawa , Shinya Sasagawa , Taiga Muraoka
发明人： Hideomi Suzawa , Shinya Sasagawa , Taiga Muraoka
IPC分类号： H01L21/00 , H01L21/16
CPC分类号： H01L27/127 , G02F1/134309 , G02F1/136227 , G02F1/167 , G09F21/04 , G09G3/3648 , G09G3/3677 , G09G2300/0408 , G09G2300/0809 , G09G2310/0251 , G09G2310/0286 , G09G2310/08 , G11C19/28 , H01L21/465 , H01L27/1225 , H01L27/124 , H01L27/3262 , H01L29/66969 , H01L29/7869 , H01L29/78696
摘要： An object is to establish a processing technique in manufacture of a semiconductor device in which an oxide semiconductor is used. A gate electrode is formed over a substrate, a gate insulating layer is formed over the gate electrode, an oxide semiconductor layer is formed over the gate insulating layer, the oxide semiconductor layer is processed by wet etching to form an island-shaped oxide semiconductor layer, a conductive layer is formed to cover the island-shaped oxide semiconductor layer, the conductive layer is processed by dry etching to form a source electrode, and a drain electrode and part of the island-shaped oxide semiconductor layer is removed by dry etching to form a recessed portion in the island-shaped oxide semiconductor layer.
摘要翻译：本发明的目的是建立一种其中使用氧化物半导体的半导体器件的制造中的加工技术。在基板上形成栅电极，在栅电极上形成栅极绝缘层，在栅极绝缘层上形成氧化物半导体层，通过湿蚀刻加工氧化物半导体层，形成岛状氧化物半导体层形成导电层以覆盖岛状氧化物半导体层，通过干蚀刻处理导电层以形成源电极，并且通过干蚀刻除去漏电极和岛状氧化物半导体层的一部分，在岛状氧化物半导体层中形成凹部。

9. 发明申请

US20100102315A1 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20100102315A1
公开(公告)日：2010-04-29
申请号：US12582082
申请日：2009-10-20
申请人： Hideomi Suzawa , Shinya Sasagawa , Taiga Muraoka , Shunichi Ito , Miyuki Hosoba
发明人： Hideomi Suzawa , Shinya Sasagawa , Taiga Muraoka , Shunichi Ito , Miyuki Hosoba
IPC分类号： H01L29/786
CPC分类号： H01L29/66969 , H01L27/1225 , H01L27/1288 , H01L29/66742 , H01L29/78621 , H01L29/7869
摘要： An object is to manufacture a semiconductor device including an oxide semiconductor at low cost with high productivity in such a manner that a photolithography process is simplified by reducing the number of light-exposure masks. In a method for manufacturing a semiconductor device including a channel-etched inverted-staggered thin film transistor, an oxide semiconductor film and a conductive film are etched using a mask layer formed with the use of a multi-tone mask which is a light-exposure mask through which light is transmitted so as to have a plurality of intensities. In etching steps, a first etching step is performed by wet etching in which an etchant is used, and a second etching step is performed by dry etching in which an etching gas is used.
摘要翻译：目的是以低成本，高生产率制造包括氧化物半导体的半导体器件，使得通过减少曝光掩模的数量来简化光刻工艺。在制造包括通道蚀刻反交错薄膜晶体管的半导体器件的方法中，使用使用作为曝光的多色调掩模形成的掩模层来蚀刻氧化物半导体膜和导电膜光透过该掩模以具有多个强度。在蚀刻步骤中，通过使用蚀刻剂的湿式蚀刻进行第一蚀刻步骤，并且通过使用蚀刻气体的干法蚀刻进行第二蚀刻步骤。

10. 发明授权

US08912040B2 Method for manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US08912040B2
公开(公告)日：2014-12-16
申请号：US13012987
申请日：2011-01-25
申请人： Hideomi Suzawa , Shinya Sasagawa , Taiga Muraoka
发明人： Hideomi Suzawa , Shinya Sasagawa , Taiga Muraoka
IPC分类号： H01L21/00 , H01L21/16 , H01L29/786 , H01L27/12
CPC分类号： H01L27/127 , G02F1/134309 , G02F1/136227 , G02F1/167 , G09F21/04 , G09G3/3648 , G09G3/3677 , G09G2300/0408 , G09G2300/0809 , G09G2310/0251 , G09G2310/0286 , G09G2310/08 , G11C19/28 , H01L21/465 , H01L27/1225 , H01L27/124 , H01L27/3262 , H01L29/66969 , H01L29/7869 , H01L29/78696
摘要： An object is to establish a processing technique in manufacture of a semiconductor device in which an oxide semiconductor is used. A gate electrode is formed over a substrate, a gate insulating layer is formed over the gate electrode, an oxide semiconductor layer is formed over the gate insulating layer, the oxide semiconductor layer is processed by wet etching to form an island-shaped oxide semiconductor layer, a conductive layer is formed to cover the island-shaped oxide semiconductor layer, the conductive layer is processed by dry etching to form a source electrode, and a drain electrode and part of the island-shaped oxide semiconductor layer is removed by dry etching to form a recessed portion in the island-shaped oxide semiconductor layer.
摘要翻译：本发明的目的是建立一种其中使用氧化物半导体的半导体器件的制造中的加工技术。在基板上形成栅电极，在栅电极上形成栅极绝缘层，在栅极绝缘层上形成氧化物半导体层，通过湿蚀刻加工氧化物半导体层，形成岛状氧化物半导体层形成导电层以覆盖岛状氧化物半导体层，通过干蚀刻处理导电层以形成源电极，并且通过干蚀刻除去漏电极和岛状氧化物半导体层的一部分，在岛状氧化物半导体层中形成凹部。

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