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1. 发明授权

US08828844B2 Manufacturing method of SOI substrate 有权
标题翻译： SOI衬底的制造方法
公开(公告)号：US08828844B2
公开(公告)日：2014-09-09
申请号：US12247487
申请日：2008-10-08
申请人： Hideto Ohnuma , Tetsuya Kakehata , Akihisa Shimomura , Shinya Sasagawa , Motomu Kurata
发明人： Hideto Ohnuma , Tetsuya Kakehata , Akihisa Shimomura , Shinya Sasagawa , Motomu Kurata
IPC分类号： H01L21/46 , H01L21/268 , H01L21/3065 , H01L21/84 , H01L21/02 , H01L21/302 , H01L21/762
CPC分类号： H01L21/76254 , H01L21/02532 , H01L21/02686 , H01L21/268 , H01L21/302 , H01L21/3065 , H01L21/84
摘要： A damaged region is formed by generation of plasma by excitation of a source gas, and by addition of ion species contained in the plasma from one of surfaces of a single crystal semiconductor substrate; an insulating layer is formed over the other surface of the single crystal semiconductor substrate; a supporting substrate is firmly attached to the single crystal semiconductor substrate so as to face the single crystal semiconductor substrate with the insulating layer interposed therebetween; separation is performed at the damaged region into the supporting substrate to which a single crystal semiconductor layer is attached and part of the single crystal semiconductor substrate by heating of the single crystal semiconductor substrate; dry etching is performed on a surface of the single crystal semiconductor layer attached to the supporting substrate; the single crystal semiconductor layer is recrystallized by irradiation of the single crystal semiconductor layer with a laser beam to melt at least part of the single crystal semiconductor layer.
摘要翻译：通过源气体的激发产生等离子体并通过从单晶半导体衬底的表面之一添加包含在等离子体中的离子种类而形成损伤区域; 在单晶半导体衬底的另一个表面上形成绝缘层; 支撑衬底牢固地附接到单晶半导体衬底，以便在其间插入绝缘层的单晶半导体衬底; 通过加热单晶半导体衬底，在损伤区域处分离成与单晶半导体层相连的支撑衬底和部分单晶半导体衬底; 在附着于支撑基板的单晶半导体层的表面进行干蚀刻，通过用激光束照射单晶半导体层来使单晶半导体层重结晶，从而熔化至少一部分单晶半导体层。

2. 发明授权

US08501564B2 Semiconductor element, semiconductor device, and method for manufacturing the same 有权
公开(公告)号：US08501564B2
公开(公告)日：2013-08-06
申请号：US12956624
申请日：2010-11-30
申请人： Hideomi Suzawa , Motomu Kurata , Mayumi Mikami
发明人： Hideomi Suzawa , Motomu Kurata , Mayumi Mikami
IPC分类号： H01L21/336 , H01L29/788
CPC分类号： H01L29/7869 , H01L27/108 , H01L27/1225 , H01L29/12 , H01L29/41733 , H01L29/42384 , H01L29/66969 , H01L29/78648 , H01L29/78696 , H01L2029/42388
摘要： The semiconductor element includes an oxide semiconductor layer on an insulating surface; a source electrode layer and a drain electrode layer over the oxide semiconductor layer; a gate insulating layer over the oxide semiconductor layer, the source electrode layer, and the drain electrode layer; and a gate electrode layer over the gate insulating layer. The source electrode layer and the drain electrode layer have sidewalls which are in contact with a top surface of the oxide semiconductor layer.

3. 发明授权

US08383487B2 Method for manufacturing SOI substrate 有权
标题翻译：制造SOI衬底的方法
公开(公告)号：US08383487B2
公开(公告)日：2013-02-26
申请号：US13198171
申请日：2011-08-04
申请人： Hideomi Suzawa , Shinya Sasagawa , Akihisa Shimomura , Junpei Momo , Motomu Kurata , Taiga Muraoka , Kosei Nei
发明人： Hideomi Suzawa , Shinya Sasagawa , Akihisa Shimomura , Junpei Momo , Motomu Kurata , Taiga Muraoka , Kosei Nei
IPC分类号： H01L21/76
CPC分类号： H01L21/76254
摘要： Forming an insulating film on a surface of the single crystal semiconductor substrate, forming a fragile region in the single crystal semiconductor substrate by irradiating the single crystal semiconductor substrate with an ion beam through the insulating film, forming a bonding layer over the insulating film, bonding a supporting substrate to the single crystal semiconductor substrate by interposing the bonding layer between the supporting substrate and the single crystal semiconductor substrate, dividing the single crystal semiconductor substrate at the fragile region to separate the single crystal semiconductor substrate into a single crystal semiconductor layer attached to the supporting substrate, performing first dry etching treatment on a part of the fragile region remaining on the single crystal semiconductor layer, performing second dry etching treatment on a surface of the single crystal semiconductor layer subjected to the first etching treatment, and irradiating the single crystal semiconductor layer with laser light.
摘要翻译：在单晶半导体基板的表面上形成绝缘膜，在单晶半导体基板中通过用离子束照射单晶半导体基板通过绝缘膜形成脆性区域，在绝缘膜上形成接合层，通过将支撑基板和单晶半导体基板之间的接合层插入到单晶半导体基板的支撑基板上，将单晶半导体基板分割为脆性区域，将单晶半导体基板分离成单晶半导体层，所述支撑基板对残留在所述单晶半导体层上的所述易碎区域的一部分进行第一干蚀刻处理，对经过所述第一蚀刻处理的所述单晶半导体层的表面进行第二干蚀刻处理，具有激光的晶体半导体层。

4. 发明申请

US20130001571A1 DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：显示装置及其制造方法
公开(公告)号：US20130001571A1
公开(公告)日：2013-01-03
申请号：US13615805
申请日：2012-09-14
申请人： Shunpei YAMAZAKI , Satoshi MURAKAMI , Motomu KURATA , Hiroyuki HATA , Mitsuhiro ICHIJO , Takashi OHTSUKI , Aya ANZAI , Masayuki SAKAKURA
发明人： Shunpei YAMAZAKI , Satoshi MURAKAMI , Motomu KURATA , Hiroyuki HATA , Mitsuhiro ICHIJO , Takashi OHTSUKI , Aya ANZAI , Masayuki SAKAKURA
IPC分类号： H01L33/08
CPC分类号： H04N5/655 , G06F3/02 , H01L27/12 , H01L27/1214 , H01L27/1222 , H01L27/124 , H01L27/1248 , H01L27/3244 , H01L27/3258 , H01L27/3276 , H01L33/60 , H01L51/0005 , H01L51/5246 , H01L51/56 , H01L2224/4847 , H01L2227/323 , H01L2251/5323 , H04N5/642
摘要： The present invention provides a method for manufacturing a highly reliable display device at a low cost with high yield. According to the present invention, a step due to an opening in a contact is covered with an insulating layer to reduce the step, and is processed into a gentle shape. A wiring or the like is formed to be in contact with the insulating layer and thus the coverage of the wiring or the like is enhanced. In addition, deterioration of a light-emitting element due to contaminants such as water can be prevented by sealing a layer including an organic material that has water permeability in a display device with a sealing material. Since the sealing material is formed in a portion of a driver circuit region in the display device, the frame margin of the display device can be narrowed.
摘要翻译：本发明提供了一种以高成本低成本制造高度可靠的显示装置的方法。根据本发明，由绝缘层覆盖由于接触开口而产生的台阶，以减小台阶，并且被加工成平缓的形状。布线等形成为与绝缘层接触，从而增强布线等的覆盖。此外，通过用包封材料密封包括显示装置中具有透水性的有机材料的层，可以防止由诸如水等污染物引起的发光元件的劣化。由于密封材料形成在显示装置的驱动电路区域的一部分中，所以显示装置的边框可以变窄。

5. 发明申请

US20120193625A1 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE 有权
标题翻译：制造半导体器件和半导体器件的方法
公开(公告)号：US20120193625A1
公开(公告)日：2012-08-02
申请号：US13357902
申请日：2012-01-25
申请人： Shinya SASAGAWA , Motomu KURATA
发明人： Shinya SASAGAWA , Motomu KURATA
IPC分类号： H01L29/786 , H01L21/336
CPC分类号： H01L29/66969 , H01L21/441 , H01L29/41733 , H01L29/7869
摘要： An object is to provide a semiconductor device in which defects are reduced and miniaturization is achieved while favorable characteristics are maintained. A semiconductor layer is formed; a first conductive layer is formed over the semiconductor layer; the first conductive layer is etched with use of a first resist mask to form a second conductive layer having a recessed portion; the first resist mask is reduced in size to form a second resist mask; the second conductive layer is etched with use of the second resist mask to form source and drain electrodes each having a projecting portion with a tapered shape at the peripheries; a gate insulating layer is formed over the source and drain electrodes to be in contact with part of the semiconductor layer; and a gate electrode is formed in a portion over the gate insulating layer and overlapping with the semiconductor layer.
摘要翻译：本发明的目的是提供一种在保持有利特性的同时减小缺陷并实现小型化的半导体器件。形成半导体层; 在半导体层上形成第一导电层; 使用第一抗蚀剂掩模蚀刻第一导电层以形成具有凹部的第二导电层; 第一抗蚀剂掩模的尺寸减小以形成第二抗蚀剂掩模; 使用第二抗蚀剂掩模蚀刻第二导电层，以形成在周边具有锥形形状的突出部分的源极和漏极; 在源极和漏极上形成栅极绝缘层以与半导体层的一部分接触; 并且栅极电极形成在栅极绝缘层上方并与半导体层重叠的部分。

6. 发明授权

US08217396B2 Display device comprising electrode layer contacting wiring in the connection region and extending to pixel region 有权
标题翻译：显示装置包括在连接区域中的电极层接触布线并延伸到像素区域的显示装置
公开(公告)号：US08217396B2
公开(公告)日：2012-07-10
申请号：US11184086
申请日：2005-07-19
申请人： Shunpei Yamazaki , Satoshi Murakami , Motomu Kurata , Hiroyuki Hata , Mitsuhiro Ichijo , Takashi Ohtsuki , Aya Anzai , Masayuki Sakakura
发明人： Shunpei Yamazaki , Satoshi Murakami , Motomu Kurata , Hiroyuki Hata , Mitsuhiro Ichijo , Takashi Ohtsuki , Aya Anzai , Masayuki Sakakura
IPC分类号： H01L27/12 , H01L27/32
CPC分类号： H04N5/655 , G06F3/02 , H01L27/12 , H01L27/1214 , H01L27/1222 , H01L27/124 , H01L27/1248 , H01L27/3244 , H01L27/3258 , H01L27/3276 , H01L33/60 , H01L51/0005 , H01L51/5246 , H01L51/56 , H01L2224/4847 , H01L2227/323 , H01L2251/5323 , H04N5/642
摘要： The present invention provides a method for manufacturing a highly reliable display device at a low cost with high yield. According to the present invention, a step due to an opening in a contact is covered with an insulating layer to reduce the step, and is processed into a gentle shape. A wiring or the like is formed to be in contact with the insulating layer and thus the coverage of the wiring or the like is enhanced. In addition, deterioration of a light-emitting element due to contaminants such as water can be prevented by sealing a layer including an organic material that has water permeability in a display device with a sealing material. Since the sealing material is formed in a portion of a driver circuit region in the display device, the frame margin of the display device can be narrowed.
摘要翻译：本发明提供了一种以高成本低成本制造高度可靠的显示装置的方法。根据本发明，由绝缘层覆盖由于接触开口而产生的台阶，以减小台阶，并且被加工成平缓的形状。布线等形成为与绝缘层接触，从而增强布线等的覆盖。此外，通过用包封材料密封包括显示装置中具有透水性的有机材料的层，可以防止由诸如水等污染物引起的发光元件的劣化。由于密封材料形成在显示装置的驱动电路区域的一部分中，所以显示装置的边框可以变窄。

7. 发明申请

US20110147745A1 THIN FILM TRANSISTOR AND MANUFACTURING METHOD THEREOF 有权
标题翻译：薄膜晶体管及其制造方法
公开(公告)号：US20110147745A1
公开(公告)日：2011-06-23
申请号：US12973123
申请日：2010-12-20
申请人： Shinya SASAGAWA , Akihiro ISHIZUKA , Shinobu FURUKAWA , Motomu KURATA
发明人： Shinya SASAGAWA , Akihiro ISHIZUKA , Shinobu FURUKAWA , Motomu KURATA
IPC分类号： H01L29/12 , H01L21/20
CPC分类号： H01L29/66765 , H01L29/78669 , H01L29/78678 , H01L29/78696
摘要： An embodiment is a thin film transistor which includes a gate electrode layer, a gate insulating layer provided so as to cover the gate electrode layer; a first semiconductor layer entirely overlapped with the gate electrode layer; a second semiconductor layer provided over and in contact with the first semiconductor layer and having a lower carrier mobility than the first semiconductor layer; an impurity semiconductor layer provided in contact with the second semiconductor layer; a sidewall insulating layer provided so as to cover at least a sidewall of the first semiconductor layer; and a source and drain electrode layers provided in contact with at least the impurity semiconductor layer. The second semiconductor layer may consist of parts which are apart from each other over the first semiconductor layer.
摘要翻译：一个实施例是一种薄膜晶体管，其包括栅极电极层，设置为覆盖栅极电极层的栅极绝缘层; 与栅电极层完全重叠的第一半导体层; 第二半导体层，设置在第一半导体层上并与第一半导体层接触，并具有比第一半导体层低的载流子迁移率; 设置成与所述第二半导体层接触的杂质半导体层; 侧壁绝缘层，设置成覆盖所述第一半导体层的至少一个侧壁; 以及与至少所述杂质半导体层接触地设置的源极和漏极电极层。第二半导体层可以由在第一半导体层上彼此分开的部分组成。

8. 发明申请

US20110133177A1 Semiconductor Element, Semiconductor Device, And Method For Manufacturing The Same 有权
标题翻译：半导体元件，半导体器件及其制造方法
公开(公告)号：US20110133177A1
公开(公告)日：2011-06-09
申请号：US12956624
申请日：2010-11-30
申请人： Hideomi Suzawa , Motomu Kurata , Mayumi Mikami
发明人： Hideomi Suzawa , Motomu Kurata , Mayumi Mikami
IPC分类号： H01L29/786 , H01L21/336 , H01L21/44
CPC分类号： H01L29/7869 , H01L27/108 , H01L27/1225 , H01L29/12 , H01L29/41733 , H01L29/42384 , H01L29/66969 , H01L29/78648 , H01L29/78696 , H01L2029/42388
摘要： The semiconductor element includes an oxide semiconductor layer on an insulating surface; a source electrode layer and a drain electrode layer over the oxide semiconductor layer; a gate insulating layer over the oxide semiconductor layer, the source electrode layer, and the drain electrode layer; and a gate electrode layer over the gate insulating layer. The source electrode layer and the drain electrode layer have sidewalls which are in contact with a top surface of the oxide semiconductor layer.
摘要翻译：半导体元件在绝缘表面上包括氧化物半导体层; 氧化物半导体层上的源电极层和漏电极层; 氧化物半导体层上的栅极绝缘层，源极电极层和漏极电极层; 以及栅极绝缘层上的栅极电极层。源电极层和漏电极层具有与氧化物半导体层的顶表面接触的侧壁。

9. 发明申请

US20090239354A1 METHOD FOR MANUFACTURING SOI SUBSTRATE 有权
标题翻译：制造SOI衬底的方法
公开(公告)号：US20090239354A1
公开(公告)日：2009-09-24
申请号：US12399047
申请日：2009-03-06
申请人： Hideomi SUZAWA , Shinya SASAGAWA , Akihisa SHIMOMURA , Junpei MOMO , Motomu KURATA , Taiga MURAOKA , Kosei NEI
发明人： Hideomi SUZAWA , Shinya SASAGAWA , Akihisa SHIMOMURA , Junpei MOMO , Motomu KURATA , Taiga MURAOKA , Kosei NEI
IPC分类号： H01L21/762
CPC分类号： H01L21/76254
摘要： Forming an insulating film on a surface of the single crystal semiconductor substrate, forming a fragile region in the single crystal semiconductor substrate by irradiating the single crystal semiconductor substrate with an ion beam through the insulating film, forming a bonding layer over the insulating film, bonding a supporting substrate to the single crystal semiconductor substrate by interposing the bonding layer between the supporting substrate and the single crystal semiconductor substrate, dividing the single crystal semiconductor substrate at the fragile region to separate the single crystal semiconductor substrate into a single crystal semiconductor layer attached to the supporting substrate, performing first dry etching treatment on a part of the fragile region remaining on the single crystal semiconductor layer, performing second dry etching treatment on a surface of the single crystal semiconductor layer subjected to the first etching treatment, and irradiating the single crystal semiconductor layer with laser light.
摘要翻译：在单晶半导体基板的表面上形成绝缘膜，在单晶半导体基板中通过用离子束照射单晶半导体基板通过绝缘膜形成脆性区域，在绝缘膜上形成接合层，通过将支撑基板和单晶半导体基板之间的接合层插入到单晶半导体基板的支撑基板上，将单晶半导体基板分割为脆性区域，将单晶半导体基板分离成单晶半导体层，所述支撑基板对残留在所述单晶半导体层上的所述脆性区域的一部分进行第一干蚀刻处理，对经过所述第一蚀刻处理的所述单晶半导体层的表面进行第二干蚀刻处理，具有激光的晶体半导体层。

10. 发明授权

US08987727B2 Method for manufacturing semiconductor device and semiconductor device 有权
标题翻译：半导体器件和半导体器件的制造方法
公开(公告)号：US08987727B2
公开(公告)日：2015-03-24
申请号：US13357902
申请日：2012-01-25
申请人： Shinya Sasagawa , Motomu Kurata
发明人： Shinya Sasagawa , Motomu Kurata
IPC分类号： H01L29/786 , H01L21/34 , H01L29/417
CPC分类号： H01L29/66969 , H01L21/441 , H01L29/41733 , H01L29/7869
摘要： An object is to provide a semiconductor device in which defects are reduced and miniaturization is achieved while favorable characteristics are maintained. A semiconductor layer is formed; a first conductive layer is formed over the semiconductor layer; the first conductive layer is etched with use of a first resist mask to form a second conductive layer having a recessed portion; the first resist mask is reduced in size to form a second resist mask; the second conductive layer is etched with use of the second resist mask to form source and drain electrodes each having a projecting portion with a tapered shape at the peripheries; a gate insulating layer is formed over the source and drain electrodes to be in contact with part of the semiconductor layer; and a gate electrode is formed in a portion over the gate insulating layer and overlapping with the semiconductor layer.
摘要翻译：本发明的目的是提供一种在保持有利特性的同时减小缺陷并实现小型化的半导体器件。形成半导体层; 在半导体层上形成第一导电层; 使用第一抗蚀剂掩模蚀刻第一导电层以形成具有凹部的第二导电层; 第一抗蚀剂掩模的尺寸减小以形成第二抗蚀剂掩模; 使用第二抗蚀剂掩模蚀刻第二导电层，以形成在周边具有锥形形状的突出部分的源极和漏极; 在源极和漏极上形成栅极绝缘层以与半导体层的一部分接触; 并且栅极电极形成在栅极绝缘层上方并与半导体层重叠的部分。

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