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1. 发明申请

US20210212388A1 Tool and Method for Securing a Pocket Square 有权
公开(公告)号：US20210212388A1
公开(公告)日：2021-07-15
申请号：US16069786
申请日：2018-03-15
申请人： Tae H. Kim
发明人： Tae H. Kim
IPC分类号： A41B15/02 , A45F5/04
摘要： A pocket square tool comprises a pliable outer rod in a closed loop, having a substantially straight horizontal top edge and a curved U-shaped bottom edge, and a substantially straight pliable horizontal intermediate rod extending a horizontal distance between a left edge of the outer rod and a right edge of the outer rod and parallel to the top edge of the outer rod. The pocket square tool is adjustable in size. There are two intermediate rods parallel to each other. Other embodiments may have additional intermediate rods. The intermediate rods can be coupled to the outer rod or formed integral to it. Various methods of securing a pocket square use the tool.

2. 发明申请

US20130185685A1 TIMING ANALYSIS OF AN ARRAY CIRCUIT CROSS SECTION 失效
标题翻译：阵列电路交叉部分的时序分析
公开(公告)号：US20130185685A1
公开(公告)日：2013-07-18
申请号：US13349325
申请日：2012-01-12
申请人： Shyamkumar Thoziyoor , Tae H. Kim , Sang Y. Lee
发明人： Shyamkumar Thoziyoor , Tae H. Kim , Sang Y. Lee
IPC分类号： G06F17/50
CPC分类号： G06F17/5031 , G06F2217/84
摘要： A method, system or computer usable program product for performing timing analysis on an array circuit including receiving in memory a set of pins to be timed, selecting with a data processor a cross section of the array circuit including the set of pins wherein a backtrace is performed from the set of pins to identify a set of bus groups, each bus group having a plurality of timing pins, and assigning timing for an assigned pin of a first bus group equal to timing calculated for a surrogate pin of the first bus group based on array circuit regularity.
摘要翻译：一种用于对阵列电路进行定时分析的方法，系统或计算机可用程序产品，包括在存储器中接收要定时的一组引脚，用数据处理器选择包括所述一组引脚的阵列电路的横截面，其中回溯是从所述一组引脚执行以识别一组总线组，每个总线组具有多个定时引脚，以及为第一总线组的分配引脚分配等于基于第一总线组的替代引脚的定时的定时阵列电路规律性。

3. 发明授权

US08202970B1 Method for improving the bioavailability of polysaccharides in lignocellulosic materials 有权
标题翻译：提高木质纤维素材料中多糖生物利用度的方法
公开(公告)号：US08202970B1
公开(公告)日：2012-06-19
申请号：US12194821
申请日：2008-08-20
申请人： Nhuan P. Nghiem , Tae H. Kim , Kevin B. Hicks
发明人： Nhuan P. Nghiem , Tae H. Kim , Kevin B. Hicks
IPC分类号： C07G1/00 , C08H7/00 , C08L97/00 , C12P7/06 , C12P7/08 , C12P7/10
CPC分类号： C12P7/10 , C07G1/00 , C08B37/0003 , C08B37/0057 , C08H8/00 , C12P2201/00 , Y02E50/16 , Y02E50/17
摘要： A method for improving the bioavailability of polysaccharides in lignocellulosic materials, involving reacting lignocellulosic materials with ammonia and ethanol.
摘要翻译：提高木质纤维素材料中多糖的生物利用度的方法，包括使木质纤维素材料与氨和乙醇反应。

4. 发明授权

US07417916B2 Methods of reducing coupling noise between wordlines 有权
标题翻译：减少字母之间的耦合噪声的方法
公开(公告)号：US07417916B2
公开(公告)日：2008-08-26
申请号：US11497126
申请日：2006-08-01
申请人： Tae H. Kim , Charles L. Ingalls , Howard C. Kirsch , Jeremy J. Gum
发明人： Tae H. Kim , Charles L. Ingalls , Howard C. Kirsch , Jeremy J. Gum
IPC分类号： G11C8/00 , G11C16/06 , G11C5/06
CPC分类号： G11C8/08
摘要： Memory devices configured to reduce coupling noise between adjacent wordlines in a memory array. More specifically, wordline drivers are interleaved such that adjacent wordlines are driven by wordline drivers enabled by different row decoders. Each wordline driver includes a weak transistor to ground and a strong transistor to ground. By disabling the wordline driver on the wordlines directly adjacent to the active wordlines, a path is provided to drive the coupling noise from the active wordline to ground through the strong transistor.
摘要翻译：配置为减少存储器阵列中相邻字线之间的耦合噪声的存储器件。更具体地说，字线驱动器被交错，使得相邻字线由不同行解码器启用的字线驱动器驱动。每个字线驱动器包括一个微弱的晶体管接地和一个强大的晶体管接地。通过禁用与有源字线直接相邻的字线上的字线驱动器，提供一个路径，以通过强晶体管驱动从有源字线到地的耦合噪声。

5. 发明授权

US07110319B2 Memory devices having reduced coupling noise between wordlines 有权
公开(公告)号：US07110319B2
公开(公告)日：2006-09-19
申请号：US10928034
申请日：2004-08-27
申请人： Tae H. Kim , Charles L. Ingalls , Howard C. Kirsch , Jeremy J. Gum
发明人： Tae H. Kim , Charles L. Ingalls , Howard C. Kirsch , Jeremy J. Gum
IPC分类号： G11C8/00
CPC分类号： G11C8/08
摘要： Memory devices configured to reduce coupling noise between adjacent wordlines in a memory array. More specifically, wordline drivers are interleaved such that adjacent wordlines are driven by wordline drivers enabled by different row decoders. Each wordline driver includes a weak transistor to ground and a strong transistor to ground. By disabling the wordline driver on the wordlines directly adjacent to the active wordlines, a path is provided to drive the coupling noise from the active wordline to ground through the strong transistor.

6. 发明授权

US07034572B2 Voltage level shifting circuit and method 失效
标题翻译：电压电平移位电路及方法
公开(公告)号：US07034572B2
公开(公告)日：2006-04-25
申请号：US10868468
申请日：2004-06-14
申请人： Tae H. Kim , Howard C. Kirsch
发明人： Tae H. Kim , Howard C. Kirsch
IPC分类号： H03K19/094 , H03K19/0175
CPC分类号： H03K3/356113 , H03K3/356165
摘要： A voltage level shifting circuit and method that can be used for shifting the voltage level of an input signal to provide an output signal having a higher output voltage level. The voltage level shifting circuit includes pull-up transistors that are switched OFF by the voltage of a pair of switching nodes and not the voltage at the output node. The speed at which the pull-up transistors can be switched OFF is decoupled to some extent from the speed at which the voltage at the output node changes. Additionally, having the output node separated from the nodes that switch the pull-up transistors OFF further allows for dimensions of the various transistors of the voltage level shifting circuit to be scaled advantageously.
摘要翻译：一种电压电平移动电路和方法，可用于移位输入信号的电压电平以提供具有较高输出电压电平的输出信号。电压电平移位电路包括被一对开关节点的电压切断的上拉晶体管，而不是输出节点处的电压。上拉晶体管可以关断的速度在一定程度上与输出节点处的电压变化的速度解耦。另外，将输出节点与将上拉晶体管断开的节点分开的输出节点进一步允许电压电平移位电路的各种晶体管的尺寸被有利地缩放。

7. 发明授权

US5070179A Water-soluble copolymerized polyester resin composition 失效
标题翻译：水溶性共聚聚酯树脂组合物
公开(公告)号：US5070179A
公开(公告)日：1991-12-03
申请号：US653963
申请日：1991-02-12
申请人： Kwang T. Kim , Tae H. Kim , Young S. Kim
发明人： Kwang T. Kim , Tae H. Kim , Young S. Kim
IPC分类号： C08G63/66 , C08G63/181 , C08G63/46 , C08G63/672 , C08G63/68 , C08G63/688 , C08G63/695 , C08L67/00 , C08L67/02 , C09D167/02
CPC分类号： C08G63/672 , C08G63/68
摘要： The present invention relates to water-soluble copolymerized polyester resin suitable to produce a polyester film having a good adhesion and surface properties.That is, the composition of the present invention comprise 50.about.85 mol % of aromatic dicarbonic acid, 0.5.about.25 mol % of aromatic dicarbonic acid containing sulfonic acid alkali metallic base and 0.5.about.25 mol % of dicarbonic acid containing silane system represented by the following formula (I) in the total dicorbonic acid components, wherein the glycol components contained in the composition comprising more than 60 mol % of aliphatic or alicyclic glycol and 1.about.40 mol % of diethylene glycol or triethylene glycol. ##STR1## wherein R.sub.1 is aliphatic hydrocarbon group of 1 to 15 carbon atoms, R.sub.2 is aliphatic hydrocarbon group of 1 to 4 carbon atoms.
摘要翻译：本发明涉及适于生产具有良好粘附性和表面性能的聚酯薄膜的水溶性共聚聚酯树脂。也就是说，本发明的组合物包含50％的芳族二羧酸85摩尔％，含有20摩尔％的含有磺酸碱金属碱的芳族二碳酸的0.5分子和含有25摩尔％的含二羧酸的硅烷体系的0.5分子在总二氯碳酸组分中的下式（I）表示，其中所述组合物中所含的二醇组分包含超过60摩尔％的脂族或脂环族二醇和1分子量40摩尔％的二甘醇或三甘醇。（I）其中R 1为1至15个碳原子的脂族烃基，R 2为1至4个碳原子的脂族烃基。

8. 发明授权

US09096203B2 Brake master cylinder 有权
标题翻译：制动主缸
公开(公告)号：US09096203B2
公开(公告)日：2015-08-04
申请号：US13620678
申请日：2012-09-14
申请人： Tae H. Kim
发明人： Tae H. Kim
IPC分类号： B60T11/16 , B60T7/04 , B60T7/08 , B60T17/22
CPC分类号： B60T11/16 , B60T7/042 , B60T7/085 , B60T17/22
摘要： Disclosed is a brake master cylinder configured to sense a variation in magnetic flux in accordance with operation of a piston installed with a magnet, and thus to control activation of brake lamps. The brake master cylinder includes a cylinder body connected to a booster, first and second pistons to reciprocate in the cylinder body, a Hall sensor installed at an outside of the cylinder body, to sense operation of the pistons, for control of activation of brake lamps, a coupling shaft formed at an end of the second piston facing the first piston, and a magnet ring assembly installed at the coupling shaft such that the magnet ring assembly faces the Hall sensor. The magnet ring assembly includes a bushing centrally formed with a fitting hole to receive the coupling shaft, and a ring-shaped magnet fitted around the bushing, to exert magnetic force on the Hall sensor.
摘要翻译：公开了一种制动主缸，其被配置为根据安装有磁体的活塞的操作来感测磁通量的变化，从而控制制动灯的启动。制动主缸包括连接到升压器的缸体，在缸体中往复运动的第一和第二活塞，安装在缸体外部的霍尔传感器，以感测活塞的运动，以控制制动灯的启动，形成在所述第二活塞的面向所述第一活塞的端部处的联接轴以及安装在所述联接轴处的磁环组件，使得所述磁环组件面向所述霍尔传感器。磁环组件包括中心形成有用于接收联接轴的装配孔和围绕衬套安装的环形磁体的衬套，以在霍尔传感器上施加磁力。

9. 发明授权

US08488329B2 Power and ground vias for power distribution systems 有权
标题翻译：配电系统的电源和接地通孔
公开(公告)号：US08488329B2
公开(公告)日：2013-07-16
申请号：US12776888
申请日：2010-05-10
申请人： Tae H. Kim , Sang Y. Lee , Nam H. Pham
发明人： Tae H. Kim , Sang Y. Lee , Nam H. Pham
IPC分类号： H05K7/00 , H05K1/11
CPC分类号： H05K3/40 , H01L2224/16225 , H01L2924/19105 , H05K1/0265 , H05K1/115 , H05K2201/09854 , Y10T29/49155 , Y10T29/49165
摘要： A system for providing power and ground vias for power distributions systems includes first and second conductive layers on a microelectronic package. The conductive layers may include one or more conductive components such as, but not limited to, power planes, ground planes, pads, traces, and the like for electrically connecting to electronic components. A via may electrically connect the first and second conductive layers. The via may have a cross-section of at least three partially-overlapping shapes. Each of the shapes partially overlaps at least two of the other shapes. The shapes may be, for example, circular, triangular, rectangular, square, polygonal, rhomboidal shape, or any other shape.
摘要翻译：用于为功率分配系统提供电源和接地通孔的系统包括微电子封装上的第一和第二导电层。导电层可以包括一个或多个导电部件，例如但不限于用于电连接到电子部件的电源平面，接地平面，焊盘，迹线等。通孔可以电连接第一和第二导电层。通孔可以具有至少三个部分重叠形状的横截面。每个形状部分地与至少两个其他形状重叠。形状可以是例如圆形，三角形，矩形，正方形，多边形，菱形或任何其它形状。

10. 发明授权

US08201133B2 Printed circuit board with reduced signal distortion 有权
标题翻译：印刷电路板，信号失真减少
公开(公告)号：US08201133B2
公开(公告)日：2012-06-12
申请号：US12140730
申请日：2008-06-17
申请人： Moises Cases , Tae H. Kim , Bhyrav M. Mutnury
发明人： Moises Cases , Tae H. Kim , Bhyrav M. Mutnury
IPC分类号： G06F17/50
CPC分类号： H05K1/0224 , H05K1/0225 , H05K1/0237 , H05K1/0253 , H05K3/0005 , H05K2201/09681 , Y10T29/49124
摘要： A printed circuit board with reduced signal distortion, including one or more layers of non-conductive substrate upon which are disposed conductive pathways that conduct signals, the signals characterized by distortion at least partly caused by orientation of the conductive pathways on the layers of the printed circuit board, and a periodically patterned reference plane; each conductive pathway that conducts signals oriented orthogonally or diagonally at forty-five degrees with respect to other conductive pathways that conduct signals on the printed circuit board; the periodically patterned reference plane comprising a conductor having discontinuities arranged in a periodically recurring pattern, the pattern of the discontinuities oriented on a surface of a layer of the printed circuit board at an optimum angle, with respect to the conductive pathways that conduct signals on the printed circuit board, that reduces distortion of the signals.
摘要翻译：具有降低的信号失真的印刷电路板，包括一层或多层不导电基底，在其上设置传导信号的导电路径，其特征在于至少部分地由印刷的层上的导电路径的取向引起的变形电路板和周期性图案化参考平面; 每个导电通路相对于在印刷电路板上传导信号的其它导电通路传导正交或对角地定向四十五度的信号; 所述周期性图案化参考平面包括具有以周期性重复图案布置的不连续性的导体，所述不连续性的图案相对于在所述印刷电路板上传导信号的导电路径以最佳角度定向在所述印刷电路板的层的表面上印刷电路板，可以减少信号的失真。

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