会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 7. 发明授权
    • Method for fabricating semiconductor device
    • 制造半导体器件的方法
    • US07521305B2
    • 2009-04-21
    • US11140952
    • 2005-06-01
    • Cha-Hsin LinZing-Way PeiMing-Jinn TsaiShing-Chii Lu
    • Cha-Hsin LinZing-Way PeiMing-Jinn TsaiShing-Chii Lu
    • H01L21/8234
    • H01L21/265H01L21/823807H01L21/823842H01L29/78H01L29/7843
    • A method for fabricating a semiconductor device includes the steps of: providing a semiconductor device formed with a plurality of transistors; forming a first stress layer with a plurality of layers on the semiconductor device; forming a second stress layer with a plurality of layers on another surface of the semiconductor device; covering photo resist on a region of the first stress layer to cover at least one of the transistors; and performing ion implantation on the part of the semiconductor device that is not covered by the photo resist. In another embodiment, the second stress layers can be formed after the ion implantation. The method can simultaneously enhance the device performance of the PMOS and NMOS on the same wafer. It also solves the problem of procedure integration caused by the produced compressive stress and tensile stress.
    • 一种制造半导体器件的方法包括以下步骤:提供形成有多个晶体管的半导体器件; 在所述半导体器件上形成具有多个层的第一应力层; 在所述半导体器件的另一表面上形成具有多个层的第二应力层; 覆盖所述第一应力层的区域上的光致抗蚀剂以覆盖所述晶体管中的至少一个; 并且对半导体器件的未被光致抗蚀剂覆盖的部分进行离子注入。 在另一个实施例中,可以在离子注入之后形成第二应力层。 该方法可以同时提高同一晶片上的PMOS和NMOS的器件性能。 它也解决了由产生的压缩应力和拉伸应力引起的程序整合问题。