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1. 发明授权

US07282414B2 Fabrication methods for compressive strained-silicon and transistors using the same 失效
标题翻译：压缩应变硅的制造方法和使用其的晶体管
公开(公告)号：US07282414B2
公开(公告)日：2007-10-16
申请号：US10909403
申请日：2004-08-03
申请人： Min-Hung Lee , Cheng-Yeh Yu , Shing-Chii Lu , Chee-Wee Liu
发明人： Min-Hung Lee , Cheng-Yeh Yu , Shing-Chii Lu , Chee-Wee Liu
IPC分类号： H01L21/336
CPC分类号： H01L21/26506 , H01L21/823807 , H01L29/1054 , H01L29/6659 , H01L29/7833 , H01L29/7842 , Y10S438/938
摘要： Fabrication methods for compressive strained-silicon by ion implantation. Ions are implanted into a silicon-containing substrate and high temperature processing converts the vicinity of the ion-contained region into strained-silicon. Transistors fabricated by the method are also provided.
摘要翻译：通过离子注入制备压应变硅的制备方法。将离子注入到含硅衬底中，并且高温处理将离子包含区域的附近转变成应变硅。还提供了通过该方法制造的晶体管。

2. 发明申请

US20050258460A1 Fabrication methods for compressive strained-silicon and transistors using the same 失效
标题翻译：压缩应变硅的制造方法和使用其的晶体管
公开(公告)号：US20050258460A1
公开(公告)日：2005-11-24
申请号：US10909403
申请日：2004-08-03
申请人： Min-Hung Lee , Cheng-Yeh Yu , Shing-Chii Lu , Chee-Wee Liu
发明人： Min-Hung Lee , Cheng-Yeh Yu , Shing-Chii Lu , Chee-Wee Liu
IPC分类号： H01L21/265 , H01L21/336 , H01L21/8238 , H01L29/10 , H01L29/76 , H01L29/78 , H01L29/84 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119
CPC分类号： H01L21/26506 , H01L21/823807 , H01L29/1054 , H01L29/6659 , H01L29/7833 , H01L29/7842 , Y10S438/938
摘要： Fabrication methods for compressive strained-silicon by ion implantation. Ions are implanted into a silicon-containing substrate and high temperature processing converts the vicinity of the ion-contained region into strained-silicon. Transistors fabricated by the method are also provided.
摘要翻译：通过离子注入制备压应变硅的制备方法。将离子注入到含硅衬底中，并且高温处理将离子包含区域的附近转变成应变硅。还提供了通过该方法制造的晶体管。

3. 发明申请

US20080023733A1 FABRICATION METHODS FOR COMPRESSIVE STRAINED-SILICON AND TRANSISTORS USING THE SAME 审中-公开
标题翻译：使用它的压敏应变硅和晶体管的制造方法
公开(公告)号：US20080023733A1
公开(公告)日：2008-01-31
申请号：US11860362
申请日：2007-09-24
申请人： Min-Hung LEE , Cheng-Yeh Yu , Shing-Chii Lu , Chee-Wee Liu
发明人： Min-Hung LEE , Cheng-Yeh Yu , Shing-Chii Lu , Chee-Wee Liu
IPC分类号： H01L29/78
CPC分类号： H01L21/26506 , H01L21/823807 , H01L29/1054 , H01L29/6659 , H01L29/7833 , H01L29/7842 , Y10S438/938
摘要： Fabrication methods for compressive strained-silicon by ion implantation. Ions are implanted into a silicon-containing substrate and high temperature processing converts the vicinity of the ion-contained region into strained-silicon. Transistors fabricated by the method are also provided.
摘要翻译：通过离子注入制备压应变硅的制备方法。将离子注入到含硅衬底中，并且高温处理将离子包含区域的附近转变为应变硅。还提供了通过该方法制造的晶体管。

4. 发明申请

US20060284164A1 Strained germanium field effect transistor and method of making the same 审中-公开
标题翻译：应变锗场效应晶体管及其制作方法
公开(公告)号：US20060284164A1
公开(公告)日：2006-12-21
申请号：US11216179
申请日：2005-09-01
申请人： Min-Hung Lee , Cheng-Yeh Yu , Chee-Wee Liu
发明人： Min-Hung Lee , Cheng-Yeh Yu , Chee-Wee Liu
IPC分类号： H01L31/00
CPC分类号： H01L29/1054 , H01L21/02381 , H01L21/0245 , H01L21/02532 , H01L21/0262
摘要： A strained germanium field effect transistor (FET) and method of making the same, comprise forming a germanium layer on a substrate, then forming a Si protective layer on the germanium layer, next forming a gate insulation layer on the Si protective layer, and fmally positioning a gate on the gate insulation layer. The germanium layer is used as a carrier transport channel of the strained germanium FET to improve the drive current and the carrier mobility, and to increase the devices performance effectively. And because the Si protective layer is on the germanium layer, the interface property between the germanium layer and the gate insulation layer is improved.
摘要翻译：应变锗场效应晶体管（FET）及其制造方法包括在衬底上形成锗层，然后在锗层上形成Si保护层，接着在Si保护层上形成栅极绝缘层，并且最终形成在栅极绝缘层上定位栅极。锗层用作应变锗FET的载流子传输通道，以提高驱动电流和载流子迁移率，并有效提高器件性能。并且由于Si保护层在锗层上，所以锗层和栅极绝缘层之间的界面性能得到改善。

5. 发明申请

US20070045610A1 Transistor device with strained germanium (Ge) layer by selectively growth and fabricating method thereof 审中-公开
标题翻译：具有应变锗（Ge）层的晶体管器件通过选择性生长及其制造方法
公开(公告)号：US20070045610A1
公开(公告)日：2007-03-01
申请号：US11293275
申请日：2005-12-05
申请人： Min-Hung Lee , Cheng-Yeh Yu , Chee-Wee Liu
发明人： Min-Hung Lee , Cheng-Yeh Yu , Chee-Wee Liu
IPC分类号： H01L31/109
CPC分类号： H01L29/1054 , H01L21/02381 , H01L21/0245 , H01L21/02532 , H01L21/0262 , H01L21/02636 , H01L29/66583 , H01L29/78
摘要： A transistor device with strained Ge layer by selectively growth and a fabricating method thereof are provided. A strained Ge layer is selectively grown on a substrate, so that the material of source/drain region is still the same as that of the substrate, and the strained Ge layer serves as a carry transport channel. Therefore, the performance of the device characteristics can be improved and the leakage current of the transistor may be approximately commensurate with that of a Si substrate field effect transistor (FET).
摘要翻译：提供了通过选择性生长具有应变Ge层的晶体管器件及其制造方法。应变Ge层选择性地生长在衬底上，使得源极/漏极区的材料与衬底的材料仍然相同，并且应变Ge层用作携带传输沟道。因此，可以提高器件特性的性能，并且晶体管的漏电流可以与Si衬底场效应晶体管（FET）的漏电流近似相当。

6. 发明申请

US20090194152A1 THIN-FILM SOLAR CELL HAVING HETERO-JUNCTION OF SEMICONDUCTOR AND METHOD FOR FABRICATING THE SAME 审中-公开
标题翻译：具有半导体异质结的薄膜太阳能电池及其制造方法
公开(公告)号：US20090194152A1
公开(公告)日：2009-08-06
申请号：US12025226
申请日：2008-02-04
申请人： Chee-Wee Liu , Cheng-Yeh Yu , Wen-Yuan Chen , Chu-Hsuan Lin
发明人： Chee-Wee Liu , Cheng-Yeh Yu , Wen-Yuan Chen , Chu-Hsuan Lin
IPC分类号： H01L31/0336 , H01L31/18
CPC分类号： H01L31/022425 , B82Y20/00 , H01L31/022433 , H01L31/028 , H01L31/035254 , H01L31/035281 , H01L31/072 , H01L31/0745 , H01L31/075 , H01L31/1804 , H01L31/1812 , Y02E10/547 , Y02E10/548 , Y02P70/521
摘要： A thin-film solar cell having a hetero-junction of semiconductor and the fabrication method thereof are provided. Instead of the conventional hetero-junction of III-V semiconductor or homo-structure of IV semiconductor, the thin-film solar cell according to the present invention adopts a novel hetero-junction structure of IV semiconductor to improve the cell efficiency thereof. By adjusting the amount of layer sequences and the thickness of the hetero-junction structure, the cell efficiency of the thin-film solar cell according to the present invention is also optimized.
摘要翻译：提供了具有半导体异质结的薄膜太阳能电池及其制造方法。代替III-V族半导体的常规异质结或IV半导体的同构结构，根据本发明的薄膜太阳能电池采用IV半导体的新型异质结结构来提高其电池效率。通过调整层序列的量和异质结结构的厚度，也优化了本发明的薄膜太阳能电池的电池效率。

7. 发明申请

US20070126014A1 LIGHT-EMITTING ELEMENT WITH HETEROJUNCTION STRUCTURE 审中-公开
标题翻译：具有异常结构的发光元件
公开(公告)号：US20070126014A1
公开(公告)日：2007-06-07
申请号：US11536025
申请日：2006-09-28
申请人： Ming-Han Liao , Cheng-Yeh Yu , Chee Wee Liu
发明人： Ming-Han Liao , Cheng-Yeh Yu , Chee Wee Liu
IPC分类号： H01L33/00 , H01L21/00
CPC分类号： H01L33/34 , H01L33/0004
摘要： A method for manufacturing a light-emitting element with a heterojunction of group IV is provided. The method comprises at least the steps of: (1) providing a silicon substrate having a first and a second surfaces; (2) forming a germanium layer on the first surface; (3) forming a cap layer on the germanium layer; (4) forming a oxidation layer on the cap layer; (5) forming a first conductive layer on the oxidation layer; (6) forming a second conductive layer on the second surface; and (7) respectively forming a conductive wire on the first and second conductive layers. The light-emitting element of MOS semiconductor manufactured by the abovementioned steps is characterized in the emission of long wavelength.
摘要翻译：提供了具有IV族异质结的发光元件的制造方法。该方法至少包括以下步骤：（1）提供具有第一和第二表面的硅衬底; （2）在第一表面上形成锗层; （3）在锗层上形成盖层; （4）在盖层上形成氧化层; （5）在氧化层上形成第一导电层; （6）在所述第二表面上形成第二导电层; 和（7）分别在第一和第二导电层上形成导线。通过上述步骤制造的MOS半导体的发光元件的特征在于长波长的发射。

8. 发明申请

US20050281286A1 Storage structure and method utilizing multiple protocol processor units 有权
标题翻译：使用多协议处理器单元的存储结构和方法
公开(公告)号：US20050281286A1
公开(公告)日：2005-12-22
申请号：US10979133
申请日：2004-11-03
申请人： Jun-Yao Wang , Chung-Ho Chen , Chao-Lin Su , Chao-Hsien Hsu , Cheng-Yeh Yu , I-Cheng Chung
发明人： Jun-Yao Wang , Chung-Ho Chen , Chao-Lin Su , Chao-Hsien Hsu , Cheng-Yeh Yu , I-Cheng Chung
IPC分类号： G06F3/06 , H04L12/28 , H04L29/08
CPC分类号： H04L67/1097 , G06F3/0601 , G06F2003/0692
摘要： A storage structure and method having multiple protocol processor units are disclosed. The storage structure comprises a host CPU, a main memory, a storage device, a switch fabric, and a host bus adapter module. The host bus adapter module includes a plurality of protocol processor nodes for processing frames received from a network, and storing those frames into the storage device. A processing module of the host bus adapter module extracts the session information of each frame and compares it with entries recorded in a look-up table. If the connection information hits one entry of the look-up table, the frame can be bypassed into a corresponding protocol processor node according to the definition of the look-up table. Otherwise, a new entry will be inserted into the look-up table for designating a corresponding protocol processor node.
摘要翻译：公开了具有多个协议处理器单元的存储结构和方法。存储结构包括主机CPU，主存储器，存储设备，交换结构和主机总线适配器模块。主机总线适配器模块包括用于处理从网络接收的帧的多个协议处理器节点，并将这些帧存储到存储设备中。主机总线适配器模块的处理模块提取每个帧的会话信息，并将其与查找表中记录的条目进行比较。如果连接信息匹配查找表的一个条目，则可以根据查找表的定义将帧绕过相应的协议处理器节点。否则，将在查找表中插入一个新条目，以指定相应的协议处理器节点。

9. 发明授权

US07816167B2 Method of fabricating a differential doped solar cell 失效
标题翻译：制造差分掺杂太阳能电池的方法
公开(公告)号：US07816167B2
公开(公告)日：2010-10-19
申请号：US12368707
申请日：2009-02-10
申请人： Cheng-Yeh Yu , Ming-Chin Kuo , Nai-Tien Ou , Tien-Szu Chen
发明人： Cheng-Yeh Yu , Ming-Chin Kuo , Nai-Tien Ou , Tien-Szu Chen
IPC分类号： H01L21/00
CPC分类号： H01L31/022425 , H01L31/1804 , Y02E10/547 , Y02P70/521
摘要： A method of fabricating a differential doped solar cell is described. The method includes the following steps. First, a substrate is provided. A doping process is conducted thereon to form a doped layer. A heavy doping portion of the doped layer is partially or fully removed. Subsequently, an anti-reflection coating layer is formed thereon. A metal conducting paste is printed on the anti-reflection coating layer and is fired to form the metal electrodes for the solar cell.
摘要翻译：描述了制造差分掺杂太阳能电池的方法。该方法包括以下步骤。首先，提供基板。在其上进行掺杂工艺以形成掺杂层。部分或完全去除掺杂层的重掺杂部分。随后，在其上形成防反射涂层。将金属导电膏印刷在防反射涂层上并被烧制以形成用于太阳能电池的金属电极。

10. 发明授权

US07460550B2 Storage structure and method utilizing multiple protocol processor units 有权
标题翻译：使用多协议处理器单元的存储结构和方法
公开(公告)号：US07460550B2
公开(公告)日：2008-12-02
申请号：US10979133
申请日：2004-11-03
申请人： Jun-Yao Wang , Chung-Ho Chen , Chao-Lin Su , Chao-Hsien Hsu , Cheng-Yeh Yu , I-Cheng Chung
发明人： Jun-Yao Wang , Chung-Ho Chen , Chao-Lin Su , Chao-Hsien Hsu , Cheng-Yeh Yu , I-Cheng Chung
IPC分类号： H04L12/26
CPC分类号： H04L67/1097 , G06F3/0601 , G06F2003/0692
摘要： A storage structure and method having multiple protocol processor units are disclosed. The storage structure comprises a host CPU, a main memory, a storage device, a switch fabric, and a host bus adapter module. The host bus adapter module includes a plurality of protocol processor nodes for processing frames received from a network, and storing those frames into the storage device. A processing module of the host bus adapter module extracts the session information of each frame and compares it with entries recorded in a look-up table. If the connection information hits one entry of the look-up table, the frame can be bypassed into a corresponding protocol processor node according to the definition of the look-up table. Otherwise, a new entry will be inserted into the look-up table for designating a corresponding protocol processor node.
摘要翻译：公开了具有多个协议处理器单元的存储结构和方法。存储结构包括主机CPU，主存储器，存储设备，交换结构和主机总线适配器模块。主机总线适配器模块包括用于处理从网络接收的帧的多个协议处理器节点，并将这些帧存储到存储设备中。主机总线适配器模块的处理模块提取每个帧的会话信息，并将其与查找表中记录的条目进行比较。如果连接信息匹配查找表的一个条目，则可以根据查找表的定义将帧绕过相应的协议处理器节点。否则，将在查找表中插入一个新条目，以指定相应的协议处理器节点。

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