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1. 发明申请

US20100094176A1 EYE OPENING DETECTION SYSTEM AND METHOD OF DETECTING EYE OPENING 有权
标题翻译：眼睛开放检测系统和眼睛开放检测方法
公开(公告)号：US20100094176A1
公开(公告)日：2010-04-15
申请号：US12443775
申请日：2007-11-06
申请人： Kenichi Ohue , Yuji Ninagawa , Kentaro Takahashi , Shin-ichi Kojima , Jun Adachi , Tomoharu Suzuki
发明人： Kenichi Ohue , Yuji Ninagawa , Kentaro Takahashi , Shin-ichi Kojima , Jun Adachi , Tomoharu Suzuki
IPC分类号： A61B5/11
CPC分类号： G06K9/00248 , A61B3/14 , A61B5/18 , B60K28/06 , G06K9/00281 , G08B21/06
摘要： An eye opening detection system that includes an imaging mechanism that captures an image of the face of a detected subject, an edge extraction mechanism that extracts the edge of the image captured, and an upper and lower eyelid detection mechanism that detects the upper and lower eyelids of the detected subject according to the edge extracted, and that detects the eye opening of the detected subject with reference to a detected distance between the upper and lower eyelids. The upper and lower eyelid detection detects the upper eyelid and detects the lower eyelid with reference to the upper eyelid detected.
摘要翻译：一种眼睛打开检测系统，其包括拍摄被检测对象的脸部的图像的成像机构，提取被捕获的图像的边缘的边缘提取机构，以及检测上下眼睑的上下眼睑检测机构根据提取的边缘检测检测到的被检体，并且根据检测到的上眼睑和下眼睑之间的距离来检测被检测物体的眼睛开度。上下眼睑检测检测上眼睑，并根据检测到的上眼睑检测下眼睑。

2. 发明申请

US20100073503A1 IMAGE PROCESSING APPARATUS AND IMAGE PROCESSING METHOD 有权
标题翻译：图像处理装置和图像处理方法
公开(公告)号：US20100073503A1
公开(公告)日：2010-03-25
申请号：US12451246
申请日：2008-05-09
申请人： Isahiko Tanaka , Shin-ichi Kojima , Takashi Naito
发明人： Isahiko Tanaka , Shin-ichi Kojima , Takashi Naito
IPC分类号： H04N5/228
CPC分类号： G06K9/00845 , G06F9/4831 , G06F9/4887 , G06K9/00993
摘要： An image processing apparatus is configured so that a combination of the processes that are performed is set for each of unit cycles (according to the value of a counter) in accordance with priorities individually set for the processes, and image processing is performed in a fundamental cycle that is constituted of six unit cycles. A face direction determination process, a line-of-sight direction determination process, a blink detection process, a dozing determination process, and a consciousness deterioration level determination process are selectively performed depending on the value of the counter, which varies from 1 to 6. According to the image processing apparatus, it is possible to more efficiently perform image processing that involves a plurality of processes.
摘要翻译：图像处理装置被配置为使得根据针对处理单独设置的优先级，针对每个单位周期（根据计数器的值）设置所执行的处理的组合，并且以基本形式执行图像处理循环由六个单位循环组成。根据从1到6变化的计数器的值来选择执行面部方向确定处理，视线方向确定处理，眨眼检测处理，打盹确定处理和意识恶化水平确定处理根据图像处理装置，可以更有效地进行涉及多个处理的图像处理。

3. 发明授权

US08435188B2 Eye opening detection system and method of detecting eye opening 有权
标题翻译：眼睛开放检测系统及眼睛检测方法
公开(公告)号：US08435188B2
公开(公告)日：2013-05-07
申请号：US12443775
申请日：2007-11-06
申请人： Kenichi Ohue , Yuji Ninagawa , Kentaro Takahashi , Shin-ichi Kojima , Jun Adachi , Tomoharu Suzuki
发明人： Kenichi Ohue , Yuji Ninagawa , Kentaro Takahashi , Shin-ichi Kojima , Jun Adachi , Tomoharu Suzuki
IPC分类号： A61B5/00
CPC分类号： G06K9/00248 , A61B3/14 , A61B5/18 , B60K28/06 , G06K9/00281 , G08B21/06
摘要： An eye opening detection system that includes an imaging mechanism that captures an image of the face of a detected subject, an edge extraction mechanism that extracts the edge of the image captured, and an upper and lower eyelid detection mechanism that detects the upper and lower eyelids of the detected subject according to the edge extracted, and that detects the eye opening of the detected subject with reference to a detected distance between the upper and lower eyelids. The upper and lower eyelid detection detects the upper eyelid and detects the lower eyelid with reference to the upper eyelid detected.
摘要翻译：一种眼睛打开检测系统，其包括拍摄被检测对象的脸部的图像的成像机构，提取被捕获的图像的边缘的边缘提取机构，以及检测上下眼睑的上下眼睑检测机构根据提取的边缘检测检测到的被检体，并且根据检测到的上眼睑和下眼睑之间的距离来检测被检测物体的眼睛开度。上下眼睑检测检测上眼睑，并根据检测到的上眼睑检测下眼睑。

4. 发明授权

US06703225B1 Interferon-&agr; 失效
标题翻译：干扰素α
公开(公告)号：US06703225B1
公开(公告)日：2004-03-09
申请号：US09889035
申请日：2001-10-24
申请人： Shin-ichi Kojima , Akira Asakura , Tetsuaki Futatsugi , Yuko Ota , Yuki Fukuda , Shinsuke Sagara
发明人： Shin-ichi Kojima , Akira Asakura , Tetsuaki Futatsugi , Yuko Ota , Yuki Fukuda , Shinsuke Sagara
IPC分类号： C12P2104
CPC分类号： C07K14/56 , A61K38/00
摘要： A novel human IFN-&agr; subtype and its derivative having an unprecedentedly high specific activity, DNA encoding these proteins, an expression vector having said DNA, a transformant transformed with said expression vector, a method of producing the above human IFN-&agr; and its derivative, and medical uses of the above human IFN-&agr; and its derivative.
摘要翻译：具有前所未有的比活性的新型人IFN-α亚型及其衍生物，编码这些蛋白质的DNA，具有所述DNA的表达载体，用所述表达载体转化的转化体，产生上述人IFN-α及其衍生物的方法，以及上述人IFN-α及其衍生物的医学用途。

5. 发明授权

US6002618A NMOS input receiver circuit 失效
标题翻译： NMOS输入接收电路
公开(公告)号：US6002618A
公开(公告)日：1999-12-14
申请号：US190040
申请日：1998-11-11
申请人： James A. Komarek , Clarence W. Padgett , Scott B. Tanner , Shin-ichi Kojima , Jack L. Minney , Motohiro Oishi , Keiji Fukumura , H. Nakanishi
发明人： James A. Komarek , Clarence W. Padgett , Scott B. Tanner , Shin-ichi Kojima , Jack L. Minney , Motohiro Oishi , Keiji Fukumura , H. Nakanishi
IPC分类号： G11C7/10 , G11C7/12 , G11C7/22 , G11C8/06 , G11C8/18 , G11C16/04 , G11C7/00 , G11C8/00
CPC分类号： G11C7/1057 , G11C7/1051 , G11C7/106 , G11C7/12 , G11C7/22 , G11C8/06 , G11C8/18
摘要： An input receiver circuit in a read-only memory is provided with a feedback to control hysteresis. A second stage and an additional output is added to the receiver. Switching circuit noise from inside of the read-only memory is isolated by the added state and outputs, and cannot be fed back into the receiver circuit to affect the detection of the TTL voltage levels. Use of wide and long FET sizes minimizes the manufacture related variations in the input receiver switching levels.
摘要翻译：只读存储器中的输入接收器电路具有控制滞后的反馈。第二级和附加输出被添加到接收器。只读存储器内部的开关电路噪声由添加状态和输出隔离，不能反馈到接收器电路以影响TTL电压电平的检测。使用宽和长的FET尺寸可最大限度地减少输入接收器开关电平中的制造相关变化。

6. 发明授权

US5870346A VLSI memory circuit 失效
标题翻译： VLSI存储电路
公开(公告)号：US5870346A
公开(公告)日：1999-02-09
申请号：US927773
申请日：1997-09-11
申请人： James A. Komarek , Clarence W. Padgett , Scott B. Tanner , Shin-ichi Kojima , Jack L. Minney , Motohiro Oishi , Keiji Fukumura , H. Nakanishi
发明人： James A. Komarek , Clarence W. Padgett , Scott B. Tanner , Shin-ichi Kojima , Jack L. Minney , Motohiro Oishi , Keiji Fukumura , H. Nakanishi
IPC分类号： G11C16/06 , G11C7/10 , G11C7/12 , G11C7/22 , G11C8/06 , G11C8/18 , G11C11/407 , G11C11/409 , H03K17/04 , H03K17/16 , H03K19/0175 , G11C7/00 , G11C17/00
CPC分类号： G11C7/1057 , G11C7/1051 , G11C7/106 , G11C7/12 , G11C7/22 , G11C8/06 , G11C8/18
摘要： A memory precharge voltage, VPC, is provided which tracks changes in the high voltage supply, VDD, according to a measured degree, which maintains a precharge voltage notwithstanding transient loads which may tend to draw the precharge voltage down, and which maintains the precharge voltage at the operating level notwithstanding the fact that the precharge generator is substantially turned off during a power down condition. The precharge voltage, VPC, is then used as the controlling input signal to a circuit which it generates and an internal control voltage, MLC, used to drive small pull-up current FETs coupled to the bit lines in the ROM core. The internal control signal MLC is generated to track the discharge current in a bit line within the memory core, to track VPC, and to be maintained at its operating voltage level even when the MLC current is substantially turned off during a power down condition.
摘要翻译：提供存储器预充电电压VPC，其根据测量的程度跟踪高压电源VDD的变化，其维持预充电电压，尽管瞬态负载可能倾向于将预充电电压降低，并且维持预充电电压尽管在断电状态期间预充电发生器基本上被关闭。然后，预充电电压VPC用作对其产生的电路的控制输入信号和用于驱动耦合到ROM核中的位线的小上拉电流FET的内部控制电压MLC。产生内部控制信号MLC以跟踪存储器芯内的位线中的放电电流，以跟踪VPC，并且即使在断电状态下MLC电流基本上截止时也保持在其工作电压电平。

7. 发明授权

US5929451A Symmetric magnetic doublet for charged particle beam lithography 失效
标题翻译：用于带电粒子束光刻的对称磁双曲
公开(公告)号：US5929451A
公开(公告)日：1999-07-27
申请号：US041977
申请日：1998-03-13
申请人： Shin-Ichi Kojima , Kazuya Okamoto
发明人： Shin-Ichi Kojima , Kazuya Okamoto
IPC分类号： G03F7/20 , H01J37/141 , H01J37/30 , H01J37/305 , H01L21/027
CPC分类号： H01J37/3007 , H01J2237/3175
摘要： Symmetric magnetic doublets are disclosed that image a reticle onto a sensitized substrate using a charged-particle beam. The symmetric magnetic doublet comprises an object-side lens and an image-side lens and satisfies certain quantitative conditions. If the object-side lens has a length S.sub.1 and pole-piece apertures of radii R.sub.1, R.sub.2, and the image-side lens has a length S.sub.2 and pole-piece apertures of radii R.sub.3, R.sub.4, then a lens according to an embodiment of the invention produces a demagnification of 1/m in an object-image distance L between the reticle and the substrate. This embodiment satisfies the relations R.sub.3 =R.sub.2 /m, R.sub.4 =R.sub.1 /m, S.sub.2 =S.sub.1 /m, and ##EQU1##
摘要翻译：公开了使用带电粒子束将掩模版图像到致敏基底上的对称磁性双峰。对称磁性双层包括物体侧透镜和图像侧透镜，并且满足一定的定量条件。如果物体侧透镜具有长度S1和半径R1，R2的极片孔径，并且图像侧透镜具有半径R3，R4的长度S2和极片孔径，则根据实施例的透镜本发明在掩模版和基板之间的物象距离L中产生1 / m的缩小。该实施例满足R3 = R2 / m，R4 = R1 / m，S2 = S1 / m的关系

8. 发明授权

US5759991A Neurotrophic peptide derivatives 失效
标题翻译：神经营养肽衍生物
公开(公告)号：US5759991A
公开(公告)日：1998-06-02
申请号：US403378
申请日：1995-02-27
申请人： Naoki Tohdoh , Shin-ichiro Tojo , Shin-ichi Kojima , Yasuyuki Ueki , Toshio Nishihara , Nobuyuki Fukushima , Tsunemasa Irie , Keiichi Ono , Hideo Agui , Kosei Ojika
发明人： Naoki Tohdoh , Shin-ichiro Tojo , Shin-ichi Kojima , Yasuyuki Ueki , Toshio Nishihara , Nobuyuki Fukushima , Tsunemasa Irie , Keiichi Ono , Hideo Agui , Kosei Ojika
IPC分类号： A61K38/00 , C07K7/06 , C07K14/475 , A61K38/08 , C07K14/435
CPC分类号： C07K7/06 , C07K14/475 , A61K38/00
摘要： The invention provides human- or rat-derived neurotrophic peptides and derivatives thereof, precursor peptides thereof, genes encoding the same, transformants containing recombinant expression vectors bearing the genes, and compositions comprising as an effective ingredient these neurotrophic peptides or derivatives thereof. The neurotrophic peptide or its derivatives of the present invention have a neurotrophic activity and are useful for the treatment of neuro-degenerative disorders and dementia.
摘要翻译：本发明提供人或大鼠衍生的神经营养肽及其衍生物，其前体肽，编码该基因的基因，含有重组表达载体的转化体，以及包含这些神经营养肽或其衍生物的有效成分的组合物。本发明的神经营养肽或其衍生物具有神经营养活性，并且可用于治疗神经退行性疾病和痴呆。

9. 发明授权

US5608687A Output driver control for ROM and RAM devices 失效
标题翻译： ROM和RAM设备的输出驱动控制
公开(公告)号：US5608687A
公开(公告)日：1997-03-04
申请号：US563212
申请日：1995-11-27
申请人： James A. Komarek , Clarence W. Padgett , Scott B. Tanner , Shin-ichi Kojima , Jack L. Minney , Motohiro Oishi , Keiji Fukumura , H. Nakanishi
发明人： James A. Komarek , Clarence W. Padgett , Scott B. Tanner , Shin-ichi Kojima , Jack L. Minney , Motohiro Oishi , Keiji Fukumura , H. Nakanishi
IPC分类号： G11C16/06 , G11C7/10 , G11C7/12 , G11C7/22 , G11C8/06 , G11C8/18 , G11C11/407 , G11C11/409 , H03K17/04 , H03K17/16 , H03K19/0175 , G11C13/00
CPC分类号： G11C7/1057 , G11C7/1051 , G11C7/106 , G11C7/12 , G11C7/22 , G11C8/06 , G11C8/18
摘要： The invention is a control circuit for controlling an interrupt driver coupled to the data outputs of a memory having address transition detection circuitry. The memory is operable in a standby and an active memory mode in sequential memory cycles. The control circuit comprises an output enable latch circuit which provides internal memory signal of whether the memory was operating in the standby or active mode during a previous memory cycle and a data latch circuit which provides an internal memory signal of whether a new read cycle is beginning within the memory. The data latch circuit is reset when address detection has occurred within the memory. A logic circuit combines an output of the data latch circuit, which is indicative of a memory read cycle, with an output of the output enable latch circuit, which is indicative of whether the prior memory cycle was standby or active. The logic circuit generates an output enable signal, OE, which is coupled to the output drivers of the memory to control float of the output drivers. As a result, a smooth transition from old data to new data is obtained, and system data bus contention in transitions from standby to active modes is eliminated.
摘要翻译：本发明是用于控制与具有地址转换检测电路的存储器的数据输出端耦合的中断驱动器的控制电路。存储器可在待机和主动存储器模式下在顺序存储器周期中操作。该控制电路包括一个输出使能锁存电路，该电路在前一个存储周期内提供存储器是处于待机还是工作模式的内部存储器信号，以及一个数据锁存电路，提供一个新的读取周期是否开始的内部存储器信号在记忆中当存储器内发生地址检测时，数据锁存电路复位。逻辑电路将指示存储器读取周期的数据锁存电路的输出与输出使能锁存电路的输出相结合，其指示先前存储器周期是待机还是活动。逻辑电路产生一个输出使能信号OE，它耦合到存储器的输出驱动器，以控制输出驱动器的浮点。结果，从旧数据到新数据的平滑过渡被获得，并且消除了从待机到主动模式的转换中的系统数据总线争用。

10. 发明授权

US08199190B2 Image processing apparatus and image processing method 有权
标题翻译：图像处理装置和图像处理方法
公开(公告)号：US08199190B2
公开(公告)日：2012-06-12
申请号：US12451246
申请日：2008-05-09
申请人： Isahiko Tanaka , Shin-ichi Kojima , Takashi Naito
发明人： Isahiko Tanaka , Shin-ichi Kojima , Takashi Naito
IPC分类号： H04N9/47 , H04N5/222
CPC分类号： G06K9/00845 , G06F9/4831 , G06F9/4887 , G06K9/00993
摘要： An image processing apparatus is configured so that a combination of the processes that are performed is set for each of unit cycles (according to the value of a counter) in accordance with priorities individually set for the processes, and image processing is performed in a fundamental cycle that is constituted of six unit cycles. A face direction determination process, a line-of-sight direction determination process, a blink detection process, a dozing determination process, and a consciousness deterioration level determination process are selectively performed depending on the value of the counter, which varies from 1 to 6. According to the image processing apparatus, it is possible to more efficiently perform image processing that involves a plurality of processes.
摘要翻译：图像处理装置被配置为使得根据针对处理单独设置的优先级，针对每个单位周期（根据计数器的值）设置所执行的处理的组合，并且以基本形式执行图像处理循环由六个单位循环组成。根据从1到6变化的计数器的值来选择执行面部方向确定处理，视线方向确定处理，眨眼检测处理，打盹确定处理和意识恶化水平确定处理根据图像处理装置，可以更有效地进行涉及多个处理的图像处理。

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