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    • 6. 发明授权
    • Method and apparatus for removing processing liquid from a processing liquid path
    • 从处理液路径去除处理液的方法和装置
    • US06345642B1
    • 2002-02-12
    • US09252716
    • 1999-02-19
    • Ted G. YoshidomeTushar MandrekarNitin KhuranaAnish Tolia
    • Ted G. YoshidomeTushar MandrekarNitin KhuranaAnish Tolia
    • B08B304
    • F16K27/003Y10T137/0419Y10T137/4259Y10T137/86131Y10T137/87249Y10T137/87885
    • A valve arrangement is provided that more effectively purges processing liquid from a processing liquid delivery system. With the valve arrangement only a small portion of the processing liquid path having a small wetting perimeter must be purged to affect replacement of a dysfunctional injection valve or any other component within the processing liquid delivery system. The valve arrangement comprises a first and a second isolation valve, a pump valve and purge valve configured to reduce the wetting perimeter defined by the four valves. The valve arrangement allows a dysfunctional injection valve or any other component to be replaced without health risk to humans or damage risk to a processing liquid delivery system employing the valve arrangement. During component replacement, the first and the second isolation valves are closed and the pump and the purge valves are opened so as to purge processing liquid from the isolated volume defined by the four valves. Pump/purge cycles preferably are performed, and the purging process may be performed automatically or manually. Once the isolated volume is purged, one of the isolation valves and the component are removed and replaced as a unit.
    • 提供了一种更有效地从处理液体输送系统清洗处理液体的阀装置。 利用阀装置,必须清洗具有小润湿周长的处理液路径的一小部分,以影响功能失调的喷射阀或处理液体输送系统内的任何其它部件的更换。 阀装置包括第一和第二隔离阀,泵阀和净化阀,其构造成减少由四个阀限定的润湿周长。 阀装置允许更换功能失调的注射阀或任何其它部件,而不会对人体造成健康危害,或损害使用阀装置的处理液体输送系统的风险。 在组件更换期间,关闭第一和第二隔离阀,并打开泵和清洗阀,以便从由四个阀限定的隔离容积中清除处理液。 优选执行泵/清洗循环,并且清洗过程可以自动或手动进行。 一旦隔离的容积被清除,隔离阀和组件中的一个被去除并且被替换为一个单元。
    • 8. 发明授权
    • Method for superior step coverage and interface control for high K dielectric capacitors and related electrodes
    • 用于高K介质电容器和相关电极的优越的步距覆盖和接口控制的方法
    • US06358810B1
    • 2002-03-19
    • US09123690
    • 1998-07-28
    • Charles DornfestJohn EgermeierNitin Khurana
    • Charles DornfestJohn EgermeierNitin Khurana
    • H01L2120
    • H01L28/55H01L28/60
    • The present invention provides a multi-layer semiconductor memory device comprising: a bottom electrode having a bottom layer, an upper interface layer and an intermediate tuning layer disposed between the bottom layer and the upper interface layer; a top electrode; and a high dielectric constant dielectric layer disposed between the bottom electrode and the top electrode. The present invention further provides an apparatus and a method for manufacturing high density DRAMs having capacitors having high quality HDC materials and low leakage currents. Another aspect of the present invention provides an electrode-dielectric interface that nucleates high quality HDC films. The present invention further provides an apparatus and a method for manufacturing capacitors within a high aspect ratio aperture.
    • 本发明提供一种多层半导体存储器件,包括:底层电极,其具有底层,上界面层和设置在底层和上界面层之间的中间调谐层; 顶电极 以及设置在底部电极和顶部电极之间的高介电常数电介质层。 本发明还提供一种用于制造具有高质量HDC材料和低漏电流的电容器的高密度DRAM的装置和方法。 本发明的另一方面提供了一种使高质量HDC膜成核的电极 - 电介质界面。 本发明还提供了一种在高纵横比孔径内制造电容器的装置和方法。
    • 9. 发明授权
    • Modulating surface morphology of barrier layers
    • 调制阻挡层的表面形态
    • US5956608A
    • 1999-09-21
    • US667842
    • 1996-06-20
    • Nitin KhuranaTed Guo
    • Nitin KhuranaTed Guo
    • H01L21/768H01L21/28H01L21/306
    • H01L21/76865H01L21/76843H01L21/76856H01L21/76862Y10S438/906
    • A process for fabricating electronic devices which includes the steps of providing a structure that includes a substrate with an overlying dielectric layer having one or more contact holes and/or vias formed therein; depositing a barrier layer over the structure so that the barrier layer penetrates into the contact holes and/or vias; plasma etching the deposited barrier layer so as to modify its surface morphology; and after modifying the surface morphology of the deposited barrier layer, depositing a metalization layer over the barrier layer. A two-step preclean to facet upper corners of the holes and/or vias and to clean bottoms of the holes and/or vias is performed prior to the deposition of the barrier layer.
    • 一种用于制造电子器件的方法,包括以下步骤:提供包括具有其中形成有一个或多个接触孔和/或通孔的上覆电介质层的衬底的结构; 在结构上沉积阻挡层,使得阻挡层渗透到接触孔和/或通孔中; 等离子体蚀刻沉积的阻挡层以改变其表面形态; 并且在改变沉积的阻挡层的表面形态之后,在阻挡层上沉积金属化层。 在沉积阻挡层之前,先进行将两个孔和/或通孔的上角分开并清洁孔和/或通孔的底部的两步预清洗。