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1. 发明申请

US20130214761A1 3D-IC DIFFERENTIAL SENSING AND CHARGE SHARING SCHEME 有权
标题翻译： 3D-IC差分感测和充电共享方案
公开(公告)号：US20130214761A1
公开(公告)日：2013-08-22
申请号：US13541590
申请日：2012-07-03
申请人： MENG-FAN CHANG , Tsung-Hsien Huang
发明人： MENG-FAN CHANG , Tsung-Hsien Huang
IPC分类号： G01R25/00
CPC分类号： G01R25/00 , G01R31/2853
摘要： The present invention discloses a 3D-IC differential sensing and charge sharing scheme which includes a plurality of TSVs including a first TSV and a second TSV. A tracking circuit is coupled to the first TSV. A sensing circuit is coupled to the second TSV and the tracking circuit. A plurality of equaling circuits are provided and wherein each of equaling circuit is configured and electrically connected between adjacent two equaling circuits. A clamping circuit is coupled to the first TSV.
摘要翻译：本发明公开了一种3D-IC差分感测和电荷共享方案，其包括包括第一TSV和第二TSV的多个TSV。跟踪电路耦合到第一TSV。感测电路耦合到第二TSV和跟踪电路。提供了多个均衡电路，并且其中每个均衡电路被配置和电连接在相邻的两个均衡电路之间。钳位电路耦合到第一TSV。

2. 发明授权

US08392132B2 Process variation detection apparatus and process variation detection method 有权
标题翻译：过程变异检测装置及过程变异检测方法
公开(公告)号：US08392132B2
公开(公告)日：2013-03-05
申请号：US12851547
申请日：2010-08-05
申请人： Ku-Feng Lin , Meng-Fan Chang , Shyh-Shyuan Sheu , Pei-Chia Chiang , Wen-Pin Lin , Chih-He Lin
发明人： Ku-Feng Lin , Meng-Fan Chang , Shyh-Shyuan Sheu , Pei-Chia Chiang , Wen-Pin Lin , Chih-He Lin
IPC分类号： G06F19/00
CPC分类号： G01R31/2837 , G11C13/00 , G11C29/021 , G11C29/028 , G11C2029/0409 , H01L22/34
摘要： A process variation detection apparatus and a process variation detection method are provided. The process variation detection apparatus includes a process variation detector and a compensation signal generator. The process variation detector includes a first process variation detection component, a second process variation detection component and a current comparator. The channel of the first process variation detection component is a first conductive type, and the channel of the second process variation detection component is a second conductive type, wherein the above-mentioned first conductive type is different from the second conductive type. The current comparator is connected to the first process variation detection component and the second process variation detection component for comparing the current difference between the two components and outputting a current comparison result. The compensation signal generator is connected to the process variation detector, and produces a corresponding compensation signal according to the current comparison result.
摘要翻译：提供了一种过程变化检测装置和工艺变化检测方法。过程变化检测装置包括处理变化检测器和补偿信号发生器。过程变化检测器包括第一过程变化检测部件，第二过程变化检测部件和电流比较器。第一处理变化检测部件的通道是第一导电型，第二处理变化检测部件的通道是第二导电型，其中上述第一导电类型与第二导电类型不同。电流比较器连接到第一处理变化检测部件和第二处理变化检测部件，用于比较两个部件之间的电流差异并输出当前的比较结果。补偿信号发生器连接到过程变化检测器，并根据当前比较结果产生相应的补偿信号。

3. 发明申请

US20130009703A1 BULK-DRIVEN CURRENT-SENSE AMPLIFIER AND OPERATING METHOD THEREOF 有权
标题翻译：大容量驱动电流检测放大器及其工作方法
公开(公告)号：US20130009703A1
公开(公告)日：2013-01-10
申请号：US13178698
申请日：2011-07-08
申请人： Che-Wei WU , Meng-Fan CHANG , Ku-Feng LIN
发明人： Che-Wei WU , Meng-Fan CHANG , Ku-Feng LIN
IPC分类号： H03F3/45
CPC分类号： G11C7/06 , G11C7/062 , G11C13/0002 , G11C13/004 , G11C2013/0042 , G11C2013/0054
摘要： A bulk-driven current-sense amplifier and an amplifier operating method are disclosed. The bulk-driven current-sense amplifier includes a differential amplifier, a first driver, and a second driver. The first driver is coupled to the differential amplifier, and a first node is formed at a connectivity segment of the first driver. The second drive is coupled to the differential amplifier, and a second node is formed at a connectivity segment of the second driver. When a first switch of the first driver and a second switch of the second driver are turned on, the differential amplifier charges the first node and the second node. When the charging is completed, the first node and the second node respectively have a different stabilized potential according to currents separately flowing through a first memory unit of the first driver and a second memory unit of the second drive, and the differential amplifier generates a voltage.
摘要翻译：公开了体驱动电流检测放大器和放大器操作方法。体驱动电流检测放大器包括差分放大器，第一驱动器和第二驱动器。第一驱动器耦合到差分放大器，并且第一节点形成在第一驱动器的连接段处。第二驱动器耦合到差分放大器，并且第二节点形成在第二驱动器的连接段处。当第一驱动器的第一开关和第二驱动器的第二开关导通时，差分放大器对第一节点和第二节点充电。当充电完成时，第一节点和第二节点分别根据分别流过第一驱动器的第一存储器单元的电流和第二驱动器的第二存储器单元分别具有不同的稳定电位，并且差分放大器产生电压。

4. 发明授权

US08320211B1 Current-sense amplifier with low-offset adjustment and method of low-offset adjustment thereof 有权
标题翻译：具有低偏移调整的电流检测放大器及其低偏移调整方法
公开(公告)号：US08320211B1
公开(公告)日：2012-11-27
申请号：US13108550
申请日：2011-05-16
申请人： Meng-Fan Chang , Yu-Fan Lin , Shin-Jang Shen , Yu-Der Chih
发明人： Meng-Fan Chang , Yu-Fan Lin , Shin-Jang Shen , Yu-Der Chih
IPC分类号： G11C7/06 , H03F3/16
CPC分类号： G11C16/06 , G11C7/06 , G11C16/26
摘要： A current-sense amplifier with low-offset adjustment and a low-offset adjustment method thereof are disclosed. The current-sense amplifier includes a sensing unit, an equalizing unit and a bias compensation unit. The sensing unit includes a sense amplifier, a latch circuit, a first precharged bit line, and a second precharged bit line. The equalizing unit is electrically connected to the first and the second precharged bit line for regulating a voltage of the first precharged bit line and a voltage of the second precharged bit line to the same electric potential. The bias compensation unit is electrically connected to the sense amplifier for compensating an input offset voltage of the current-sense amplifier.
摘要翻译：公开了一种具有低偏移调整的电流检测放大器及其低失调调整方法。电流检测放大器包括感测单元，均衡单元和偏置补偿单元。感测单元包括读出放大器，锁存电路，第一预充电位线和第二预充电位线。均衡单元电连接到第一和第二预充电位线，用于将第一预充电位线的电压和第二预充电位线的电压调节到相同的电位。偏置补偿单元电连接到读出放大器，用于补偿电流检测放大器的输入偏移电压。

5. 发明申请

US20120293260A1 Low-Offset Current-Sense Amplifier and Operating Method Thereof 有权
标题翻译：低失调电流检测放大器及其操作方法
公开(公告)号：US20120293260A1
公开(公告)日：2012-11-22
申请号：US13108577
申请日：2011-05-16
申请人： Meng-Fan Chang , Yu-Fan Lin , Shin-Jang Shen , Yu-Der Chih
发明人： Meng-Fan Chang , Yu-Fan Lin , Shin-Jang Shen , Yu-Der Chih
IPC分类号： H03F3/45
CPC分类号： H03F3/45183 , H03F1/0244 , H03F2200/261 , H03F2200/511 , H03F2203/45481 , H03F2203/45506
摘要： A low-offset current-sense amplifier and an operating method thereof are disclosed. The low-offset current-sense amplifier includes a sense amplifier, a first current supply unit, a second current supply unit, and a processing unit. The first current supply unit is coupled to the sense amplifier, and includes a first transistor group and a first current output terminal. The second current supply unit is coupled to the sense amplifier, and includes a second transistor group and a second current output terminal. The processing unit controls the on/off of some transistors of the first transistor group and the second transistor group according to electric currents output from the first current output terminal and the second current output terminal, respectively.
摘要翻译：公开了低失调电流检测放大器及其操作方法。低失调电流检测放大器包括读出放大器，第一电流供应单元，第二电流供应单元和处理单元。第一电流供应单元耦合到读出放大器，并且包括第一晶体管组和第一电流输出端子。第二电流供应单元耦合到读出放大器，并且包括第二晶体管组和第二电流输出端。处理单元分别根据从第一电流输出端子和第二电流输出端子输出的电流来控制第一晶体管组和第二晶体管组的一些晶体管的开/关。

6. 发明授权

US08274322B2 Charge pump with low noise and high output current and voltage 有权
公开(公告)号：US08274322B2
公开(公告)日：2012-09-25
申请号：US12906313
申请日：2010-10-18
申请人： Meng-Fan Chang , Shin-Jang Shen , Wan-Ying Lu
发明人： Meng-Fan Chang , Shin-Jang Shen , Wan-Ying Lu
IPC分类号： G05F1/10
CPC分类号： H02M3/07
摘要： The present invention discloses a charge pump system with low noise and high output current and voltage, comprising: a four phase clock generator used to generate a first signals group; a serial of delay circuits coupled to said four phase clock generator, wherein each of said delay circuits is coupled to a previous delay circuit relative to each of said delay circuits for delaying a signals group received from said previous delay circuit; a first charge pump circuit coupled to the four phase clock generator and the delay circuits; and an output terminal coupled to the first charge pump circuit; wherein high level of said first signal overlaps two sections of high level of said third signal to generate a first overlapping time and a second overlapping time, and said first overlapping time is not equal to said second overlapping time.

7. 发明申请

US20120092054A1 Charge pump with low noise and high output current and voltage 有权
标题翻译：电荷泵具有低噪声，高输出电流和电压
公开(公告)号：US20120092054A1
公开(公告)日：2012-04-19
申请号：US12906313
申请日：2010-10-18
申请人： Meng-Fan CHANG , Shin-Jang SHEN , Wan-Ying LU
发明人： Meng-Fan CHANG , Shin-Jang SHEN , Wan-Ying LU
IPC分类号： H03K3/00 , G05F1/10
CPC分类号： H02M3/07
摘要： The present invention discloses a charge pump system with low noise and high output current and voltage, comprising: a four phase clock generator used to generate a first signals group; a serial of delay circuits coupled to said four phase clock generator, wherein each of said delay circuits is coupled to a previous delay circuit relative to each of said delay circuits for delaying a signals group received from said previous delay circuit; a first charge pump circuit coupled to the four phase clock generator and the delay circuits; and an output terminal coupled to the first charge pump circuit; wherein high level of said first signal overlaps two sections of high level of said third signal to generate a first overlapping time and a second overlapping time, and said first overlapping time is not equal to said second overlapping time.
摘要翻译：本发明公开了一种具有低噪声，高输出电流和电压的电荷泵系统，包括：用于产生第一信号组的四相时钟发生器; 耦合到所述四相时钟发生器的一系列延迟电路，其中每个所述延迟电路相对于每个所述延迟电路耦合到先前的延迟电路，用于延迟从所述先前延迟电路接收的信号组; 耦合到四相时钟发生器和延迟电路的第一电荷泵电路; 以及耦合到所述第一电荷泵电路的输出端子; 其中所述第一信号的高电平与所述第三信号的高电平的两个部分重叠以产生第一重叠时间和第二重叠时间，并且所述第一重叠时间不等于所述第二重叠时间。

8. 发明授权

US07969193B1 Differential sensing and TSV timing control scheme for 3D-IC 有权
标题翻译：用于3D-IC的差分感测和TSV时序控制方案
公开(公告)号：US07969193B1
公开(公告)日：2011-06-28
申请号：US12830469
申请日：2010-07-06
申请人： Wei-Cheng Wu , Yen-Huei Chen , Meng-Fan Chang
发明人： Wei-Cheng Wu , Yen-Huei Chen , Meng-Fan Chang
IPC分类号： H03K19/0175
CPC分类号： H03K19/0175 , H01L25/0657 , H01L2225/06541 , H01L2924/0002 , H01L2924/00
摘要： This disclosure uses a differential sensing and TSV timing control scheme for 3D-IC, which includes a first chip layer of the stacked device having a detecting circuits and a relative high ability driver horizontally coupled to the detecting circuits. A sensing circuit is coupled to the detecting circuits by a horizontal line, a first differential signal driver is coupled to the sensing circuit, horizontally. The Nth chip layer of the stacked device includes a Nth relative high ability driver and a Nth differential signal driver formed on the Nth chip layer. The Nth relative high ability driver is vertically coupled to the first relative high ability driver through one relative low loading TSV and (N−2) TSVs to act as dummy loadings. The TSV and (N−2) TSVs penetrate the stacked device from Nth chip layer to first chip layer. The TSV shares same configuration with the (N−2) TSVs. The Nth differential signal driver is vertically coupled to the first differential signal driver through a pair of TSVs and (N−2) pairs of TSVs, vertically. The pair of TSVs and the (N−2) TSVs penetrate the stacked device from the Nth chip layer to the first chip layer. Each of TSV is formed between a first and a second chip layers. Each of TSV is formed between any adjacent two chip layers of the stacked device.
摘要翻译：本公开使用用于3D-IC的差分感测和TSV定时控制方案，其包括具有检测电路的堆叠装置的第一芯片层和水平耦合到检测电路的相对高能力驱动器。感测电路通过水平线耦合到检测电路，第一差分信号驱动器水平地耦合到感测电路。层叠器件的第N芯片层包括形成在第N芯片层上的第N相对高能力驱动器和第N差分信号驱动器。第N相对高能力驱动器通过一个相对低负载TSV和（N-2）TSV垂直耦合到第一相对高能力的驱动器作为虚拟负载。 TSV和（N-2）TSV穿透层叠器件从第N个芯片层到第一个芯片层。 TSV与（N-2）TSV共享相同的配置。第N个差分信号驱动器通过一对TSV和（N-2）对TSV垂直耦合到第一差分信号驱动器。一对TSV和（N-2）TSV从第N个芯片层穿透层叠器件到第一芯片层。每个TSV形成在第一和第二芯片层之间。每个TSV形成在堆叠设备的任何相邻的两个芯片层之间。

9. 发明申请

US20090103377A1 ACCESS UNIT FOR A STATIC RANDOM ACCESS MEMORY 有权
标题翻译：用于静态随机访问存储器的访问单元
公开(公告)号：US20090103377A1
公开(公告)日：2009-04-23
申请号：US12245887
申请日：2008-10-06
申请人： Meng-Fan Chang
发明人： Meng-Fan Chang
IPC分类号： G11C7/12 , G11C5/14
CPC分类号： G11C11/412
摘要： An access unit for a static random access memory (SRAM) is provided. The access unit comprises two inverters. Two different variable voltages are supplied to the two inverters via bitlines to cause an imbalance in the current strengths between the two inverters so that data can be written on the SRAM.
摘要翻译：提供了一种用于静态随机存取存储器（SRAM）的存取单元。存取单元包括两个逆变器。通过位线将两个不同的可变电压提供给两个反相器，以使得两个反相器之间的电流强度不平衡，使得可以将数据写入SRAM。

10. 发明授权

US07356656B1 Skew free control of a multi-block SRAM 有权
标题翻译：多块SRAM的无偏差控制
公开(公告)号：US07356656B1
公开(公告)日：2008-04-08
申请号：US09571373
申请日：2000-05-15
申请人： Meng-Fan Chang
发明人： Meng-Fan Chang
IPC分类号： G06F12/00
CPC分类号： G11C7/22 , G11C7/02 , G11C11/413
摘要： A multi-block SRAM memory system is described where a single global clock pulse is distributed to each memory block from the central control. At each SRAM memory block a local signal generator uses the globally distributed clock pulse to generate the required memory control pulse signals. By generating the memory control pulses locally, instead of distributing these from the central control the variations in skew are greatly reduced. Thus the required timing relationship between memory control signals can be achieved with smaller timing margins. This allows higher speed memory cycle and more reliable memory operation.
摘要翻译：描述了一种多块SRAM存储器系统，其中单个全局时钟脉冲从中央控制器分配到每个存储器块。在每个SRAM存储器块中，本地信号发生器使用全局分布的时钟脉冲来产生所需的存储器控制脉冲信号。通过本地产生存储器控制脉冲，代替从中央控制器分配这些脉冲，大大减少了偏差的变化。因此，可以以较小的定时裕度来实现存储器控制信号之间所需的定时关系。这允许更高速度的存储器周期和更可靠的存储器操作。

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