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1. 发明授权

US08264023B2 Semiconductor device and manufacturing method of semiconductor device 失效
标题翻译：半导体器件及半导体器件的制造方法
公开(公告)号：US08264023B2
公开(公告)日：2012-09-11
申请号：US12971783
申请日：2010-12-17
申请人： Yosuke Takeuchi , Masamichi Matsuoka , Ryoji Matsuda , Keisuke Tsukamoto
发明人： Yosuke Takeuchi , Masamichi Matsuoka , Ryoji Matsuda , Keisuke Tsukamoto
IPC分类号： H01L21/02
CPC分类号： H01L43/08 , B82Y10/00 , B82Y25/00 , H01L27/228 , H01L43/12
摘要： A semiconductor device includes a semiconductor substrate, a lower electrode, a magnetoresistive element, an upper electrode, and a protective film. The lower electrode is formed over the semiconductor substrate. The magnetoresistive element includes a fixed layer, a tunneling insulating film, and a free layer. The upper electrode is disposed over the free layer. The protective film covers the sides intersecting the main surfaces of the lower electrode, the fixed layer, the tunneling insulating film, the free layer, and the upper electrode. The fixed layer, whose magnetization direction is fixed, is disposed over the lower electrode. The tunneling insulating film is disposed over the fixed layer. The free layer, whose magnetization direction is variable, is disposed over a main surface of the tunneling insulating film. The width of the upper electrode is smaller than that of each of the lower electrode and the fixed layer.
摘要翻译：半导体器件包括半导体衬底，下电极，磁阻元件，上电极和保护膜。下电极形成在半导体衬底上。磁阻元件包括固定层，隧道绝缘膜和自由层。上电极设置在自由层上。保护膜覆盖与下电极，固定层，隧道绝缘膜，自由层和上电极的主表面相交的侧面。磁化方向固定的固定层设置在下电极上。隧道绝缘膜设置在固定层上。其磁化方向可变的自由层设置在隧道绝缘膜的主表面上。上电极的宽度小于下电极和固定层的宽度。

2. 发明申请

US20070164342A1 Semiconductor memory device and method of manufacturing the same 审中-公开
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US20070164342A1
公开(公告)日：2007-07-19
申请号：US11651965
申请日：2007-01-11
申请人： Tsutomu Okazaki , Motoi Ashida , Hiroji Ozaki , Tsuyoshi Koga , Daisuke Okada , Masamichi Matsuoka
发明人： Tsutomu Okazaki , Motoi Ashida , Hiroji Ozaki , Tsuyoshi Koga , Daisuke Okada , Masamichi Matsuoka
IPC分类号： H01L29/76
CPC分类号： H01L29/42324 , H01L27/115 , H01L27/11521 , H01L29/40114
摘要： A polysilicon film forming a memory gate interconnection and the like includes a part extending from a part positioned on one side surface of a control gate interconnection to a side opposite to a side where the control gate interconnection is positioned, and that part serves as a pad portion. A contact hole is formed to expose the pad portion. The height of a part of the polysilicon film that is positioned on one side surface of the control gate interconnection is set equal to or lower than the height of the control gate interconnection so that the polysilicon film forming a memory gate interconnection and the like does not two-dimensionally overlap the control gate interconnection. Therefore, a semiconductor memory device with increased process margin can be obtained.
摘要翻译：形成存储器栅互连等的多晶硅膜包括从位于控制栅互连的一个侧表面上的部分延伸到与控制栅互连的一侧相对的一侧的部分，并且该部分用作焊盘一部分。形成接触孔以露出焊盘部分。位于控制栅极互连的一个侧面上的多晶硅膜的一部分的高度设定为等于或低于控制栅极互连的高度，使得形成存储器栅互连等的多晶硅膜不会二维重叠控制门互连。因此，可以获得具有增加的工艺裕量的半导体存储器件。

3. 发明授权

US07113456B2 Method and apparatus for playing back a multisession disc 有权
标题翻译：播放多片碟的方法和装置
公开(公告)号：US07113456B2
公开(公告)日：2006-09-26
申请号：US10390458
申请日：2003-03-17
申请人： Manabu Kusano , Shinji Wakabayashi , Masamichi Matsuoka
发明人： Manabu Kusano , Shinji Wakabayashi , Masamichi Matsuoka
IPC分类号： G11B21/08
CPC分类号： G11B27/3063 , G11B20/00007 , G11B20/10527 , G11B27/002 , G11B27/105 , G11B27/11 , G11B27/36 , G11B2020/00057 , G11B2020/1062 , G11B2220/20 , G11B2220/2545 , G11B2220/2583 , G11B2220/65
摘要： A method and apparatus for reading multisession discs in which both standard CD-DA format and compressed music formats, such as MP3, may be utilized on the same disc. High speed reading of data into shock proof memory, analysis of available memory and storage of analyzed record structures are used to provide playback of music in both formats and, if desired, in a random playback order.
摘要翻译：一种用于读取多片盘的方法和装置，其中标准CD-DA格式和压缩音乐格式（例如MP3）可以在同一盘上使用。将数据高速读取到防震存储器中，分析可用的存储器和分析的记录结构的存储被用于以两种格式以及如果需要以随机播放顺序提供音乐的回放。

4. 发明申请

US20130203187A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体器件及制造半导体器件的方法
公开(公告)号：US20130203187A1
公开(公告)日：2013-08-08
申请号：US13827068
申请日：2013-03-14
申请人： Masamichi MATSUOKA , Tatsuya FUKUMURA
发明人： Masamichi MATSUOKA , Tatsuya FUKUMURA
IPC分类号： H01L43/02
CPC分类号： H01L43/02 , G11C11/161 , H01L27/228 , H01L43/08
摘要： The semiconductor device of this invention includes a semiconductor substrate having a main surface, and a magnetoresistive element located over the main surface of the semiconductor substrate. Further, it includes a protective layer, a wiring, a first upper electrode, and a second upper electrode. The protective layer is disposed so as to cover the side surface of the magnetoresistive element. The wiring is located over the top of the magnetoresistive element. The first upper electrode substantially the same in dimensions in plan view as the magnetoresistive element is disposed over the magnetoresistive element. The second upper electrode is electrically coupled with the first upper electrode over the first upper electrode, and larger in dimensions in plan view than the first upper electrode.
摘要翻译：本发明的半导体器件包括具有主表面的半导体衬底和位于半导体衬底的主表面上方的磁阻元件。此外，它包括保护层，布线，第一上电极和第二上电极。保护层设置成覆盖磁阻元件的侧表面。布线位于磁阻元件顶部的上方。当磁阻元件设置在磁阻元件上方时，第一上电极在平面图中的尺寸基本相同。第二上电极与第一上电极电连接在第一上电极上，并且在平面图中的尺寸大于第一上电极。

5. 发明申请

US20120037874A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：US20120037874A1
公开(公告)日：2012-02-16
申请号：US13278918
申请日：2011-10-21
申请人： Masahiro MONIWA , Fumihiko NITTA , Masamichi MATSUOKA , Satoshi IIDA
发明人： Masahiro MONIWA , Fumihiko NITTA , Masamichi MATSUOKA , Satoshi IIDA
IPC分类号： H01L45/00
CPC分类号： H01L45/144 , G11C13/0004 , H01L27/2436 , H01L45/06 , H01L45/12 , H01L45/1233 , H01L45/1675 , H01L2924/0002 , H01L2924/00
摘要： Any of a plurality of contact plugs which reaches a diffusion layer serving as a drain layer of an MOS transistor has an end provided in contact with a lower surface of a thin insulating film provided selectively on an interlayer insulating film. A phase change film constituted by GST to be a chalcogenide compound based phase change material is provided on the thin insulating film, and an upper electrode is provided thereon. Any of the plurality of contact plugs which reaches the diffusion layer serving as a source layer has an end connected directly to an end of a contact plug penetrating an interlayer insulating film.
摘要翻译：到达用作MOS晶体管的漏极层的扩散层的多个接触插塞中的任一个具有与选择性地设置在层间绝缘膜上的薄绝缘膜的下表面接触的端部。在该薄绝缘膜上设置由作为硫属化合物系的相变材料的GST构成的相变膜，在其上设置有上部电极。到达用作源层的扩散层的多个接触插塞中的任何一个直接连接到穿过层间绝缘膜的接触插塞的端部的端部。

6. 发明申请

US20110156181A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE 失效
标题翻译：半导体器件的半导体器件和制造方法
公开(公告)号：US20110156181A1
公开(公告)日：2011-06-30
申请号：US12971783
申请日：2010-12-17
申请人： Yosuke TAKEUCHI , Masamichi MATSUOKA , Ryoji MATSUDA , Keisuke TSUKAMOTO
发明人： Yosuke TAKEUCHI , Masamichi MATSUOKA , Ryoji MATSUDA , Keisuke TSUKAMOTO
IPC分类号： H01L29/82 , H01L21/02
CPC分类号： H01L43/08 , B82Y10/00 , B82Y25/00 , H01L27/228 , H01L43/12
摘要： A semiconductor device is provided which can further suppress the leakage of a magnetic field in a magnetoresistive element, and which can further improve the performance of the semiconductor device. A semiconductor device includes a semiconductor substrate, a lower electrode, a magnetoresistive element, an upper electrode, and a protective film. The lower electrode is formed over a main surface of the semiconductor substrate. The magnetoresistive element includes a fixed layer, a tunneling insulating film, and a free layer. The upper electrode is disposed over the other main surface opposite to one main surface of the free layer opposed to the tunneling insulating film. The protective film covers the sides intersecting the main surfaces of the lower electrode, the fixed layer, the tunneling insulating film, the free layer, and the upper electrode. The fixed layer included in the magnetoresistive element is a layer which is disposed over one main surface of the lower electrode, and whose magnetization direction is fixed. The tunneling insulating film is disposed over the other main surface opposite to one main surface of the fixed layer opposed to the lower electrode. The free layer is a layer which is disposed over the other main surface opposite to one main surface of the tunneling insulating film opposed to the fixed layer, and whose magnetization direction is variable. The width of the upper electrode is smaller than that of each of the lower electrode and the fixed layer in the direction intersecting the lamination direction of the lower electrode, the fixed layer 35, the tunneling insulating film 38, the free layer, and the upper electrode.
摘要翻译：提供一种能够进一步抑制磁阻元件中的磁场的泄漏的半导体器件，能够进一步提高半导体器件的性能。半导体器件包括半导体衬底，下电极，磁阻元件，上电极和保护膜。下电极形成在半导体衬底的主表面上。磁阻元件包括固定层，隧道绝缘膜和自由层。上电极设置在与隧道绝缘膜相对的自由层的一个主表面相对的另一个主表面上。保护膜覆盖与下电极，固定层，隧道绝缘膜，自由层和上电极的主表面相交的侧面。包含在磁阻元件中的固定层是设置在下电极的一个主表面上并且其磁化方向固定的层。隧道绝缘膜设置在与下电极相对的固定层的一个主表面相对的另一主表面上。自由层是设置在与固定层相对的隧道绝缘膜的一个主表面相对的另一主表面上并且其磁化方向可变的层。上电极的宽度小于下电极和固定层中的每一个在与下电极，固定层35，隧道绝缘膜38，自由层和上层的层叠方向相交的方向上的宽度电极。

7. 发明授权

US08338817B2 Semiconductor device and method of manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US08338817B2
公开(公告)日：2012-12-25
申请号：US13278918
申请日：2011-10-21
申请人： Masahiro Moniwa , Fumihiko Nitta , Masamichi Matsuoka , Satoshi Iida
发明人： Masahiro Moniwa , Fumihiko Nitta , Masamichi Matsuoka , Satoshi Iida
IPC分类号： H01L47/00
CPC分类号： H01L45/144 , G11C13/0004 , H01L27/2436 , H01L45/06 , H01L45/12 , H01L45/1233 , H01L45/1675 , H01L2924/0002 , H01L2924/00
摘要： Any of a plurality of contact plugs which reaches a diffusion layer serving as a drain layer of an MOS transistor has an end provided in contact with a lower surface of a thin insulating film provided selectively on an interlayer insulating film. A phase change film constituted by GST to be a chalcogenide compound based phase change material is provided on the thin insulating film, and an upper electrode is provided thereon. Any of the plurality of contact plugs which reaches the diffusion layer serving as a source layer has an end connected directly to an end of a contact plug penetrating an interlayer insulating film.
摘要翻译：到达用作MOS晶体管的漏极层的扩散层的多个接触插塞中的任一个具有与选择性地设置在层间绝缘膜上的薄绝缘膜的下表面接触的端部。在该薄绝缘膜上设置由作为硫属化合物系的相变材料的GST构成的相变膜，在其上设置有上部电极。到达用作源层的扩散层的多个接触插塞中的任何一个直接连接到穿过层间绝缘膜的接触插塞的端部的端部。

8. 发明申请

US20110156182A1 SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体器件
公开(公告)号：US20110156182A1
公开(公告)日：2011-06-30
申请号：US12971988
申请日：2010-12-17
申请人： Yosuke TAKEUCHI , Masamichi Matsuoka , Ryoji Matsuda
发明人： Yosuke TAKEUCHI , Masamichi Matsuoka , Ryoji Matsuda
IPC分类号： H01L29/82
CPC分类号： H01L43/08 , B82Y10/00 , B82Y25/00 , H01L27/228
摘要： To provide a semiconductor device capable of further suppressing the leakage of magnetic field in a magnetoresistive element and capable of further improving performance.There is provided a semiconductor device comprising a semiconductor substrate, a magnetoresistive element, a wire, barrier layers, and cladding layers. The semiconductor substrate has a main surface. The magnetoresistive element is located over the main surface of the semiconductor substrate. The wire is located over the magnetoresistive element. The barrier layers are arranged so as to continuously cover the side surface and the top surface of the wire. The cladding layers are arranged so as to continuously cover the surfaces of the barrier layers facing the wire and the surfaces on the opposite side. A plurality of memory units including the magnetoresistive element, the wire, the barrier layers, and the cladding layers is formed. The memory units are arranged in parallel in the direction intersecting with the direction in which the wire extends, and the cladding layers are separated between the memory units.
摘要翻译：提供能够进一步抑制磁阻元件中的磁场泄漏并能够进一步提高性能的半导体器件。提供了包括半导体衬底，磁阻元件，导线，阻挡层和包层的半导体器件。半导体衬底具有主表面。磁阻元件位于半导体衬底的主表面上方。导线位于磁阻元件上方。阻挡层被布置成连续地覆盖线的侧表面和顶表面。这些包覆层被布置成连续地覆盖面向导线的阻挡层的表面和相对侧的表面。形成包括磁阻元件，导线，阻挡层和包覆层的多个存储单元。存储单元在与线延伸的方向相交的方向上平行布置，并且包层在存储单元之间分离。

9. 发明授权

US07902539B2 Semiconductor device and method of manufacturing the same 失效
公开(公告)号：US07902539B2
公开(公告)日：2011-03-08
申请号：US12274740
申请日：2008-11-20
申请人： Masahiro Moniwa , Fumihiko Nitta , Masamichi Matsuoka , Satoshi Iida
发明人： Masahiro Moniwa , Fumihiko Nitta , Masamichi Matsuoka , Satoshi Iida
IPC分类号： H01L47/00
CPC分类号： H01L45/144 , G11C13/0004 , H01L27/2436 , H01L45/06 , H01L45/12 , H01L45/1233 , H01L45/1675 , H01L2924/0002 , H01L2924/00
摘要： Any of a plurality of contact plugs which reaches a diffusion layer serving as a drain layer of an MOS transistor has an end provided in contact with a lower surface of a thin insulating film provided selectively on an interlayer insulating film. A phase change film constituted by GST to be a chalcogenide compound based phase change material is provided on the thin insulating film, and an upper electrode is provided thereon. Any of the plurality of contact plugs which reaches the diffusion layer serving as a source layer has an end connected directly to an end of a contact plug penetrating an interlayer insulating film.

10. 发明申请

US20090140234A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：US20090140234A1
公开(公告)日：2009-06-04
申请号：US12274740
申请日：2008-11-20
申请人： Masahiro Moniwa , Fumihiko Nitta , Masamichi Matsuoka , Satoshi Iida
发明人： Masahiro Moniwa , Fumihiko Nitta , Masamichi Matsuoka , Satoshi Iida
IPC分类号： H01L47/00 , H01L21/44
CPC分类号： H01L45/144 , G11C13/0004 , H01L27/2436 , H01L45/06 , H01L45/12 , H01L45/1233 , H01L45/1675 , H01L2924/0002 , H01L2924/00
摘要： Any of a plurality of contact plugs which reaches a diffusion layer serving as a drain layer of an MOS transistor has an end provided in contact with a lower surface of a thin insulating film provided selectively on an interlayer insulating film. A phase change film constituted by GST to be a chalcogenide compound based phase change material is provided on the thin insulating film, and an upper electrode is provided thereon. Any of the plurality of contact plugs which reaches the diffusion layer serving as a source layer has an end connected directly to an end of a contact plug penetrating an interlayer insulating film.
摘要翻译：到达用作MOS晶体管的漏极层的扩散层的多个接触插塞中的任一个具有与选择性地设置在层间绝缘膜上的薄绝缘膜的下表面接触的端部。在该薄绝缘膜上设置由作为硫属化合物系的相变材料的由GST构成的相变膜，在其上设置上电极。到达用作源层的扩散层的多个接触插塞中的任何一个直接连接到穿过层间绝缘膜的接触插塞的端部的端部。

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