专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20120135096A1 RESIN MOLDING MACHINE 有权
标题翻译：树脂成型机
公开(公告)号：US20120135096A1
公开(公告)日：2012-05-31
申请号：US13303340
申请日：2011-11-23
申请人： Tetsuya MAEYAMA , Hidemichi KOBAYASHI , Shusaku TAGAMI , Yoshikazu MURAMATSU , Takayuki YAMAZAKI , Keiji KOYAMA , Hideaki NAKAZAWA , Hiroshi HARAYAMA , Kenji NISHIZAWA , Makoto KAWAGUCHI , Masahiko FUJISAWA , Hidetoshi OYA
发明人： Tetsuya MAEYAMA , Hidemichi KOBAYASHI , Shusaku TAGAMI , Yoshikazu MURAMATSU , Takayuki YAMAZAKI , Keiji KOYAMA , Hideaki NAKAZAWA , Hiroshi HARAYAMA , Kenji NISHIZAWA , Makoto KAWAGUCHI , Masahiko FUJISAWA , Hidetoshi OYA
IPC分类号： B29C31/04 , B29C43/58 , B29C43/18
CPC分类号： B29C43/18 , B29C31/008 , B29C31/042 , B29C35/02 , B29C37/001 , B29C45/1468 , B29C2043/181 , H01L21/565 , H01L2924/0002 , H01L2924/00
摘要： The compact resin molding machine is capable of efficiently performing a sequence of molding actions from feeding a work and resin to accommodating the molded work. The resin molding machine comprises: a work conveying mechanism including a robot, which has a robot hand for holding the work and which is capable of rotating and linearly moving; a work feeding section for feeding the work; a resin feeding section for feeding the resin; a press section including a molding die set, in which the work is resin-molded; a work accommodating section for accommodating the molded work; and a control section controlling the entire resin molding machine. The work feeding section, the resin feeding section, the press section and the work accommodating section are located to enclose a moving area of the robot of the work conveying mechanism.
摘要翻译：紧凑型树脂成形机能够有效地进行从工件和树脂的供给到容纳模制工件的成型动作的顺序。树脂成型机包括：工件输送机构，包括机器人，其具有用于保持工件并能够旋转和线性移动的机器人手; 一个喂养工作的工作喂养部分; 用于供给树脂的树脂供给部; 包括成型模具的压制部，其中所述工件被树脂模制; 用于容纳模制工件的工件容纳部分; 以及控制整个树脂成型机的控制部。工件供给部，树脂供给部，压力部和工件容纳部被定位成包围作业输送机构的机器人的移动区域。

2. 发明授权

US07884011B2 Semiconductor device and method of manufacture thereof 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US07884011B2
公开(公告)日：2011-02-08
申请号：US12721048
申请日：2010-03-10
申请人： Noboru Morimoto , Masahiko Fujisawa , Daisuke Kodama
发明人： Noboru Morimoto , Masahiko Fujisawa , Daisuke Kodama
IPC分类号： H01L21/4763
CPC分类号： H01L21/768 , H01L23/585 , H01L2924/0002 , H01L2924/00
摘要： A seal ring is provided between a region where a circuit is formed on a semiconductor substrate and a dicing region. The seal ring has a portion where sealing layers of which the cross sectional form is in T-shape are layered and a portion where sealing layers of which the cross sectional form is rectangular are layered.
摘要翻译：在半导体基板上形成电路的区域和切割区域之间设置有密封环。密封环具有其横截面形状为T形的密封层被层叠的部分和横截面形状为矩形的密封层的部分。

3. 发明授权

US06593217B1 Method of manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US06593217B1
公开(公告)日：2003-07-15
申请号：US09635901
申请日：2000-08-11
申请人： Masahiko Fujisawa
发明人： Masahiko Fujisawa
IPC分类号： H01L2120
CPC分类号： H01L21/28518 , H01L21/30604 , H01L21/3065 , H01L21/31116
摘要： A semiconductor device with low contact resistance which can cope with the miniaturization of semiconductor devices as well as a manufacturing method thereof which is easy and inexpensive can be obtained. Impurity regions on an Si substrate, an interlayer insulation film, source and drain interconnections, a metal silicide layer larger in diameter than the lower edge of the contact holes around the impurity regions are provided and the metal silicide layer includes an interface making up a border between the upper metal silicide layer contacting with the bottom of the interlayer insulation film and the lower metal silicide layer contacting with the impurity region surface. Thus, the contact area between the source and drain lines and the impurity regions can be increased via the metal silicide layer so as to reduce the contact resistance.
摘要翻译：可以获得能够应对半导体器件的小型化的具有低接触电阻的半导体器件及其制造方法，其容易且便宜。提供Si衬底上的杂质区域，层间绝缘膜，源极和漏极互连，直径大于杂质区周围的接触孔的下边缘的金属硅化物层，并且金属硅化物层包括构成边界的界面位于与层间绝缘膜的底部接触的上部金属硅化物层和与杂质区域表面接触的下部金属硅化物层之间。因此，可以通过金属硅化物层增加源极线和漏极线与杂质区之间的接触面积，从而降低接触电阻。

4. 发明授权

US06472700B2 Semiconductor device with isolation insulator, interlayer insulation film, and a sidewall coating film 失效
标题翻译：具有隔离绝缘体的半导体器件，层间绝缘膜和侧壁涂层膜
公开(公告)号：US06472700B2
公开(公告)日：2002-10-29
申请号：US09333653
申请日：1999-06-16
申请人： Kazutoshi Wakao , Akinobu Teramoto , Masahiko Fujisawa
发明人： Kazutoshi Wakao , Akinobu Teramoto , Masahiko Fujisawa
IPC分类号： H01L29792
CPC分类号： H01L27/10855 , H01L21/76897 , H01L21/823425 , H01L21/823475 , H01L21/823481 , H01L27/10814 , Y10S257/90
摘要： A semiconductor device capable of suppressing increase in the junction leakage current and preventing deterioration in the electric characteristics even when the device is miniaturized, and a method of manufacturing thereof are attained. The semiconductor device includes a semiconductor substrate, an isolation insulator, a gate electrode, a coating film, an interlayer insulation film, and a sidewall coating film. The semiconductor substrate has a main surface. The isolation insulator is formed at the main surface of the semiconductor substrate and isolates a conductive region. The gate electrode is formed in the conductive region. The coating film is formed on the isolation insulator, and it has a sidewall and a film thickness of at most that of the gate electrode. The interlayer insulation film is formed on the coating film. The sidewall coating film is formed on the sidewall of the coating film, and it includes a material having an etching rate different from that of the interlayer insulation film.
摘要翻译：一种能够抑制结漏电流的增加并且即使在器件小型化时也防止电特性劣化的半导体器件及其制造方法。半导体器件包括半导体衬底，隔离绝缘体，栅电极，涂膜，层间绝缘膜和侧壁涂覆膜。半导体衬底具有主表面。隔离绝缘体形成在半导体衬底的主表面并隔离导电区域。栅电极形成在导电区域中。该涂膜形成在隔离绝缘体上，并且其侧壁和至多为栅极电极的膜厚度。层间绝缘膜形成在涂膜上。侧壁涂膜形成在涂膜的侧壁上，并且其包括具有与层间绝缘膜的蚀刻速率不同的蚀刻速率的材料。

5. 发明授权

US08169080B2 Semiconductor device and method of manufacture thereof 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US08169080B2
公开(公告)日：2012-05-01
申请号：US12940419
申请日：2010-11-05
申请人： Noboru Morimoto , Masahiko Fujisawa , Daisuke Kodama
发明人： Noboru Morimoto , Masahiko Fujisawa , Daisuke Kodama
IPC分类号： H01L23/48
CPC分类号： H01L21/768 , H01L23/585 , H01L2924/0002 , H01L2924/00
摘要： A seal ring is provided between a region where a circuit is formed on a semiconductor substrate and a dicing region. The seal ring has a portion where sealing layers of which the cross sectional form is in T-shape are layered and a portion where sealing layers of which the cross sectional form is rectangular are layered.
摘要翻译：在半导体基板上形成电路的区域和切割区域之间设置有密封环。密封环具有其横截面形状为T形的密封层被层叠的部分和横截面形状为矩形的密封层的部分。

6. 发明申请

US20070090447A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURE THEREOF 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：US20070090447A1
公开(公告)日：2007-04-26
申请号：US11551042
申请日：2006-10-19
申请人： Noboru MORIMOTO , Masahiko Fujisawa , Daisuke Kodama
发明人： Noboru MORIMOTO , Masahiko Fujisawa , Daisuke Kodama
IPC分类号： H01L29/788
CPC分类号： H01L21/768 , H01L23/585 , H01L2924/0002 , H01L2924/00
摘要： A seal ring is provided between a region where a circuit is formed on a semiconductor substrate and a dicing region. The seal ring has a portion where sealing layers of which the cross sectional form is in T-shape are layered and a portion where sealing layers of which the cross sectional form is rectangular are layered.
摘要翻译：在半导体基板上形成电路的区域和切割区域之间设置有密封环。密封环具有其横截面形状为T形的密封层被层叠的部分和横截面形状为矩形的密封层的部分。

7. 发明授权

US5565708A Semiconductor device comprising composite barrier layer 失效
标题翻译：包括复合阻挡层的半导体器件
公开(公告)号：US5565708A
公开(公告)日：1996-10-15
申请号：US440808
申请日：1995-05-15
申请人： Akihiko Ohsaki , Sumio Yamaguchi , Atsushi Ishii , Kazuyoshi Maekawa , Masahiko Fujisawa
发明人： Akihiko Ohsaki , Sumio Yamaguchi , Atsushi Ishii , Kazuyoshi Maekawa , Masahiko Fujisawa
IPC分类号： H01L21/28 , C23C14/06 , C23C14/18 , C23C14/58 , H01L21/203 , H01L21/205 , H01L21/285 , H01L21/768 , H01L23/485 , H01L23/522 , H01L23/532 , H01L23/48 , H01L29/46 , H01L29/54 , H01L29/62
CPC分类号： C23C14/5806 , C23C14/0641 , C23C14/185 , H01L21/28518 , H01L21/76843 , H01L21/76846 , H01L21/76855 , H01L21/76856 , H01L23/485 , H01L23/53257 , H01L2924/0002 , Y10S257/915
摘要： A semiconductor device comprising conductors electrically connected through a contact hole interlayer insulation layer with a trilayer barrier layer comprising a titanium silicide layer, titanium silicide layer formed on the titanium silicide by collimation sputtering, and a thermally nitrided titanium formed on the titanium nitride layer. The use of a trilayer barrier layer enables through the capacity of the collimation sputtering apparatus to be increased, prevents particles from occurring, and formation of a low resistance electrical connection between conductors, in addition to preventing diffusion from the titanium nitride layer and the second titanium layer to the thermally nitrided titanium layer, and between conductors.
摘要翻译：一种半导体器件，包括通过接触孔层间绝缘层与通过准直溅射形成在硅化钛上的钛硅化物层，硅化钛层和形成在氮化钛层上的热氮化钛的三层势垒层电连接的导体。除了防止从氮化钛层和第二钛的扩散之外，使用三层阻挡层能够增加准直溅射装置的容量，防止颗粒发生，以及形成导体之间的低电阻电连接层到热氮化钛层和导体之间。

8. 发明申请

US20110101530A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURE THEREOF 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：US20110101530A1
公开(公告)日：2011-05-05
申请号：US12940419
申请日：2010-11-05
申请人： Noboru MORIMOTO , Masahiko Fujisawa , Daisuke Kodama
发明人： Noboru MORIMOTO , Masahiko Fujisawa , Daisuke Kodama
IPC分类号： H01L23/532
CPC分类号： H01L21/768 , H01L23/585 , H01L2924/0002 , H01L2924/00
摘要： A seal ring is provided between a region where a circuit is formed on a semiconductor substrate and a dicing region. The seal ring has a portion where sealing layers of which the cross sectional form is in T-shape are layered and a portion where sealing layers of which the cross sectional form is rectangular are layered.
摘要翻译：在半导体基板上形成电路的区域和切割区域之间设置有密封环。密封环具有其横截面形状为T形的密封层被层叠的部分和横截面形状为矩形的密封层的部分。

9. 发明授权

US07906848B2 Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：US07906848B2
公开(公告)日：2011-03-15
申请号：US12389071
申请日：2009-02-19
申请人： Yukihiro Kumagai , Hiroyuki Ohta , Naotaka Tanaka , Masahiko Fujisawa , Akihiko Ohsaki
发明人： Yukihiro Kumagai , Hiroyuki Ohta , Naotaka Tanaka , Masahiko Fujisawa , Akihiko Ohsaki
IPC分类号： H01L21/31 , H01L21/469
CPC分类号： H01L23/53238 , H01L23/3128 , H01L23/53295 , H01L23/585 , H01L24/45 , H01L24/48 , H01L2224/16225 , H01L2224/16227 , H01L2224/32225 , H01L2224/45124 , H01L2224/45147 , H01L2224/48091 , H01L2224/48227 , H01L2224/48247 , H01L2224/73204 , H01L2924/00014 , H01L2924/01015 , H01L2924/12041 , H01L2924/15311 , H01L2924/181 , H01L2924/00 , H01L2924/00015 , H01L2924/00012 , H01L2224/0401
摘要： In a semiconductor device having a Low-k film as an interlayer insulator, peeling of the interlayer insulator in a thermal cycle test is prevented, thereby providing a highly reliable semiconductor device. In a semiconductor device having a structure in which interlayer insulators in which buried wires each having a main electric conductive layer made of copper are formed and cap insulators of the buried wires are stacked, the cap insulator having a relatively high Young's modulus and contacting by its upper surface with the interlayer insulator made of a Low-k film having a relatively low Young's modulus is formed so as not to be provided in an edge portion of the semiconductor device.
摘要翻译：在具有Low-k膜作为层间绝缘体的半导体器件中，防止了热循环试验中的层间绝缘体的剥离，从而提供高可靠性的半导体器件。在具有这样的结构的半导体器件中，其中形成有由铜制成的主导电层的埋入布线和层叠埋入导线的帽绝缘体的层间绝缘体，所述盖绝缘体具有较高的杨氏模量并且通过其接触形成具有相对低的杨氏模量的由Low-k膜制成的层间绝缘体的上表面，以便不设置在半导体器件的边缘部分中。

10. 发明申请

US20100167525A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURE THEREOF 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：US20100167525A1
公开(公告)日：2010-07-01
申请号：US12721048
申请日：2010-03-10
申请人： Noboru Morimoto , Masahiko Fujisawa , Daisuke Kodama
发明人： Noboru Morimoto , Masahiko Fujisawa , Daisuke Kodama
IPC分类号： H01L21/768
CPC分类号： H01L21/768 , H01L23/585 , H01L2924/0002 , H01L2924/00
摘要： A seal ring is provided between a region where a circuit is formed on a semiconductor substrate and a dicing region. The seal ring has a portion where sealing layers of which the cross sectional form is in T-shape are layered and a portion where sealing layers of which the cross sectional form is rectangular are layered.
摘要翻译：在半导体基板上形成电路的区域和切割区域之间设置有密封环。密封环具有其横截面形状为T形的密封层被层叠的部分和横截面形状为矩形的密封层的部分。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式