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1. 发明授权

US08551821B2 Enhancement normally off nitride semiconductor device manufacturing the same 有权
标题翻译：增强通常关闭氮化物半导体器件制造相同
公开(公告)号：US08551821B2
公开(公告)日：2013-10-08
申请号：US12960499
申请日：2010-12-04
申请人： Jung Hee Lee , Ki Sik Im , Jong Bong Ha
发明人： Jung Hee Lee , Ki Sik Im , Jong Bong Ha
IPC分类号： H01L21/335 , H01L21/8232 , H01L21/339 , H01L21/00 , H01L21/84
CPC分类号： H01L29/7787 , H01L29/1033 , H01L29/2003 , H01L29/517 , H01L29/66462
摘要： The present invention relates to an enhancement normally off nitride semiconductor device and a method of manufacturing the same. The method includes the steps of: forming a buffer layer on a substrate; forming a first nitride semiconductor layer on the buffer layer; forming a second nitride semiconductor layer on the first nitride semiconductor layer; etching a gate region above the second nitride semiconductor layer up to a predetermined depth of the first nitride semiconductor layer; forming an insulating film on the etched region and the second nitride semiconductor layer; patterning a source/drain region, etching the insulating film in the source/drain region, and forming electrodes in the source/drain region; and forming a gate electrode on the insulating film in the gate region. In this manner, the present invention provides a method of easily implementing a normally off enhancement semiconductor device by originally blocking 2DEG which is generated under a gate region. In addition, the present invention provides an enhancement normally off power semiconductor device with a simple and efficient driving circuit in a HEMT device.
摘要翻译：本发明涉及一种增强常关氮化物半导体器件及其制造方法。该方法包括以下步骤：在衬底上形成缓冲层; 在所述缓冲层上形成第一氮化物半导体层; 在所述第一氮化物半导体层上形成第二氮化物半导体层; 将第二氮化物半导体层上方的栅极区域蚀刻到第一氮化物半导体层的预定深度; 在蚀刻区域和第二氮化物半导体层上形成绝缘膜; 图案化源极/漏极区域，蚀刻源极/漏极区域中的绝缘膜，以及在源极/漏极区域中形成电极; 以及在栅极区域的绝缘膜上形成栅电极。以这种方式，本发明提供了一种通过最初阻挡在栅极区域下产生的2DEG来容易地实现常关的增强型半导体器件的方法。此外，本发明提供了一种在HEMT装置中具有简单有效的驱动电路的增强型常关功率半导体器件。

2. 发明申请

US20130034939A1 METHOD OF MANUFACTURING POWER DEVICE 有权
标题翻译：制造电源装置的方法
公开(公告)号：US20130034939A1
公开(公告)日：2013-02-07
申请号：US13550920
申请日：2012-07-17
申请人： Jae Hoon LEE , Ki Se KIM , Jung Hee LEE , Ki Sik IM , Dong Seok KIM
发明人： Jae Hoon LEE , Ki Se KIM , Jung Hee LEE , Ki Sik IM , Dong Seok KIM
IPC分类号： H01L21/336
CPC分类号： H01L29/7813 , H01L29/0634 , H01L29/0878 , H01L29/2003
摘要： A method of manufacturing a power device includes forming a first drift region on a substrate. A trench is formed by patterning the first drift region. A second drift region is formed by growing n-gallium nitride (GaN) in the trench, and alternately disposing the first drift region and the second drift region. A source electrode contact layer is formed on the second drift region. A source electrode and a gate electrode are formed on the source electrode contact layer. A drain electrode is formed on one side of the substrate which is an opposite side of the first drift region.
摘要翻译：制造功率器件的方法包括在衬底上形成第一漂移区。通过图案化第一漂移区域形成沟槽。通过在沟槽中生长氮化镓（GaN）并且交替地设置第一漂移区和第二漂移区，形成第二漂移区。源电极接触层形成在第二漂移区上。在源电极接触层上形成源电极和栅电极。在基板的与第一漂移区域相反的一侧上形成漏电极。

3. 发明申请

US20120088341A1 Methods Of Manufacturing High Electron Mobility Transistors 审中-公开
标题翻译：制造高电子迁移率晶体管的方法
公开(公告)号：US20120088341A1
公开(公告)日：2012-04-12
申请号：US13178902
申请日：2011-07-08
申请人： Hyuk-soon Choi , Jung-hee Lee , Jai-kwang Shin , Jae-joon Oh , Jong-bong Ha , Jong-seob Kim , In-jun Hwang , Ki-ha Hong , Ki-sik Im , Ki-won Kim , Dong-seok Kim
发明人： Hyuk-soon Choi , Jung-hee Lee , Jai-kwang Shin , Jae-joon Oh , Jong-bong Ha , Jong-seob Kim , In-jun Hwang , Ki-ha Hong , Ki-sik Im , Ki-won Kim , Dong-seok Kim
IPC分类号： H01L21/338
CPC分类号： H01L29/66462 , H01L21/0254 , H01L21/76237 , H01L29/0847 , H01L29/2003 , H01L29/201 , H01L29/205 , H01L29/207 , H01L29/4236 , H01L29/7787
摘要： The methods may include forming a first material layer on a substrate, increasing electric resistance of the first material layer, and forming a source pattern and a drain pattern, which are spaced apart from each other, on the first material layer, a band gap of the source and drain patterns greater than a band gap of a first material layer.
摘要翻译：所述方法可以包括在衬底上形成第一材料层，增加第一材料层的电阻，以及在第一材料层上形成彼此间隔开的源图案和漏极图案，带隙为源极和漏极图案大于第一材料层的带隙。

4. 发明授权

US07935551B2 Image sensor and method for manufacturing the same 有权
标题翻译：图像传感器及其制造方法
公开(公告)号：US07935551B2
公开(公告)日：2011-05-03
申请号：US11998606
申请日：2007-11-30
申请人： Ki Sik Im , Woo Seok Hyun
发明人： Ki Sik Im , Woo Seok Hyun
IPC分类号： H01L21/00 , H01L31/0232 , H01L31/00 , H01L27/146
CPC分类号： H01L27/14687 , H01L27/14609 , H01L27/14621 , H01L27/14627
摘要： A method for manufacturing a sensor image may include forming a pixel array including a photodiode structure and an insulating film structure in an active area of a semiconductor substrate; forming a metal pad on the insulating film structure; forming a dielectric and/or etch stop film on the metal pad (and optionally over the pixel array); forming a protective layer on the dielectric and/or etch stop film; and forming a pad opening and a pixel opening by etching the protective layer.
摘要翻译：用于制造传感器图像的方法可以包括在半导体衬底的有源区域中形成包括光电二极管结构和绝缘膜结构的像素阵列; 在绝缘膜结构上形成金属焊盘; 在金属焊盘上（并且可选地在像素阵列上）形成介电和/或蚀刻停止膜; 在介电和/或蚀刻停止膜上形成保护层; 以及通过蚀刻保护层形成衬垫开口和像素开口。

5. 发明申请

US20100133421A1 Complementary Metal Oxide Silicon Image Sensor and Method of Fabricating the Same 失效
标题翻译：互补金属氧化物硅图像传感器及其制造方法
公开(公告)号：US20100133421A1
公开(公告)日：2010-06-03
申请号：US12696575
申请日：2010-01-29
申请人： Ki Sik IM
发明人： Ki Sik IM
IPC分类号： H01L31/0232
CPC分类号： H01L27/14625 , H01L27/14621 , H01L27/14627 , H01L27/14632 , H01L27/14685 , H01L27/14687
摘要： Disclosed is a method of fabricating a CMOS (Complementary Metal Oxide Silicon) image sensor. The method includes the steps of: forming a device protective layer and a metal interconnection on a substrate formed with a light receiving device; forming an inner micro-lens on the metal interconnection; coating an interlayer dielectric layer on the inner micro-lens and then forming a color filter; and forming an outer micro-lens including a planarization layer and photoresist on the color filter. The inner micro-lens is formed by depositing the outer layer on dome-shaped photoresist. The curvature radius of the inner micro-lens is precisely and uniformly maintained and the inner micro-lens is easily formed while improving the light efficiency. Since the fabrication process for the CMOS image sensor is simplified, the product yield is improved and the manufacturing cost is reduced.
摘要翻译：公开了制造CMOS（互补金属氧化物硅）图像传感器的方法。该方法包括以下步骤：在由光接收装置形成的基板上形成器件保护层和金属互连; 在金属互连上形成内部微透镜; 在内部微透镜上涂覆层间电介质层，然后形成滤色器; 以及在所述滤色器上形成包括平坦化层和光致抗蚀剂的外部微透镜。内部微透镜通过将外层沉积在圆顶状光致抗蚀剂上而形成。内部微透镜的曲率半径被精确均匀地保持，并且在提高光效率的同时容易地形成内部微透镜。由于CMOS图像传感器的制造工艺简化，所以提高了产品成品率，降低了制造成本。

6. 发明授权

US07973347B2 Complementary metal oxide silicon image sensor and method of fabricating the same 失效
标题翻译：互补金属氧化物硅图像传感器及其制造方法
公开(公告)号：US07973347B2
公开(公告)日：2011-07-05
申请号：US12696575
申请日：2010-01-29
申请人： Ki Sik Im
发明人： Ki Sik Im
IPC分类号： H01L31/062
CPC分类号： H01L27/14625 , H01L27/14621 , H01L27/14627 , H01L27/14632 , H01L27/14685 , H01L27/14687
摘要： Disclosed is a method of fabricating a CMOS (Complementary Metal Oxide Silicon) image sensor. The method includes the steps of: forming a device protective layer and a metal interconnection on a substrate formed with a light receiving device; forming an inner micro-lens on the metal interconnection; coating an interlayer dielectric layer on the inner micro-lens and then forming a color filter; and forming an outer micro-lens including a planarization layer and photoresist on the color filter. The inner micro-lens is formed by depositing the outer layer on dome-shaped photoresist. The curvature radius of the inner micro-lens is precisely and uniformly maintained and the inner micro-lens is easily formed while improving the light efficiency. Since the fabrication process for the CMOS image sensor is simplified, the product yield is improved and the manufacturing cost is reduced.
摘要翻译：公开了制造CMOS（互补金属氧化物硅）图像传感器的方法。该方法包括以下步骤：在由光接收装置形成的基板上形成器件保护层和金属互连; 在金属互连上形成内部微透镜; 在内部微透镜上涂覆层间电介质层，然后形成滤色器; 以及在所述滤色器上形成包括平坦化层和光致抗蚀剂的外部微透镜。内部微透镜通过将外层沉积在圆顶状光致抗蚀剂上而形成。内部微透镜的曲率半径被精确均匀地保持，并且在提高光效率的同时容易地形成内部微透镜。由于CMOS图像传感器的制造工艺简化，所以提高了产品成品率，降低了制造成本。

7. 发明申请

US20080164499A1 METHOD OF MANUFACTURING CMOS IMAGE SENSOR 审中-公开
标题翻译：制造CMOS图像传感器的方法
公开(公告)号：US20080164499A1
公开(公告)日：2008-07-10
申请号：US11963488
申请日：2007-12-21
申请人： Ki-Sik Im , Woo Seok Hyun
发明人： Ki-Sik Im , Woo Seok Hyun
IPC分类号： H01L31/0232 , H01L21/308
CPC分类号： H01L27/14687 , H01L27/14636 , H01L27/14685
摘要： A method of a CMOS image sensor is disclosed. A method of manufacturing a CMOS image sensor includes forming an epi layer formed over a semiconductor substrate including a pixel region and a peripheral region. At least one oxide film may be formed over the epi layer, including the peripheral region and an upper pad formed therein. A nitride film may be formed over the oxide film. A primary array etching process may be performed with respect to the nitride film using a first photoresist pattern for opening a main pixel region in the pixel region. A secondary array etching process may be performed with respect to the nitride film and the oxide film using a second photoresist pattern for opening the upper pad. The oxide film of the pixel region may be obliquely removed to a predetermined depth. A plurality of color filters and a plurality of micro lenses may be formed over the pixel region after the secondary array etching process.
摘要翻译：公开了一种CMOS图像传感器的方法。制造CMOS图像传感器的方法包括形成在包括像素区域和周边区域的半导体衬底上形成的外延层。可以在外延层上形成至少一个氧化物膜，包括周边区域和形成在其中的上焊盘。可以在氧化物膜上形成氮化物膜。可以使用用于打开像素区域中的主像素区域的第一光致抗蚀剂图案来对氮化物膜执行初级阵列蚀刻工艺。可以使用用于打开上垫的第二光致抗蚀剂图案来对氮化物膜和氧化膜执行二次阵列蚀刻工艺。可以将像素区域的氧化物膜倾斜地去除到预定深度。在二次阵列蚀刻处理之后，可以在像素区域上形成多个滤色器和多个微透镜。

8. 发明申请

US20080150060A1 Image sensor and method for manufacturing the same 有权
标题翻译：图像传感器及其制造方法
公开(公告)号：US20080150060A1
公开(公告)日：2008-06-26
申请号：US11998606
申请日：2007-11-30
申请人： Ki Sik Im , Woo Seok Hyun
发明人： Ki Sik Im , Woo Seok Hyun
IPC分类号： H01L31/00 , H01L21/02
CPC分类号： H01L27/14687 , H01L27/14609 , H01L27/14621 , H01L27/14627
摘要： A method for manufacturing a sensor image may include forming a pixel array including a photodiode structure and an insulating film structure in an active area of a semiconductor substrate; forming a metal pad on the insulating film structure; forming a dielectric and/or etch stop film on the metal pad (and optionally over the pixel array); forming a protective layer on the dielectric and/or etch stop film; and forming a pad opening and a pixel opening by etching the protective layer.
摘要翻译：用于制造传感器图像的方法可以包括在半导体衬底的有源区域中形成包括光电二极管结构和绝缘膜结构的像素阵列; 在绝缘膜结构上形成金属焊盘; 在金属焊盘上（并且可选地在像素阵列上）形成介电和/或蚀刻停止膜; 在介电和/或蚀刻停止膜上形成保护层; 以及通过蚀刻保护层形成衬垫开口和像素开口。

9. 发明申请

US20110140121A1 ENHANCEMENT NORMALLY OFF NITRIDE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：氮化硅半导体器件的增强正常关闭及其制造方法
公开(公告)号：US20110140121A1
公开(公告)日：2011-06-16
申请号：US12960499
申请日：2010-12-04
申请人： JUNG HEE LEE , Ki Sik Im , Jong Bong Ha
发明人： JUNG HEE LEE , Ki Sik Im , Jong Bong Ha
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/7787 , H01L29/1033 , H01L29/2003 , H01L29/517 , H01L29/66462
摘要： The present invention relates to an enhancement normally off nitride semiconductor device and a method of manufacturing the same. The method includes the steps of: forming a buffer layer on a substrate; forming a first nitride semiconductor layer on the buffer layer; forming a second nitride semiconductor layer on the first nitride semiconductor layer; etching a gate region above the second nitride semiconductor layer up to a predetermined depth of the first nitride semiconductor layer; forming an insulating film on the etched region and the second nitride semiconductor layer; patterning a source/drain region, etching the insulating film in the source/drain region, and forming electrodes in the source/drain region; and forming a gate electrode on the insulating film in the gate region. In this manner, the present invention provides a method of easily implementing a normally off enhancement semiconductor device by originally blocking 2DEG which is generated under a gate region. In addition, the present invention provides an enhancement normally off power semiconductor device with a simple and efficient driving circuit in a HEMT device.
摘要翻译：本发明涉及一种增强常关氮化物半导体器件及其制造方法。该方法包括以下步骤：在衬底上形成缓冲层; 在所述缓冲层上形成第一氮化物半导体层; 在所述第一氮化物半导体层上形成第二氮化物半导体层; 将第二氮化物半导体层上方的栅极区域蚀刻到第一氮化物半导体层的预定深度; 在蚀刻区域和第二氮化物半导体层上形成绝缘膜; 图案化源极/漏极区域，蚀刻源极/漏极区域中的绝缘膜，以及在源极/漏极区域中形成电极; 以及在栅极区域的绝缘膜上形成栅电极。以这种方式，本发明提供了一种通过最初阻挡在栅极区域下产生的2DEG来容易地实现常关的增强型半导体器件的方法。此外，本发明提供了一种在HEMT装置中具有简单有效的驱动电路的增强型常关功率半导体器件。

10. 发明授权

US08815688B2 Method of manufacturing power device 有权
标题翻译：功率器件制造方法
公开(公告)号：US08815688B2
公开(公告)日：2014-08-26
申请号：US13550920
申请日：2012-07-17
申请人： Jae Hoon Lee , Ki Se Kim , Jung Hee Lee , Ki Sik Im , Dong Seok Kim
发明人： Jae Hoon Lee , Ki Se Kim , Jung Hee Lee , Ki Sik Im , Dong Seok Kim
IPC分类号： H01L29/778
CPC分类号： H01L29/7813 , H01L29/0634 , H01L29/0878 , H01L29/2003
摘要： A method of manufacturing a power device includes forming a first drift region on a substrate. A trench is formed by patterning the first drift region. A second drift region is formed by growing n-gallium nitride (GaN) in the trench, and alternately disposing the first drift region and the second drift region. A source electrode contact layer is formed on the second drift region. A source electrode and a gate electrode are formed on the source electrode contact layer. A drain electrode is formed on one side of the substrate which is an opposite side of the first drift region.
摘要翻译：制造功率器件的方法包括在衬底上形成第一漂移区。通过图案化第一漂移区域形成沟槽。通过在沟槽中生长氮化镓（GaN）并且交替地设置第一漂移区和第二漂移区，形成第二漂移区。源电极接触层形成在第二漂移区上。在源电极接触层上形成源电极和栅电极。在基板的与第一漂移区域相反的一侧上形成漏电极。

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