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1. 发明申请

US20110083116A1 POWER SWITCH DESIGN METHOD AND PROGRAM 有权
标题翻译：电源开关设计方法与程序
公开(公告)号：US20110083116A1
公开(公告)日：2011-04-07
申请号：US12994508
申请日：2009-05-25
申请人： Jose de Jesus Pineda de Gyvez , Rinze Ida Mechtildis Peter Rinze , Cas Groot
发明人： Jose de Jesus Pineda de Gyvez , Rinze Ida Mechtildis Peter Rinze , Cas Groot
IPC分类号： G06F17/50
CPC分类号： G06F17/5072
摘要： A method of designing a power switch block (200) for an integrated circuit layout in a predefined integrated circuit technology is disclosed. The power switch block (200) includes a segment (710) comprising a plurality of spaced parallel conductors (110, 120, 130, 140) each having a predefined height in said technology, a stack of a first power switch (115) of a first conductivity type and a pair of drivers (152; 154) for respectively driving the first power switch (115) and a second power switch (135), said drivers having predefined dimensions in said technology, and the second switch (135) of a second conductivity type. The method comprises providing respective predefined width/length ratios for said power switches (115; 135); determining a total height of the segment (710) from the sum of the predefined heights of the individual conductors (110; 120; 130; 140) and respective spacings (310; 320) between said individual conductors, determining the height of the first transistor (115) from the difference between the total height and the predefined driver height; determining the width of the first transistor (115) from the combined predefined widths of the pair of drivers (152; 154); optimizing the first power switch layout within its determined height and width based on its predefined width/length ratio; and optimizing the second power switch layout based on its predefined width/height ratio.
摘要翻译：公开了一种在预定义的集成电路技术中设计用于集成电路布局的功率开关块（200）的方法。功率开关块（200）包括一个段（710），其包括多个间隔开的平行导体（110,120,130,140），每个导体在所述技术中具有预定高度，第一电源开关（115）第一导电类型和用于分别驱动第一电力开关（115）和第二电力开关（135）的一对驱动器（152; 154），所述驱动器在所述技术中具有预定尺寸，并且第二开关（135）第二导电类型。该方法包括为所述功率开关（115; 135）提供相应的预定宽度/长度比; 从各个导体（110; 120; 130; 140）的预定高度和各个导体之间的相应间隔（310; 320）的总和确定段（710）的总高度，确定第一晶体管（115）从总高度和预定义的驾驶员高度之间的差异; 从所述一对驱动器（152; 154）的组合的预定宽度确定所述第一晶体管（115）的宽度; 基于其预定的宽度/长度比，在其确定的高度和宽度内优化第一功率开关布局; 并基于其预定义的宽/高比优化第二功率开关布局。

2. 发明授权

US07671618B2 Analog IC having test arrangement and test method for such an IC 有权
标题翻译：具有这种IC的测试布置和测试方法的模拟IC
公开(公告)号：US07671618B2
公开(公告)日：2010-03-02
申请号：US12091026
申请日：2006-10-20
申请人： Amir Zjajo , Hendrik J Bergveld , Rodger F Schuttert , Jose De Jesus Pineda De Gyvez
发明人： Amir Zjajo , Hendrik J Bergveld , Rodger F Schuttert , Jose De Jesus Pineda De Gyvez
IPC分类号： G01R31/26
CPC分类号： G01R31/3167 , G01R31/31721 , G01R31/318536 , G01R31/318575
摘要： An integrated circuit (IC) comprises a plurality of analog stages (10a-c), each of the analog stages being conductively coupled to a power supply (20; 20a-c), and being conductively coupled to each other by a signal path (12); and a test arrangement for testing the plurality of analog stages, the test arrangement comprising input means such as an analog bus (40) coupled to a signal path input of each analog stage from the plurality of analog stages, output means such as a further analog bus (50) for communicating a test result to an output of the integrated circuit, switching means such as a plurality of switches (36) in the biasing infrastructure of the IC for selectively disabling an analog stage, and control means such a shift register (60) for controlling the switching means. Consequently, the analog stages of the IC can be tested and debugged in isolation without the need for switches in the signal path through the cores. A current sensor (70) may be present in the power supply to facilitate structural testing of the analog stages in isolation.
摘要翻译：集成电路（IC）包括多个模拟级（10a-c），每个模拟级与电源（20; 20a-c）导电耦合，并且通过信号路径彼此导电耦合 12）; 以及用于测试所述多个模拟级的测试装置，所述测试装置包括输入装置，例如耦合到来自所述多个模拟级的每个模拟级的信号路径输入的模拟总线（40），输出装置用于将测试结果传送到集成电路的输出的总线（50），用于选择性地禁用模拟级的IC的偏置基础设施中的多个开关（36）等开关装置，以及诸如移位寄存器 60），用于控制切换装置。因此，IC的模拟级可以隔离测试和调试，而不需要通过核的信号路径中的开关。电流传感器（70）可以存在于电源中以便于隔离地对模拟级的结构测试。

3. 发明申请

US20090134904A1 ANALOG IC HAVING TEST ARRANGEMENT AND TEST METHOD FOR SUCH AN IC 有权
标题翻译：具有这种IC的测试布置和测试方法的模拟IC
公开(公告)号：US20090134904A1
公开(公告)日：2009-05-28
申请号：US12091026
申请日：2006-10-20
申请人： Amir Zjajo , Hendrik J. Bergveld , Rodger F. Schuttert , Jose De Jesus Pineda De Gyvez
发明人： Amir Zjajo , Hendrik J. Bergveld , Rodger F. Schuttert , Jose De Jesus Pineda De Gyvez
IPC分类号： G01R31/26
CPC分类号： G01R31/3167 , G01R31/31721 , G01R31/318536 , G01R31/318575
摘要： An integrated circuit (IC) comprises a plurality of analog stages (10a-c), each of the analog stages being conductively coupled to a power supply (20; 20a-c), and being conductively coupled to each other by a signal path (12); and a test arrangement for testing the plurality of analog stages, the test arrangement comprising input means such as an analog bus (40) coupled to a signal path input of each analog stage from the plurality of analog stages, output means such as a further analog bus (50) for communicating a test result to an output of the integrated circuit, switching means such as a plurality of switches (36) in the biasing infrastructure of the IC for selectively disabling an analog stage, and control means such a shift register (60) for controlling the switching means. Consequently, the analog stages of the IC can be tested and debugged in isolation without the need for switches in the signal path through the cores. A current sensor (70) may be present in the power supply to facilitate structural testing of the analog stages in isolation.
摘要翻译：集成电路（IC）包括多个模拟级（10a-c），每个模拟级与电源（20; 20a-c）导电耦合，并且通过信号路径彼此导电耦合 12）; 以及用于测试所述多个模拟级的测试装置，所述测试装置包括输入装置，例如耦合到来自所述多个模拟级的每个模拟级的信号路径输入的模拟总线（40），输出装置用于将测试结果传送到集成电路的输出的总线（50），用于选择性地禁用模拟级的IC的偏置基础设施中的多个开关（36）等开关装置，以及诸如移位寄存器 60），用于控制切换装置。因此，IC的模拟级可以隔离测试和调试，而不需要通过核心的信号路径中的开关。电流传感器（70）可以存在于电源中以便于隔离地对模拟级的结构测试。

4. 发明授权

US07886259B2 Method and circuit arrangement for determining power supply noise 有权
标题翻译：用于确定电源噪声的方法和电路布置
公开(公告)号：US07886259B2
公开(公告)日：2011-02-08
申请号：US10546395
申请日：2004-02-12
申请人： Josep Rius Vazquez , Jose De Jesus Pineda De Gyvez
发明人： Josep Rius Vazquez , Jose De Jesus Pineda De Gyvez
IPC分类号： G06F9/45 , G06F17/50
CPC分类号： G06F17/5022 , G06F17/5036
摘要： The present invention relates to a method and circuit arrangement for determining power supply noise of a power distribution network. The power supply noise is determined by measuring the propagation delay of a delay circuit powered by the power distribution network, wherein the result of the measuring step is used as an indicator of the power supply noise. Thereby, a real-time power supply noise monitoring can be carried out at any point of a power distribution network of an observed circuitry.
摘要翻译：本发明涉及一种用于确定配电网络的电源噪声的方法和电路装置。通过测量由配电网供电的延迟电路的传播延迟来确定电源噪声，其中测量步骤的结果用作电源噪声的指标。因此，可以在观察电路的配电网络的任何点处执行实时电源噪声监测。

5. 发明申请

US20100013493A1 TEST PREPARED INTEGRATED CIRCUIT WITH AN INTERNAL POWER SUPPLY DOMAIN 有权
标题翻译：用内部电源域测试准备的集成电路
公开(公告)号：US20100013493A1
公开(公告)日：2010-01-21
申请号：US11911732
申请日：2006-04-13
申请人： Rinze I. M. P. Meijer , Goel Sandeepkumar , Jose De Jesus Pineda De Gyvez
发明人： Rinze I. M. P. Meijer , Goel Sandeepkumar , Jose De Jesus Pineda De Gyvez
IPC分类号： G01R31/3185
CPC分类号： G01R31/31721 , G01R31/318533
摘要： The integrated circuit (10) has an internal power supply domain with a power supply voltage adaptation circuit (14) to adapt the power supply voltage in the power supply domain. Typically, a plurality of such domains is provided wherein the power supply voltage can be adapted independently. During testing an internal power supply voltage is supplied to a temporally integrating analog to digital conversion circuit (16) in the integrating circuit (10). A temporally integrated value of the power supply voltage is measured during a measurement period. Preferably, integrating measurements of a plurality of internal supply voltages are performed in parallel during the same measurement time interval. Preferably a further test is performed by changing over between mutually different supply voltages during a further measurement period. In this way the measured integrated supply voltage can be used to check the speed of the change over between the different voltages.
摘要翻译：集成电路（10）具有内部电源域，其具有电源电压适配电路（14），以适应供电域中的电源电压。通常，提供多个这样的域，其中可以独立地适配电源电压。在测试期间，内部电源电压被提供给积分电路（10）中的时间积分模数转换电路（16）。在测量期间测量电源电压的时间积分值。优选地，在相同的测量时间间隔期间并行地执行多个内部电源电压的积分测量。优选地，在另外的测量周期期间通过在相互不同的电源电压之间切换来执行另外的测试。以这种方式，可以使用测量的集成电源电压来检查不同电压之间的转换速度。

6. 发明授权

US07500204B2 Real-time adaptive control for best IC performance 有权
标题翻译：实时自适应控制，实现最佳的IC性能
公开(公告)号：US07500204B2
公开(公告)日：2009-03-03
申请号：US10559208
申请日：2004-05-28
申请人： Jose De Jesus Pineda De Gyvez , Francesco Pessolano , Rinze Ida Mechitildis Peter Meijer , Josep Rius Vazquez , Kiran Batni Raghavendra Rao
发明人： Jose De Jesus Pineda De Gyvez , Francesco Pessolano , Rinze Ida Mechitildis Peter Meijer , Josep Rius Vazquez , Kiran Batni Raghavendra Rao
IPC分类号： G06F17/50 , G06F1/00
CPC分类号： G06F1/324 , G06F1/3203 , G06F1/3296 , Y02D10/126 , Y02D10/172
摘要： The present invention relates to real-time adaptive control for best Integrated Circuit (IC) performance. The adaptive behavior is carried out on a local basis. The system is partitioned into different islands (30). Each island (30) is controlled and its working conditions are modified depending on some parameters. The remainder of the chip is controlled as well, depending on other parameters. This requires that each island (30) has a local controller (36) communicating with a global controller (42). The main control parameters are e.g. supply voltage, threshold voltage and clock frequency.
摘要翻译：本发明涉及用于最佳集成电路（IC）性能的实时自适应控制。适应行为是在当地进行的。系统被划分成不同的岛屿（30）。每个岛（30）被控制，并且其工作条件根据一些参数而被修改。芯片的其余部分也受到控制，取决于其他参数。这要求每个岛（30）具有与全局控制器（42）通信的本地控制器（36）。主要控制参数是例如。电源电压，阈值电压和时钟频率。

7. 发明申请

US20080106327A1 Closed-Loop Control for Performance Tuning 有权
标题翻译：用于性能调优的闭环控制
公开(公告)号：US20080106327A1
公开(公告)日：2008-05-08
申请号：US11629716
申请日：2005-06-09
申请人： Rinze Ida Mechtildis Peter Meijer , Francesco Pessolano , Jose De Jesus Pineda De Gyvez
发明人： Rinze Ida Mechtildis Peter Meijer , Francesco Pessolano , Jose De Jesus Pineda De Gyvez
IPC分类号： G05F3/02
CPC分类号： G06F1/3203 , G06F1/28 , G06F1/324 , G06F1/3296 , Y02D10/126 , Y02D10/172
摘要： The present invention relates to a method and circuit arrangement for controlling performance of an integrated circuit in response to a monitored performance indicator, wherein power supply of the integrated circuit is controlled based on said performance indicator. At least one of a noise level of the controlled power supply and a clock frequency generated in said integrated circuit is monitored and a respective control signal is fed back to the controlling function if the checking result is not within a predetermined range. Thereby, an simple and easily extendable automatic adaptation to process variations can be achieved.
摘要翻译：本发明涉及一种用于响应于监视的性能指示器来控制集成电路的性能的方法和电路装置，其中基于所述性能指标来控制集成电路的电源。如果检查结果不在预定范围内，则监视受控电源的噪声电平和在所述集成电路中产生的时钟频率中的至少一个并将相应的控制信号反馈给控制功能。因此，可以实现简单且易于扩展的自动适应过程变化。

8. 发明授权

US07256645B2 Suppression of noise in an integrated circuit 有权
标题翻译：在集成电路中抑制噪声
公开(公告)号：US07256645B2
公开(公告)日：2007-08-14
申请号：US10537028
申请日：2003-10-31
申请人： Jose De Jesus Pineda De Gyvez , Rosario Capor
发明人： Jose De Jesus Pineda De Gyvez , Rosario Capor
IPC分类号： H03K5/00
CPC分类号： H04B15/005
摘要： Sub-circuits of an integrated circuit can act as noise sources on common conductors such as power supply lines and the substrate. Each of these conductors may act as a noise medium capable of transferring noise signals from the noise source to other sub-circuits. One or more feedback circuits are coupled between input and output points on opposite sides of where a circuit to be protected is connected to such a medium, so that a output of the feedback circuit is coupled to the noise medium closer to certain noise sources than the input of the feedback circuit. Preferably, multiple feedback circuits are cross-coupled and have transfer connections so that coupling between the input and outputs of different feedback circuit is at least partially suppressed.
摘要翻译：集成电路的子电路可以作为诸如电源线和基板的公共导体上的噪声源。这些导体中的每一个可以用作能够将噪声信号从噪声源传送到其他子电路的噪声介质。一个或多个反馈电路耦合在其上要被保护的电路连接到这种介质的相对侧的输入和输出点之间，使得反馈电路的输出耦合到更接近特定噪声源的噪声源，反馈电路的输入。优选地，多个反馈电路交叉耦合并且具有传输连接，使得不同反馈电路的输入和输出之间的耦合被至少部分地抑制。

9. 发明授权

US08552734B2 Test prepared integrated circuit with an internal power supply domain 有权
标题翻译：测试准备集成电路与内部电源域
公开(公告)号：US08552734B2
公开(公告)日：2013-10-08
申请号：US11911732
申请日：2006-04-13
申请人： Rinze I. M. P. Meijer , Sandeep Kumar Goel , Jose De Jesus Pineda De Gyvez
发明人： Rinze I. M. P. Meijer , Sandeep Kumar Goel , Jose De Jesus Pineda De Gyvez
IPC分类号： G01R31/08
CPC分类号： G01R31/31721 , G01R31/318533
摘要： The integrated circuit (10) has an internal power supply domain with a power supply voltage adaptation circuit (14) to adapt the power supply voltage in the power supply domain. Typically, a plurality of such domains is provided wherein the power supply voltage can be adapted independently. During testing an internal power supply voltage is supplied to a temporally integrating analog to digital conversion circuit (16) in the integrating circuit (10). A temporally integrated value of the power supply voltage is measured during a measurement period. Preferably, integrating measurements of a plurality of internal supply voltages are performed in parallel during the same measurement time interval. Preferably a further test is performed by changing over between mutually different supply voltages during a further measurement period. In this way the measured integrated supply voltage can be used to check the speed of the change over between the different voltages.
摘要翻译：集成电路（10）具有内部电源域，其具有电源电压适配电路（14），以适应供电域中的电源电压。通常，提供多个这样的域，其中可以独立地适配电源电压。在测试期间，内部电源电压被提供给积分电路（10）中的时间积分模数转换电路（16）。在测量期间测量电源电压的时间积分值。优选地，在相同的测量时间间隔期间并行地执行多个内部电源电压的积分测量。优选地，在另外的测量周期期间通过在相互不同的电源电压之间切换来执行另外的测试。以这种方式，可以使用测量的集成电源电压来检查不同电压之间的转换速度。

10. 发明授权

US08120410B2 Adaptive control of power supply for integrated circuits 有权
标题翻译：集成电路电源的自适应控制
公开(公告)号：US08120410B2
公开(公告)日：2012-02-21
申请号：US11629768
申请日：2005-06-09
申请人： Rinze Ida Mechtildis Peter Meijer , Francesco Pessolano , Jose De Jesus Pineda De Gyvez
发明人： Rinze Ida Mechtildis Peter Meijer , Francesco Pessolano , Jose De Jesus Pineda De Gyvez
IPC分类号： G05F1/10
CPC分类号： G06F1/324 , G06F1/3203 , G06F1/3243 , G06F1/3296 , Y02D10/126 , Y02D10/152 , Y02D10/172
摘要： The present invention relates to a circuit arrangement and method for controlling power supply in an integrated circuit wherein at least one working parameter of at least one electrically isolated circuit region (10) is monitored, and the conductivity of a variable resistor means is locally controlled so as to individually adjust power supply for each of said at least two electrically isolated circuit regions (10) based on the at least one monitored working parameter. Thereby, a fast and simple control functionality with low area overhead can be provided.
摘要翻译：本发明涉及一种用于控制集成电路中的电源的电路装置和方法，其中监控至少一个电隔离电路区域（10）的至少一个工作参数，并且可变电阻器装置的电导率被局部控制用于基于所述至少一个被监视的工作参数单独地调节所述至少两个电隔离电路区域（10）中的每一个的电源。因此，可以提供具有低面积开销的快速且简单的控制功能。

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