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1. 发明授权

US07671618B2 Analog IC having test arrangement and test method for such an IC 有权
标题翻译：具有这种IC的测试布置和测试方法的模拟IC
公开(公告)号：US07671618B2
公开(公告)日：2010-03-02
申请号：US12091026
申请日：2006-10-20
申请人： Amir Zjajo , Hendrik J Bergveld , Rodger F Schuttert , Jose De Jesus Pineda De Gyvez
发明人： Amir Zjajo , Hendrik J Bergveld , Rodger F Schuttert , Jose De Jesus Pineda De Gyvez
IPC分类号： G01R31/26
CPC分类号： G01R31/3167 , G01R31/31721 , G01R31/318536 , G01R31/318575
摘要： An integrated circuit (IC) comprises a plurality of analog stages (10a-c), each of the analog stages being conductively coupled to a power supply (20; 20a-c), and being conductively coupled to each other by a signal path (12); and a test arrangement for testing the plurality of analog stages, the test arrangement comprising input means such as an analog bus (40) coupled to a signal path input of each analog stage from the plurality of analog stages, output means such as a further analog bus (50) for communicating a test result to an output of the integrated circuit, switching means such as a plurality of switches (36) in the biasing infrastructure of the IC for selectively disabling an analog stage, and control means such a shift register (60) for controlling the switching means. Consequently, the analog stages of the IC can be tested and debugged in isolation without the need for switches in the signal path through the cores. A current sensor (70) may be present in the power supply to facilitate structural testing of the analog stages in isolation.
摘要翻译：集成电路（IC）包括多个模拟级（10a-c），每个模拟级与电源（20; 20a-c）导电耦合，并且通过信号路径彼此导电耦合 12）; 以及用于测试所述多个模拟级的测试装置，所述测试装置包括输入装置，例如耦合到来自所述多个模拟级的每个模拟级的信号路径输入的模拟总线（40），输出装置用于将测试结果传送到集成电路的输出的总线（50），用于选择性地禁用模拟级的IC的偏置基础设施中的多个开关（36）等开关装置，以及诸如移位寄存器 60），用于控制切换装置。因此，IC的模拟级可以隔离测试和调试，而不需要通过核的信号路径中的开关。电流传感器（70）可以存在于电源中以便于隔离地对模拟级的结构测试。

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