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    • 1. 发明授权
    • Circuitry to reduce PLL lock acquisition time
    • 电路减少PLL锁定采集时间
    • US06940356B2
    • 2005-09-06
    • US10780493
    • 2004-02-17
    • James J. McDonald, IIRonald B. Hulfachor
    • James J. McDonald, IIRonald B. Hulfachor
    • H03L7/089H03L7/095H03L7/107H03L7/18H03L7/00
    • H03L7/107H03L7/0898H03L7/095H03L7/18Y10S331/02
    • A phase locked loop, PLL, is described with multiple parallel charge pumps that are selectively disabled as phase lock is approached. A lock detection circuit is described that enabled reference currents to be fed to the parallel charge pumps. The error signal from a phase detector is arranged as UP and a DOWN signals that are averaged in the lock detector. When the average error is large, all the reference currents feed the charge pumps that provide a high loop gain to reduce the lock time. As the lock becomes closer selective reference currents are disabled to reduce loop gain so that a smooth transition to lock is made. Selectively switching currents into a low pass filter that usually follows a charge pump in a PLL circuit automatically reduces switching noise by the operation of the low pass filter.
    • 使用多个并联电荷泵描述了锁相环PLL,当并联锁相时,该电荷泵被选择性地禁用。 描述了使得能够将参考电流馈送到并联电荷泵的锁定检测电路。 来自相位检测器的误差信号被布置为在锁定检测器中被平均的UP和DOWN信号。 当平均误差较大时,所有参考电流都会提供提供高回路增益的电荷泵,以减少锁定时间。 随着锁变得更近,选择性参考电流被禁用以减小环路增益,从而进行平滑过渡到锁定。 选择性地将电流切换到通常在PLL电路中的电荷泵之后的低通滤波器中,通过低通滤波器的操作自动降低开关噪声。
    • 6. 发明授权
    • Method of reducing the propagation delay and process and temperature effects on a buffer
    • 降低传播延迟和缓冲液过程和温度影响的方法
    • US06756826B1
    • 2004-06-29
    • US10460075
    • 2003-06-12
    • Christian KleinJames J. McDonald, II
    • Christian KleinJames J. McDonald, II
    • H03B100
    • H03K19/01721H03K17/164
    • A buffer circuit with slow output edges is described. Pulsed higher value currents are driven from one shot timing circuits to inject a pulse of current into the control gate of the buffer's output MOSFET to speed up the beginning of the turning on or the turning off of the output MOSFT. When the beginning and turning on and off is reached lower value current sources continue to drive the gate of the output MOSFET. In one embodiment, one shots are triggered from the rising and falling edges of the input signal. The effect of the higher value current pulses is to reduce the circuit delay through the buffer. Also, the pulse width can be designed as temperature sensitive, and supply voltage sensitive so as to maintain the buffer circuit delay as substantially constant as temperature, supply voltage and process variation occur.
    • 描述具有缓慢输出边缘的缓冲电路。 脉冲更高值的电流由单稳定时电路驱动,以将脉冲电流注入缓冲器输出MOSFET的控制栅极,以加速导通开始或关闭输出MOSFT。 当达到开始和接通和关断时,电流源继续驱动输出MOSFET的栅极。 在一个实施例中,从输入信号的上升沿和下降沿触发一次。 较高值电流脉冲的影响是减小通过缓冲器的电路延迟。 此外,脉冲宽度可以设计为温度敏感,并且电源电压敏感,以便保持缓冲器电路的延迟基本上恒定,因为温度,电源电压和工艺变化发生。
    • 7. 发明授权
    • Manufacturing system
    • 制造系统
    • US5640756A
    • 1997-06-24
    • US385501
    • 1995-02-08
    • Robert L. BrownJames J. McDonaldMax J. Miller, Jr.David E. Baxter, deceased
    • Robert L. BrownJames J. McDonaldMax J. Miller, Jr.David E. Baxter, deceased
    • B23P21/00B23Q37/00B23Q39/04
    • B23P21/006B23Q37/00B23Q39/046Y10T29/5124Y10T29/519Y10T29/53004Y10T29/53052Y10T29/53096Y10T29/53365Y10T29/53374Y10T29/53396Y10T29/53404
    • An automated continuous manufacturing system which includes a rotatable work table having a plurality of work piece supports for maintaining work pieces during operation of said system, and a plurality of work stations for performing cleaning, pretreatment, treatment or assembly tasks on work pieces secured to said work piece supports. Each of the tasks performed at the work table is performed at a respective work station. Certain of the work stations comprise a removable station subassembly for performing a specific task. The removable station subassemblies are removably engagable with the rotatable work table and may be replaced with an alternate removable station subassembly for performing a desired alternate task. One of the work stations is an assembly station engaged with the rotatable work table for receiving work pieces from their individual work piece supports. The assembly station further includes a removing subassembly for removing the work pieces from the work piece supports for further assembly. An orientation subassembly is also provided with the assembly station, and is mounted adjacent the removing subassembly by a quick change release member to enable easy removal and replacement with an alternate orientation subassembly. The orientation subassembly includes a position sensor for detecting the position of an alignment member of a work piece.
    • 一种自动连续制造系统,其包括具有多个工件支撑件的可旋转工作台,用于在所述系统的操作期间保持工件;以及多个工作台,用于在固定到所述系统的工件上进行清洁,预处理,处理或组装任务 工件支撑。 在工作台执行的每个任务都在相应的工作站执行。 某些工作站包括用于执行特定任务的可移动站子组件。 可移动站子组件可拆卸地与可旋转工作台接合,并且可以用用于执行期望的替代任务的备用可移除站子组件来代替。 其中一个工位是与可旋转工作台接合的组装工位,用于从其各自的工件支撑件接收工件。 组装工位还包括用于从工件支撑件移除工件以进一步组装的拆卸子组件。 方向子组件还设置有组装站,并且通过快速更换释放构件安装在拆卸子组件附近,以使得能够容易地移除和替换替代的定向子组件。 取向组件包括用于检测工件的对准部件的位置的位置传感器。
    • 10. 发明授权
    • Circuit to linearize gain of a voltage controlled oscillator over wide frequency range
    • 电路在宽频率范围内线性化压控振荡器的增益
    • US07030669B2
    • 2006-04-18
    • US10779891
    • 2004-02-17
    • Ronald B. HulfachorJames J. McDonald, II
    • Ronald B. HulfachorJames J. McDonald, II
    • H03L7/06
    • H03K3/0322H03L7/0995
    • A voltage controlled oscillator circuit is shown using multiple delay stages with the last stage looped back out of phase to the first stage. Each stage delay is formed by charging one or more capacitors. The circuitry uses active components demonstrating a square law relationship between a control voltage and a resulting current. The current is ultimately used to charge the delay capacitor. The net effect is a linear relationship of the VCO frequency and an input control voltage. The range of the linear relationship is extended by using square law current sources to provide suitable currents that extend the linear range when other active devices are no longer supporting the square law relationship. In addition bipolar device are used to compensate for temperature and batch to batch processing effects of FET devices.
    • 示出了使用多个延迟级的压控振荡器电路,其中最后阶段环回到第一级。 通过对一个或多个电容器充电来形成每一级延迟。 该电路使用有源元件,显示出控制电压和所得电流之间的平方律关系。 电流最终用于对延迟电容器充电。 净效应是VCO频率和输入控制电压的线性关系。 通过使用平方律电流源来提供线性关系的范围,以提供适当的电流,当其他有源器件不再支持平方律关系时,延伸线性范围。 此外,双极性器件用于补偿FET器件的温度和批次处理效果。