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    • 4. 发明申请
    • Methods for forming dual poly gate of semiconductor device
    • 用于形成半导体器件双重多晶硅栅极的方法
    • US20080003751A1
    • 2008-01-03
    • US11646730
    • 2006-12-28
    • Cheol Hwan ParkDong Su ParkEun A. LeeHye Jin Seo
    • Cheol Hwan ParkDong Su ParkEun A. LeeHye Jin Seo
    • H01L21/336
    • H01L21/82345H01L21/28044H01L21/324H01L21/823842
    • A method for forming a dual poly gate of a semiconductor device includes forming a gate insulating layer on a semiconductor substrate having a first region and a second region; forming an amorphous silicon layer, in which a portion defined by the first region is implanted with impurity ions of a first conductivity type and a portion defined by the second region is implanted with impurity ions of a second conductivity type, on the gate insulating layer; forming silicon seeds on the amorphous silicon layer; forming hemispherical grains on the surface of the amorphous silicon layer using the silicon seeds; and activating the implanted impurity ions and crystallizing the amorphous silicon layer having the hemispherical grains formed thereon by annealing to form a polysilicon layer of a first conductivity type and a polysilicon layer of a second conductivity type in the portions of the amorphous silicon layer defined by the first and second regions, respectively.
    • 一种用于形成半导体器件的双多晶硅栅极的方法包括在具有第一区域和第二区域的半导体衬底上形成栅极绝缘层; 形成非晶硅层,其中由栅极绝缘层注入由第一导电类型的杂质离子和由第二区限定的部分,由第一区限定的部分注入第二导电类型的杂质离子; 在所述非晶硅层上形成硅晶种; 使用硅晶粒在非晶硅层的表面上形成半球状晶粒; 并激活注入的杂质离子并使其上形成有半球形晶粒的非晶硅层通过退火结晶,以在由非晶硅层限定的部分中形成第一导电类型的多晶硅层和第二导电类型的多晶硅层 第一和第二区域。
    • 6. 发明授权
    • Method for forming isolation layer of semiconductor device
    • 形成半导体器件隔离层的方法
    • US06955974B2
    • 2005-10-18
    • US10877714
    • 2004-06-25
    • Tae Hyeok LeeCheol Hwan ParkDong Su ParkHo Jin ChoEun A Lee
    • Tae Hyeok LeeCheol Hwan ParkDong Su ParkHo Jin ChoEun A Lee
    • H01L21/76H01L21/762H01L21/8242
    • H01L21/76224H01L27/10894
    • A method for forming an isolation layer of a semiconductor device, which comprises the steps of: a) sequentially forming a pad oxide layer and a pad nitride layer on a silicon substrate; b) etching the pad nitride layer, the pad oxide layer, and the silicon substrate, thereby forming a trench; c) thermal-oxidizing the resultant substrate to form a sidewall oxide layer on a surface of the trench; d) nitrifying the sidewall oxide layer through the use of NH3 annealing; e) depositing a liner aluminum nitride layer on an entire surface of the silicon substrate inclusive of the nitrated sidewall oxide layer; f) depositing a buried oxide layer on the liner aluminum nitride layer to fill the trench; g) performing a chemical mechanical polishing process with respect to the buried oxide layer; and h) eliminating the pad nitride layer.
    • 一种用于形成半导体器件的隔离层的方法,包括以下步骤:a)在硅衬底上依次形成焊盘氧化物层和衬垫氮化物层; b)蚀刻衬垫氮化物层,衬垫氧化物层和硅衬底,从而形成沟槽; c)热氧化所得衬底以在沟槽的表面上形成侧壁氧化物层; d)通过使用NH 3退火对侧壁氧化物层进行硝化; e)在包括所述硝化侧壁氧化物层的所述硅衬底的整个表面上沉积衬里氮化铝层; f)在衬里氮化铝层上沉积掩埋氧化物层以填充沟槽; g)对所述掩埋氧化物层进行化学机械抛光工艺; 以及h)消除所述衬垫氮化物层。