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1. 发明授权

US09380531B1 Systems and methods for providing wireless sensor networks with an asymmetric network architecture 有权
标题翻译：为无线传感器网络提供非对称网络架构的系统和方法
公开(公告)号：US09380531B1
公开(公告)日：2016-06-28
申请号：US14607045
申请日：2015-01-27
申请人： Vivek Subramanian , Elad Alon , Vikram Pavate
发明人： Vivek Subramanian , Elad Alon , Vikram Pavate
IPC分类号： H04W4/00 , H04W52/02 , H04W84/18
CPC分类号： H04W52/0216 , H04W52/0219 , H04W84/18 , Y02D70/00 , Y02D70/1224 , Y02D70/1262 , Y02D70/142 , Y02D70/144 , Y02D70/162 , Y02D70/164 , Y02D70/22
摘要： Systems and methods for implementing power management features while providing a wireless asymmetric network are disclosed herein. In one embodiment, a system includes a hub having a wireless control device that is configured to control communications and power consumption in the wireless asymmetric network architecture. The system also includes a plurality of nodes each having a wireless device with a transmitter and a receiver (or transmitter and receiver functionality of a transceiver) to enable bi-directional communications with the wireless control device of the hub in the wireless asymmetric network architecture. The wireless control device can be configured to determine a scheduled timing of causing the transmitter to be operable to transmit and causing the receiver to be operable to receive for each wireless device to reduce power consumption of the wireless devices of the plurality of nodes.
摘要翻译：本文公开了在提供无线非对称网络的同时实现电力管理特征的系统和方法。在一个实施例中，系统包括具有被配置为控制无线非对称网络架构中的通信和功率消耗的无线控制设备的集线器。该系统还包括多个节点，每个节点具有无线设备，发射机和接收机（或收发器的发射机和接收机功能）能够在无线非对称网络架构中实现与集线器的无线控制设备的双向通信。无线控制设备可以被配置为确定使得发射机可操作地传送并使得接收机可操作以用于每个无线设备的调度定时，以减少多个节点的无线设备的功耗。

2. 发明授权

US08509321B2 Simultaneous bi-directional link 失效
标题翻译：同时双向链接
公开(公告)号：US08509321B2
公开(公告)日：2013-08-13
申请号：US11021514
申请日：2004-12-23
申请人： Elad Alon , Sudhakar Pamarti , Fariborz Assaderaghi , Kun-Yung Chang
发明人： Elad Alon , Sudhakar Pamarti , Fariborz Assaderaghi , Kun-Yung Chang
IPC分类号： H04K1/10
CPC分类号： H04L5/1423 , H04L5/1438 , H04L5/1461
摘要： A memory system with a simultaneous bi-directional link includes a controller, a memory device and a set of signal lines coupled to the controller and the memory device. Simultaneous communication between the controller and the memory device on the set of signal lines uses a first band of frequencies, and between the memory device and the controller on the set of signal lines uses a second band of frequencies. The controller is configured to dynamically adjust the first band of frequencies based on a predetermined data rate between the controller and the memory device and to dynamically adjust the second band of frequencies based on a predetermined data rate between the memory device and the controller.
摘要翻译：具有同时双向链路的存储器系统包括控制器，存储器件和耦合到控制器和存储器件的一组信号线。控制器与信号线组上的存储器件之间的同时通信使用第一频带，并且存储器件与信号线组上的控制器之间使用第二频带。控制器被配置为基于控制器和存储设备之间的预定数据速率来动态地调整第一频带，并且基于存储器设备和控制器之间的预定数据速率来动态调整第二频带。

3. 发明授权

US08238761B2 Optical receiver with a calibration mode 有权
标题翻译：具有校准模式的光接收机
公开(公告)号：US08238761B2
公开(公告)日：2012-08-07
申请号：US12633934
申请日：2009-12-09
申请人： Frankie Y. Liu , Dinesh D. Patil , Ronald Ho , Elad Alon
发明人： Frankie Y. Liu , Dinesh D. Patil , Ronald Ho , Elad Alon
IPC分类号： H04B10/06
CPC分类号： H04B10/6911
摘要： An optical receiver is described. This optical receiver includes a digital feedback circuit that biases a front-end circuit, which receives an optical signal, so that an analog electrical signal output by the front-end circuit is calibrated relative to a reference voltage corresponding to a decision threshold of a digital slicer in the optical receiver. In particular, during a calibration mode the feedback circuit may determine and store a calibration value that calibrates the analog electrical signal relative to the reference voltage. Then, during a normal operating mode, the feedback circuit may output a current corresponding to the stored calibration value that specifies a bias point of the front-end circuit.
摘要翻译：描述了光接收机。该光接收器包括数字反馈电路，该数字反馈电路偏置接收光信号的前端电路，使得由前端电路输出的模拟电信号相对于对应于数字的判定阈值的参考电压进行校准切片机在光接收机。特别地，在校准模式期间，反馈电路可以确定并存储校准相对于参考电压的模拟电信号的校准值。然后，在正常操作模式期间，反馈电路可输出对应于存储的校准值的电流，该校准值指定前端电路的偏置点。

4. 发明申请

US20070136621A1 Transmitter with skew reduction 有权
标题翻译：变送器具有歪斜减少
公开(公告)号：US20070136621A1
公开(公告)日：2007-06-14
申请号：US11299073
申请日：2005-12-09
申请人： Elad Alon , Sudhakar Pamarti
发明人： Elad Alon , Sudhakar Pamarti
IPC分类号： G06F1/04
CPC分类号： G06F1/10
摘要： An integrated circuit device is described. The circuit device may include a group of signal nodes, including a first signal node and a second signal node, a transmitter coupled to the group of signal nodes, and a first clock circuit coupled to the transmitter. The transmitter may transmit a first signal on the first signal node and a second signal on the second signal node. The first signal and the second signal may correspond to a first sequence of data bits during a sequence of bit times. The first clock circuit may control a transmit time of at least one of the first signal and the second signal. The first clock circuit may include a first phase adjustment element that provides compensation for a first timing offset between the first signal and the second signal. The first timing offset may be less than a bit time in the sequence of bit times.
摘要翻译：描述集成电路器件。电路设备可以包括一组信号节点，包括第一信号节点和第二信号节点，耦合到该组信号节点的发射机以及耦合到发射机的第一时钟电路。发射机可以在第一信号节点上传送第一信号，并在第二信号节点上发送第二信号。第一信号和第二信号可以在比特时间序列期间对应于数据比特的第一序列。第一时钟电路可以控制第一信号和第二信号中的至少一个的发送时间。第一时钟电路可以包括第一相位调整元件，其为第一信号和第二信号之间的第一定时偏移提供补偿。第一定时偏移可以小于位时间序列中的位时间。

5. 发明授权

US07030657B2 High speed signaling system with adaptive transmit pre-emphasis and reflection cancellation 有权
标题翻译：具有自适应发射预加重和反射消除的高速信号系统
公开(公告)号：US07030657B2
公开(公告)日：2006-04-18
申请号：US10851505
申请日：2004-05-21
申请人： Vladimir M. Stojanovic , Andrew Ho , Anthony Bessios , Fred F. Chen , Elad Alon , Mark A. Horowitz
发明人： Vladimir M. Stojanovic , Andrew Ho , Anthony Bessios , Fred F. Chen , Elad Alon , Mark A. Horowitz
IPC分类号： H03K19/0175
CPC分类号： H04L25/49 , H04B1/04 , H04B1/0475 , H04B2001/0416 , H04L25/025 , H04L25/028 , H04L25/0282 , H04L25/03019 , H04L25/03343 , H04L25/03885 , H04L25/061 , H04L25/4917 , H04L2025/03363 , H04L2025/03802
摘要： A signaling system having an equalizing transmitter and equalizing receiver. The equalizing transmitter transmits a signal to a receive circuit. A first sampling circuit within the equalizing receiver samples the signal to determine whether the signal exceeds a first threshold, and a second sampling circuit within the equalizing receiver samples the signal to determine whether the signal exceeds a second threshold. A drive strength of the equalizing transmitter and a drive strength of an equalizing signal driver within the equalizer are adjusted based, at least in part, on whether the first signal exceeds the first and second thresholds.
摘要翻译：一种具有均衡发射机和均衡接收机的信令系统。均衡发射机将信号发送到接收电路。均衡接收器内的第一采样电路对信号进行采样以确定信号是否超过第一阈值，并且均衡接收器内的第二采样电路对信号进行采样以确定信号是否超过第二阈值。至少部分地基于第一信号是否超过第一和第二阈值来调整均衡器的驱动强度和均衡器内均衡信号驱动器的驱动强度。

6. 发明授权

US06919749B2 Apparatus and method for a digital delay locked loop 失效
标题翻译：数字延迟锁定环的装置和方法
公开(公告)号：US06919749B2
公开(公告)日：2005-07-19
申请号：US10658710
申请日：2003-09-08
申请人： Elad Alon , Scott Best
发明人： Elad Alon , Scott Best
IPC分类号： H03K3/037 , H03L7/08 , H03L7/081 , H03H11/26
CPC分类号： H03K3/037 , H03K3/0375 , H03L7/0802 , H03L7/0814
摘要： A circuit and method is shown for digital control of delay lines in a delay locked loop (DLL) system. A pair of multiplexors (MUXes) is used to select output taps from a pair of complementary delay lines that delay a reference clock signal in order to lock onto a received clock signal. An output tap from one delay line is used to produce a rising edge in an output clock signal while a corresponding tap in the complementary delay line is used to produce a falling edge in the output signal in order to correct for distortion. The MUXes are controlled based on a phase difference detected between the received clock signal and a feedback clock corresponding to the output clock signal. Another aspect of the present invention provides for generation of a quadrature clock by interpolating between the rising and falling edges selected for the output clock signal. Still another aspect of the present invention provides for selectively disabling unused elements of the delay lines to reduce power consumption.
摘要翻译：示出了延迟锁定环（DLL）系统中的延迟线的数字控制的电路和方法。一对多路复用器（MUX）用于从延迟参考时钟信号的一对互补延迟线中选择输出抽头，以便锁定到所接收的时钟信号上。来自一个延迟线的输出抽头用于产生输出时钟信号中的上升沿，而互补延迟线中的相应抽头用于在输出信号中产生下降沿以便校正失真。基于在接收的时钟信号和对应于输出时钟信号的反馈时钟之间检测到的相位差来控制MUX。本发明的另一方面提供了通过在为输出时钟信号选择的上升沿和下降沿之间进行内插来产生正交时钟。本发明的另一方面提供了选择性地禁用延迟线的未使用元件以降低功耗。

7. 发明申请

US20050135489A1 Noise-tolerant signaling schemes supporting simplified timing and data recovery 有权
标题翻译：支持简化时序和数据恢复的耐噪声信令方案
公开(公告)号：US20050135489A1
公开(公告)日：2005-06-23
申请号：US10739823
申请日：2003-12-17
申请人： Andrew Ho , Vladimir Stojanovic , Fred Chen , Elad Alon , Mark Horowitz
发明人： Andrew Ho , Vladimir Stojanovic , Fred Chen , Elad Alon , Mark Horowitz
IPC分类号： G06F13/40 , H03K19/003 , H04L5/20 , H04L12/56 , H04B3/00
CPC分类号： H04L47/10 , H04L5/20 , H04L25/0276
摘要： Described are communication systems that convey differential and common-mode signals over the same differential channel. Noise-tolerant communication schemes use low-amplitude common-mode signals that are easily rejected by differential receivers, thus allowing for very high differential data rates. Some embodiments employ the common-mode signals to transmit backchannel signals for adjusting the characteristics of the differential transmitter. Backchannel control signals are effectively conveyed even if the forward channel transmitter is so maladjusted that the received differential data is unrecognizable. Systems in accordance with the above-described embodiments obtain these advantages without additional pins or communications channels, and are compatible with both AC-coupled and DC-coupled communications channels. Data coding schemes and corresponding data recovery circuits eliminate the need for complex, high-speed CDR circuits.
摘要翻译：描述了通过相同的差分通道传送差分和共模信号的通信系统。耐噪声通信方案使用容易被差分接收机拒绝的低振幅共模信号，从而允许非常高的差分数据速率。一些实施例采用共模信号来发送用于调整差分发射机的特性的反向信道信号。即使前向信道发射机被调整不正确，接收到的差分数据是无法识别的，反向信道控制信号也被有效地传送。根据上述实施例的系统在没有附加引脚或通信信道的情况下获得这些优点，并且与AC耦合和DC耦合通信信道兼容。数据编码方案和相应的数据恢复电路不需要复杂的高速CDR电路。

8. 发明申请

US20050134306A1 High speed signaling system with adaptive transmit pre-emphasis and reflection cancellation 有权
标题翻译：具有自适应发射预加重和反射消除的高速信号系统
公开(公告)号：US20050134306A1
公开(公告)日：2005-06-23
申请号：US10851505
申请日：2004-05-21
申请人： Vladimir Stojanovic , Andrew Ho , Anthony Bessios , Fred Chen , Elad Alon , Mark Horowitz
发明人： Vladimir Stojanovic , Andrew Ho , Anthony Bessios , Fred Chen , Elad Alon , Mark Horowitz
IPC分类号： H03K19/003 , H04L25/02 , H04L25/03 , H04L25/06 , H04L25/49
CPC分类号： H04L25/49 , H04B1/04 , H04B1/0475 , H04B2001/0416 , H04L25/025 , H04L25/028 , H04L25/0282 , H04L25/03019 , H04L25/03343 , H04L25/03885 , H04L25/061 , H04L25/4917 , H04L2025/03363 , H04L2025/03802
摘要： A signaling system having an equalizing transmitter and equalizing receiver. The equalizing transmitter transmits a signal to a receive circuit. A first sampling circuit within the equalizing receiver samples the signal to determine whether the signal exceeds a first threshold, and a second sampling circuit within the equalizing receiver samples the signal to determine whether the signal exceeds a second threshold. A drive strength of the equalizing transmitter and a drive strength of an equalizing signal driver within the equalizer are adjusted based, at least in part, on whether the first signal exceeds the first and second thresholds.
摘要翻译：一种具有均衡发射机和均衡接收机的信令系统。均衡发射机将信号发送到接收电路。均衡接收器内的第一采样电路对信号进行采样以确定信号是否超过第一阈值，并且均衡接收器内的第二采样电路对信号进行采样以确定信号是否超过第二阈值。至少部分地基于第一信号是否超过第一和第二阈值来调整均衡器的驱动强度和均衡器内均衡信号驱动器的驱动强度。

9. 发明授权

US09706489B2 Systems and methods for providing wireless asymmetric network architectures of wireless devices with anti-collision features 有权
公开(公告)号：US09706489B2
公开(公告)日：2017-07-11
申请号：US14607047
申请日：2015-01-27
申请人： Vivek Subramanian , Elad Alon , Vikram Pavate
发明人： Vivek Subramanian , Elad Alon , Vikram Pavate
IPC分类号： H04W52/02 , H04W28/04 , H04L1/00 , H04W84/18
CPC分类号： H04W52/02 , H04L1/00 , H04L1/1829 , H04W74/085 , H04W84/18 , Y02D70/1224 , Y02D70/1262 , Y02D70/142 , Y02D70/144 , Y02D70/162 , Y02D70/164 , Y02D70/22
摘要： Systems and methods for implementing anti-collision features while providing a wireless asymmetric network are disclosed herein. In one embodiment, a system includes a hub having a wireless control device that is configured to control communications in the wireless asymmetric network architecture and nodes each having a wireless device with a transmitter and a receiver to enable bi-directional communications with the wireless control device of the hub. The wireless control device of the hub is configured to detect a communication from a first node of the nodes, determine whether at least a portion of the communication is unintelligible to circuitry of the hub or circuitry coupled to the hub, and determine whether a collision of communications transmitting at approximately the same time from the first node and a second node has likely occurred when the at least portion of the communication is unintelligible.

10. 发明授权

US08183887B2 High speed signaling system with adaptive transmit pre-emphasis 有权
标题翻译：具有自适应发送预加重的高速信号系统
公开(公告)号：US08183887B2
公开(公告)日：2012-05-22
申请号：US12693285
申请日：2010-01-25
申请人： Vladimir M. Stojanovic , Andrew C. C. Ho , Anthony Bessios , Fred F. Chen , Elad Alon , Mark A. Horowitz
发明人： Vladimir M. Stojanovic , Andrew C. C. Ho , Anthony Bessios , Fred F. Chen , Elad Alon , Mark A. Horowitz
IPC分类号： H03K19/0175
CPC分类号： H04L25/49 , H04B1/04 , H04B1/0475 , H04B2001/0416 , H04L25/025 , H04L25/028 , H04L25/0282 , H04L25/03019 , H04L25/03343 , H04L25/03885 , H04L25/061 , H04L25/4917 , H04L2025/03363 , H04L2025/03802
摘要： A high-speed signaling system with adaptive transmit pre-emphasis. A transmit circuit has a plurality of output drivers to output a first signal onto a signal path. A receive circuit is coupled to receive the first signal via the signal path and configured to generate an indication of whether the first signal exceeds a threshold level. A first threshold control circuit is coupled to receive the indication from the receive circuit and configured to adjust the threshold level according to whether the first signal exceeds the threshold level. A drive strength control circuit is coupled to receive the indication from the receive circuit and configured to adjust a drive strength of at least one output driver of the plurality of output drivers according to whether the first signal exceeds the threshold level.
摘要翻译：具有自适应发送预加重的高速信号系统。发射电路具有多个输出驱动器，以将第一信号输出到信号路径上。接收电路被耦合以经由信号路径接收第一信号并被配置为生成第一信号是否超过阈值电平的指示。第一阈值控制电路被耦合以从接收电路接收指示，并且被配置为根据第一信号是否超过阈值电平来调整阈值电平。驱动强度控制电路被耦合以从接收电路接收指示，并且被配置为根据第一信号是否超过阈值电平来调整多个输出驱动器中的至少一个输出驱动器的驱动强度。

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