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    • 4. 发明授权
    • Systems and methods for determining locations of wireless sensor nodes in an asymmetric network architecture
    • 用于确定非对称网络架构中无线传感器节点位置的系统和方法
    • US09529076B2
    • 2016-12-27
    • US14607050
    • 2015-01-27
    • Vivek SubramanianElad AlonVikram Pavate
    • Vivek SubramanianElad AlonVikram Pavate
    • H04W24/00G01S5/10H04W4/02H04W56/00H04W84/18
    • G01S5/10G01S5/0289H04W4/02H04W56/001H04W84/18
    • Systems and methods for determining location information for sensor nodes in a wireless asymmetric network are disclosed herein. In one embodiment, an apparatus (e.g., hub) for providing a wireless asymmetric network architecture includes a memory for storing instructions, one or more processing units to execute instructions to establish and control communications in a wireless asymmetric network architecture, and radio frequency (RF) circuitry including multiple antennas to transmit and receive communications in the wireless asymmetric network architecture. The RF circuitry may include multiple antennas to transmit communications to a plurality of sensor nodes each having a wireless device with a transmitter and a receiver to enable bi-directional communications with the RF circuitry of the apparatus in the wireless asymmetric network architecture. The one or more processing units are configured to execute instructions to determine location information for the plurality of sensor nodes based on receiving communications from each sensor node.
    • 本文公开了用于确定无线非对称网络中的传感器节点的位置信息的系统和方法。 在一个实施例中,用于提供无线非对称网络架构的装置(例如,集线器)包括用于存储指令的存储器,用于执行在无线非对称网络架构中建立和控制通信的指令的一个或多个处理单元以及射频 )电路,其包括用于在无线非对称网络架构中发送和接收通信的多个天线。 RF电路可以包括多个天线,以将通信发送到多个传感器节点,每个传感器节点具有无线设备,发射机和接收机能够在无线非对称网络架构中实现与设备的RF电路的双向通信。 一个或多个处理单元被配置为基于从每个传感器节点的接收通信执行指令来确定多个传感器节点的位置信息。
    • 6. 发明申请
    • SYSTEMS AND METHODS FOR DETERMINING LOCATIONS OF WIRELESS SENSOR NODES IN AN ASYMMETRIC NETWORK ARCHITECTURE
    • 用于确定不对称网络架构中无线传感器位置的系统和方法
    • US20160216362A1
    • 2016-07-28
    • US14607050
    • 2015-01-27
    • Vivek SubramanianElad AlonVikram Pavate
    • Vivek SubramanianElad AlonVikram Pavate
    • G01S5/10H04W56/00H04W4/02
    • G01S5/10G01S5/0289H04W4/02H04W56/001H04W84/18
    • Systems and methods for determining location information for sensor nodes in a wireless asymmetric network are disclosed herein. In one embodiment, an apparatus (e.g., hub) for providing a wireless asymmetric network architecture includes a memory for storing instructions, one or more processing units to execute instructions to establish and control communications in a wireless asymmetric network architecture, and radio frequency (RF) circuitry including multiple antennas to transmit and receive communications in the wireless asymmetric network architecture. The RF circuitry may include multiple antennas to transmit communications to a plurality of sensor nodes each having a wireless device with a transmitter and a receiver to enable bi-directional communications with the RF circuitry of the apparatus in the wireless asymmetric network architecture. The one or more processing units are configured to execute instructions to determine location information for the plurality of sensor nodes based on receiving communications from each sensor node.
    • 本文公开了用于确定无线非对称网络中的传感器节点的位置信息的系统和方法。 在一个实施例中,用于提供无线非对称网络架构的装置(例如,集线器)包括用于存储指令的存储器,用于执行在无线非对称网络架构中建立和控制通信的指令的一个或多个处理单元以及射频 )电路,其包括用于在无线非对称网络架构中发送和接收通信的多个天线。 RF电路可以包括多个天线,以将通信发送到多个传感器节点,每个传感器节点具有无线设备,发射机和接收机能够在无线非对称网络架构中实现与设备的RF电路的双向通信。 一个或多个处理单元被配置为基于从每个传感器节点的接收通信执行指令来确定多个传感器节点的位置信息。
    • 10. 发明授权
    • Apparatus and method for a digital delay locked loop
    • 数字延迟锁定环的装置和方法
    • US06642760B1
    • 2003-11-04
    • US10112963
    • 2002-03-29
    • Elad AlonScott Best
    • Elad AlonScott Best
    • H03L706
    • H03K3/037H03K3/0375H03L7/0802H03L7/0814
    • A circuit and method is shown for digital control of delay lines in a delay locked loop (DLL) system. A pair of multiplexors (MUXes) is used to select output taps from a pair of complementary delay lines that delay a reference clock signal in order to lock onto a received clock signal. An output tap from one delay line is used to produce a rising edge in an output clock signal while a corresponding tap in the complementary delay line is used to produce a falling edge in the output signal in order to correct for distortion. The MUXes are controlled based on a phase difference detected between the received clock signal and a feedback clock corresponding to the output clock signal. Another aspect of the present invention provides for generation of a quadrature clock by interpolating between the rising and falling edges selected for the output clock signal. Still another aspect of the present invention provides for selectively disabling unused elements of the delay lines to reduce power consumption.
    • 示出了延迟锁定环(DLL)系统中的延迟线的数字控制的电路和方法。 一对多路复用器(MUX)用于从延迟参考时钟信号的一对互补延迟线中选择输出抽头,以便锁定到所接收的时钟信号上。 来自一个延迟线的输出抽头用于产生输出时钟信号中的上升沿,而互补延迟线中的相应抽头用于在输出信号中产生下降沿以便校正失真。 基于在接收的时钟信号和对应于输出时钟信号的反馈时钟之间检测到的相位差来控制MUX。 本发明的另一方面提供了通过在为输出时钟信号选择的上升沿和下降沿之间进行内插来产生正交时钟。 本发明的另一方面提供了选择性地禁用延迟线的未使用元件以降低功耗。