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1. 发明授权

US09143507B2 Method, apparatus, and system for pre-authentication and processing of data streams 有权
标题翻译：用于预认证和处理数据流的方法，装置和系统
公开(公告)号：US09143507B2
公开(公告)日：2015-09-22
申请号：US12392000
申请日：2009-02-24
申请人： Hoon Choi , Gyudong Kim , Ook Kim , Alexander Peysakhovich , Michael Schumacher , Daeyun Shim
发明人： Hoon Choi , Gyudong Kim , Ook Kim , James D. Lyle , Alexander Peysakhovich , Michael Schumacher , Daeyun Shim
IPC分类号： H04L29/06
CPC分类号： H04L63/0876 , G09G5/006 , G09G2370/12 , G11B20/00086 , G11B20/00463 , H04N5/4401 , H04N5/913 , H04N7/1675 , H04N21/2541 , H04N21/4122 , H04N21/4367 , H04N21/4408 , H04N21/835
摘要： A method, apparatus and system for pre-authenticating ports is disclosed. In one embodiment, an active port facilitating communication of media content between a transmitting device and a receiving device is identified, while the active port are associated with a first High-Definition Content Protection (HDCP) engine. Then, inactive ports that are in idle mode serving as backup ports to the active port are identified, while the inactive ports are associated with a second HDCP engine. Pre-authentication of each of the inactive ports is performed so the pre-authenticated inactive ports can subsequently replace the active port if a port switch is performed.
摘要翻译：公开了一种用于预认证端口的方法，装置和系统。在一个实施例中，识别促进传输设备和接收设备之间的媒体内容通信的活动端口，而活动端口与第一高清内容保护（HDCP）引擎相关联。然后，识别处于空闲模式的非活动端口作为活动端口的备份端口，而非活动端口与第二HDCP引擎相关联。执行每个非活动端口的预认证，使得如果执行端口交换机，则经过认证的非活动端口可以随后替换活动端口。

2. 发明授权

US09015509B2 Mechanism for low power standby mode control circuit 有权
标题翻译：低功耗待机模式控制电路机制
公开(公告)号：US09015509B2
公开(公告)日：2015-04-21
申请号：US13362930
申请日：2012-01-31
申请人： Gyudong Kim , Eungu Kim , Min-Kyu Kim , Daeyun Shim , Ravi Sharma , Myounghwan Kim , Jaeryon Lee
发明人： Gyudong Kim , Eungu Kim , Min-Kyu Kim , Daeyun Shim , Ravi Sharma , Myounghwan Kim , Jaeryon Lee
IPC分类号： G06F1/32
CPC分类号： G06F1/3287 , G06F1/3246 , G06F1/3293 , Y02D10/122 , Y02D10/171 , Y02D50/20
摘要： Embodiments of the invention are generally directed to a low power standby mode control circuit. An embodiment of an apparatus includes a processor, an interface for a connection with a second apparatus, and an operational circuit, wherein the processor is to disable one or more power connections to the operational circuit in a standby mode. The apparatus further includes a standby mode control circuit, the standby control circuit to operate using a standby power source, wherein the standby mode control circuit is to detect a stimulus signal from the second apparatus and in response to the stimulus signal the standby control circuit is to signal the processor, the processor to enable the one or more power connections of the operational circuit.
摘要翻译：本发明的实施例通常涉及低功率待机模式控制电路。装置的实施例包括处理器，用于与第二装置的连接的接口和操作电路，其中处理器在待机模式下禁用与操作电路的一个或多个电源连接。该设备还包括备用模式控制电路，待机控制电路使用待机电源进行操作，其中待机模式控制电路将检测来自第二设备的激励信号，并且响应于激励信号，备用控制电路为为了向处理器发信号，处理器启用操作电路的一个或多个电源连接。

3. 发明授权

US08275914B2 Discovery of connections utilizing a control bus 有权
标题翻译：发现使用控制总线的连接
公开(公告)号：US08275914B2
公开(公告)日：2012-09-25
申请号：US12577707
申请日：2009-10-12
申请人： Jason Seung-Min Kim , Inyeol Lee , Shrikant Ranade , Daeyun Shim
发明人： Jason Seung-Min Kim , Inyeol Lee , Shrikant Ranade , Daeyun Shim
IPC分类号： G06F3/00
CPC分类号： G06F13/4022 , G06F13/4081
摘要： Discovery of connections utilizing a control bus. An embodiment of a method includes detecting a transition of a control bus from a high state to a low state by a source device, the source device being configured to be coupled with a sink device via an interface, the interface including the control bus, the source device including a pullup device and the sink device including a pulldown device; pulsing the control bus to a high state at the source device; and upon detecting by the source device that the control bus remains in the high state ceasing the pulsing of the control bus to the high state, and transitioning the source device from a disconnected state to a connected state.
摘要翻译：发现使用控制总线的连接。一种方法的实施例包括：通过源设备检测控制总线从高状态到低状态的转换，源设备被配置为经由接口与宿设备耦合，所述接口包括控制总线，源设备，包括上拉设备和宿设备，其包括下拉设备; 将控制总线脉冲到源设备处于高状态; 并且当源设备检测到控制总线保持在高状态时，停止控制总线的脉冲到高状态，并且将源设备从断开状态转换到连接状态。

4. 发明申请

US20120204048A1 MECHANISM FOR LOW POWER STANDBY MODE CONTROL CIRCUIT 有权
标题翻译：低功耗待机模式控制电路的机理
公开(公告)号：US20120204048A1
公开(公告)日：2012-08-09
申请号：US13362930
申请日：2012-01-31
申请人： Gyudong Kim , Eungu Kim , Min-Kyu Kim , Daeyun Shim , Ravi Sharma , Myounghwan Kim , Jaeryon Lee
发明人： Gyudong Kim , Eungu Kim , Min-Kyu Kim , Daeyun Shim , Ravi Sharma , Myounghwan Kim , Jaeryon Lee
IPC分类号： G06F1/32
CPC分类号： G06F1/3287 , G06F1/3246 , G06F1/3293 , Y02D10/122 , Y02D10/171 , Y02D50/20
摘要： Embodiments of the invention are generally directed to a low power standby mode control circuit. An embodiment of an apparatus includes a processor, an interface for a connection with a second apparatus, and an operational circuit, wherein the processor is to disable one or more power connections to the operational circuit in a standby mode. The apparatus further includes a standby mode control circuit, the standby control circuit to operate using a standby power source, wherein the standby mode control circuit is to detect a stimulus signal from the second apparatus and in response to the stimulus signal the standby control circuit is to signal the processor, the processor to enable the one or more power connections of the operational circuit.
摘要翻译：本发明的实施例通常涉及低功率待机模式控制电路。装置的实施例包括处理器，用于与第二装置的连接的接口和操作电路，其中处理器在待机模式下禁用与操作电路的一个或多个电源连接。该设备还包括备用模式控制电路，待机控制电路使用待机电源进行操作，其中待机模式控制电路将检测来自第二设备的激励信号，并且响应于激励信号，备用控制电路为为了向处理器发信号，处理器启用操作电路的一个或多个电源连接。

5. 发明申请

US20100109795A1 TRANSMISSION OF ALTERNATIVE CONTENT OVER STANDARD DEVICE CONNECTORS 有权
标题翻译：通过标准设备连接器传输替代内容
公开(公告)号：US20100109795A1
公开(公告)日：2010-05-06
申请号：US12606096
申请日：2009-10-26
申请人： Graeme Peter Jones , Daeyun Shim , Shrikant Ranade , Gyudong Kim , Ook Kim
发明人： Graeme Peter Jones , Daeyun Shim , Shrikant Ranade , Gyudong Kim , Ook Kim
IPC分类号： H01P1/10
CPC分类号： G09G5/006 , G06F13/409 , G09G2370/10 , G09G2370/12 , H04L12/40006
摘要： Transmission of alternative content over standard device connectors. An embodiment of a method includes connecting a first device to a second device utilizing a standard connector, the connector including multiple pins, and detecting whether the second device is operating in a standard mode or an alternative mode. If the second device is operating in the alternative mode, then switching one or more pins of the standard connector for the alternative mode and transmitting or receiving signals for the alternative mode via the plurality of pins of the standard connector.
摘要翻译：通过标准设备连接器传输替代内容。一种方法的实施例包括使用标准连接器将第一设备连接到第二设备，连接器包括多个引脚，以及检测第二设备是否以标准模式或替代模式操作。如果第二设备在替代模式下操作，则切换用于替代模式的标准连接器的一个或多个引脚，以及通过标准连接器的多个引脚发送或接收替代模式的信号。

6. 发明申请

US20070234021A1 INTER-PORT COMMUNICATION IN A MULTI-PORT MEMORY DEVICE 有权
标题翻译：多端口存储器中的端口间通信
公开(公告)号：US20070234021A1
公开(公告)日：2007-10-04
申请号：US11694819
申请日：2007-03-30
申请人： Alan Ruberg , Dae Kim , Daeyun Shim , Dongyun Lee , Myung Cho , Sungjoon Kim
发明人： Alan Ruberg , Dae Kim , Daeyun Shim , Dongyun Lee , Myung Cho , Sungjoon Kim
IPC分类号： G06F7/38
CPC分类号： G11C8/16 , G06F13/4054 , G06F13/4243 , G11C7/1075 , G11C2207/108
摘要： A method and system for inter-port communication utilizing a multi-port memory device. The memory device contains an interrupt register, an interrupt signal interface (e.g., a dedicated pin), an interrupt mask, and one or more message buffers associated with each port. When a first component coupled to a first port of the memory device wants to communicate with a second component coupled to a second port of the memory device, the first component writes a message to a message buffer associated with the second port. An interrupt in the input register of the second port is set to notify the second component coupled to the second port that a new message is available. Upon receiving the interrupt, the second component reads the interrupt register to determine the nature of the interrupt. The second component then reads the message from the message buffer.
摘要翻译：一种利用多端口存储器件进行端口间通信的方法和系统。存储器件包含中断寄存器，中断信号接口（例如，专用引脚），中断掩码以及与每个端口相关联的一个或多个消息缓冲器。当耦合到存储设备的第一端口的第一组件想要与耦合到存储器设备的第二端口的第二组件通信时，第一组件将消息写入与第二端口相关联的消息缓冲器。第二端口的输入寄存器中的中断被设置为通知耦合到第二端口的第二组件新消息可用。在接收到中断时，第二个组件读取中断寄存器以确定中断的性质。然后第二个组件从消息缓冲区读取消息。

7. 发明申请

US20100103929A1 METHOD, APPARATUS, AND SYSTEM FOR AUTOMATIC DATA ALIGNER FOR MULTIPLE SERIAL RECEIVERS 有权
标题翻译：用于多个串行接收器的自动数据对齐器的方法，装置和系统
公开(公告)号：US20100103929A1
公开(公告)日：2010-04-29
申请号：US12260970
申请日：2008-10-29
申请人： SEUNG-JONG LEE , Daeyun Shim
发明人： SEUNG-JONG LEE , Daeyun Shim
IPC分类号： H04L12/50
CPC分类号： H03M9/00 , G06F13/4295 , G11C7/1006 , H04L7/04 , H04L25/14 , Y02D10/14 , Y02D10/151
摘要： A method, apparatus and system for employing an automatic data aligner for multiple serial receivers in serial link technologies is provided. In one embodiment, converting a transmission data path of a single bit into a parallel bit via a data aligner, wherein the data is being transmitted via one or more ports. Further, binding data transmission channels to reduce latency in transmission of the data, wherein the binding of the data transmission channels further includes inserting delay to match latency via the one or more ports.
摘要翻译：提供了一种在串行链路技术中采用多个串行接收机的自动数据对准器的方法，装置和系统。在一个实施例中，经由数据对准器将单个位的传输数据路径转换为并行位，其中数据正通过一个或多个端口传输。此外，绑定数据传输信道以减少数据传输中的等待时间，其中数据传输信道的绑定还包括插入延迟以经由一个或多个端口匹配等待时间。

8. 发明申请

US20100100200A1 DISCOVERY OF CONNECTIONS UTILIZING A CONTROL BUS 有权
标题翻译：发现使用控制总线的连接
公开(公告)号：US20100100200A1
公开(公告)日：2010-04-22
申请号：US12577707
申请日：2009-10-12
申请人： Jason Seung-Min Kim , Inyeol Lee , Shrikant Ranade , Daeyun Shim
发明人： Jason Seung-Min Kim , Inyeol Lee , Shrikant Ranade , Daeyun Shim
IPC分类号： G05B11/01
CPC分类号： G06F13/4022 , G06F13/4081
摘要： Discovery of connections utilizing a control bus. An embodiment of a method includes detecting a transition of a control bus from a high state to a low state by a source device, the source device being configured to be coupled with a sink device via an interface, the interface including the control bus, the source device including a pullup device and the sink device including a pulldown device;pulsing the control bus to a high state at the source device; and upon detecting by the source device that the control bus remains in the high state ceasing the pulsing of the control bus to the high state, and transitioning the source device from a disconnected state to a connected state.
摘要翻译：发现使用控制总线的连接。一种方法的实施例包括：通过源设备检测控制总线从高状态到低状态的转换，源设备被配置为经由接口与宿设备耦合，所述接口包括控制总线，源装置，其包括上拉装置，并且所述信宿装置包括下拉装置;将所述控制总线脉冲到所述源装置处的高状态; 并且当源设备检测到控制总线保持在高状态时，停止控制总线的脉冲到高状态，并且将源设备从断开状态转换到连接状态。

9. 发明授权

US07589559B2 Current mode circuitry to modulate a common mode voltage 有权
标题翻译：用于调制共模电压的电流模式电路
公开(公告)号：US07589559B2
公开(公告)日：2009-09-15
申请号：US11643388
申请日：2006-12-20
申请人： Daeyun Shim , Min-Kyu Kim , Gyudong Kim , Keewook Jung , Seung Ho Hwang
发明人： Daeyun Shim , Min-Kyu Kim , Gyudong Kim , Keewook Jung , Seung Ho Hwang
IPC分类号： H03K19/0175
CPC分类号： H04L5/20
摘要： In some embodiments, a chip includes transmitters to transmit differential signals on conductors; and current mode circuitry to selectively modulate a common mode voltage of the differential signals to communicate data. In other embodiments, a system includes a first chip to transmit first and second differential signals on conductors, and a second chip. The second chip includes receivers to receive the first and second differential signals from the conductors and provide received signals representative thereof, and current mode circuitry to selectively modulate a common mode voltage of either the first or second differential signals to communicate data and wherein the first chip includes common mode detection circuitry to detect changes in the common mode voltage. Other embodiments are described and claimed.
摘要翻译：在一些实施例中，芯片包括在导体上传输差分信号的发射器; 以及电流模式电路，用于选择性地调制差分信号的共模电压以传送数据。在其他实施例中，系统包括用于在导体上传输第一和第二差分信号的第一芯片和第二芯片。第二芯片包括接收器，用于从导体接收第一和第二差分信号并提供表示其的接收信号;以及电流模式电路，用于选择性地调制第一或第二差分信号的共模电压以传送数据，并且其中第一芯片包括用于检测共模电压变化的共模检测电路。描述和要求保护其他实施例。

10. 发明申请

US20080169838A1 Current mode circuitry to modulate a common mode voltage 有权
标题翻译：用于调制共模电压的电流模式电路
公开(公告)号：US20080169838A1
公开(公告)日：2008-07-17
申请号：US11643388
申请日：2006-12-20
申请人： Daeyun Shim , Min-Kyu Kim , Gyudong Kim , Keewook Jung , Seung Ho Hwang
发明人： Daeyun Shim , Min-Kyu Kim , Gyudong Kim , Keewook Jung , Seung Ho Hwang
IPC分类号： H01P5/00
CPC分类号： H04L5/20
摘要： In some embodiments, a chip includes transmitters to transmit differential signals on conductors; and current mode circuitry to selectively modulate a common mode voltage of the differential signals to communicate data. In other embodiments, a system includes a first chip to transmit first and second differential signals on conductors, and a second chip. The second chip includes receivers to receive the first and second differential signals from the conductors and provide received signals representative thereof, and current mode circuitry to selectively modulate a common mode voltage of either the first or second differential signals to communicate data and wherein the first chip includes common mode detection circuitry to detect changes in the common mode voltage. Other embodiments are described and claimed.
摘要翻译：在一些实施例中，芯片包括在导体上传输差分信号的发射器; 以及电流模式电路，用于选择性地调制差分信号的共模电压以传送数据。在其他实施例中，系统包括用于在导体上传输第一和第二差分信号的第一芯片和第二芯片。第二芯片包括接收器，用于从导体接收第一和第二差分信号并提供表示其的接收信号;以及电流模式电路，用于选择性地调制第一或第二差分信号的共模电压以传送数据，并且其中第一芯片包括用于检测共模电压变化的共模检测电路。描述和要求保护其他实施例。

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