会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 4. 发明申请
    • NONVOLATILE MEMORY DEVICE AND FABRICATING METHOD THEREOF
    • 非易失性存储器件及其制造方法
    • US20130228849A1
    • 2013-09-05
    • US13775833
    • 2013-02-25
    • Ju-Hyung KimChang-Seok KangWoon-Kyung Lee
    • Ju-Hyung KimChang-Seok KangWoon-Kyung Lee
    • H01L29/792H01L29/66
    • H01L29/792H01L27/11582H01L29/4234H01L29/513H01L29/66833H01L29/7926
    • A nonvolatile memory device comprises a channel pattern, a first interlayer dielectric film and a second interlayer dielectric film spaced apart from each other and stacked over each other, a gate pattern disposed between the first interlayer dielectric film and the second interlayer dielectric film, a trap layer disposed between the gate pattern and the channel pattern and a charge spreading inhibition layer disposed between the channel pattern and the first interlayer dielectric film and between the channel pattern and the second interlayer dielectric film. The charge spreading inhibition layer may include charges inside or on its surface. The charge spreading inhibition layer includes at least one of a metal oxide film or a metal nitride film or a metal oxynitride film having a greater dielectric constant than a silicon oxide film.
    • 非易失性存储器件包括彼此间隔开并且彼此堆叠的沟道图案,第一层间电介质膜和第二层间电介质膜,布置在第一层间电介质膜和第二层间电介质膜之间的栅极图案,阱 设置在栅极图案和沟道图案之间的层,以及设置在沟道图案和第一层间电介质膜之间以及沟道图案和第二层间电介质膜之间的电荷扩展抑制层。 电荷扩散抑制层可以包括其表面内部或其表面上的电荷。 电荷扩散抑制层包括金属氧化物膜或金属氮化物膜或具有比氧化硅膜更大的介电常数的金属氧氮化物膜中的至少一种。
    • 9. 发明授权
    • Methods of forming nonvolatile memory devices
    • 形成非易失性存储器件的方法
    • US07399672B2
    • 2008-07-15
    • US11375983
    • 2006-03-15
    • Chang-Hyun LeeJung-Dal ChoiChang-Seok KangYoo-Cheol ShinJong-Sun Sel
    • Chang-Hyun LeeJung-Dal ChoiChang-Seok KangYoo-Cheol ShinJong-Sun Sel
    • H01L21/336
    • H01L27/105B82Y10/00H01L21/823462H01L27/0629H01L27/11526H01L27/11546H01L27/11568
    • Methods of forming a memory device include forming a device isolation layer in a semiconductor substrate including a cell array region and a resistor region, the device isolation layer extending into the resistor region and defining an active region in the semiconductor substrate. A first conductive layer is formed on the device isolation layer in the resistor region. The semiconductor substrate is exposed in the cell array region. A cell insulation layer is formed on a portion of the semiconductor substrate including the exposed cell array region, the active region and the device isolation layer in the resistor region. A second conductive layer is formed on the cell insulation layer in the portion of the semiconductor substrate including the exposed cell array region, the active region and the device isolation layer in the resistor region. The second conductive layer is etched to form a cell gate electrode in the cell array region and to concurrently remove the second conductive layer from the resistor region and the first conductive layer is etched in the resistor region to form a resistor.
    • 形成存储器件的方法包括在包括单元阵列区域和电阻器区域的半导体衬底中形成器件隔离层,器件隔离层延伸到电阻器区域中并在半导体衬底中限定有源区域。 在电阻器区域中的器件隔离层上形成第一导电层。 半导体衬底暴露在电池阵列区域中。 在半导体衬底的包括电阻器区域中的暴露的电池阵列区域,有源区域和器件隔离层的部分上形成电池绝缘层。 在半导体衬底的包括电阻器区域中的暴露的电池阵列区域,有源区域和器件隔离层的部分中的单元绝缘层上形成第二导电层。 蚀刻第二导电层以在电池阵列区域中形成电池栅电极,并且同时从电阻器区域去除第二导电层,并且在电阻器区域中蚀刻第一导电层以形成电阻器。